Patents by Inventor Joshua D. Heppner

Joshua D. Heppner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955434
    Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, Eric J. Li, Shawna M. Liff, Javier A. Falcon, Joshua D. Heppner
  • Patent number: 11653467
    Abstract: An Internet of Things (IoT) apparatus including a plurality of boards and one or more connectors to couple IoT modules to one or more of the plurality of boards and to couple the plurality of boards to each other. The connectors include stacking connectors on both sides of at least some of the boards and at least some of the IoT modules to be coupled to the boards.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Chris D. Lucero, Khine Han, Joshua D. Heppner, Christopher Rossi, Hadi Sharifi, Aniekeme Udofia, Abdul Bailey, Katherine Perkins, Kevin Lowell Hudson, Roderick E. Kronschnabel, Neha Purushothaman
  • Publication number: 20220344273
    Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.
    Type: Application
    Filed: July 8, 2022
    Publication date: October 27, 2022
    Inventors: Toshihiro TOMITA, Eric J. LI, Shawna M. LIFF, Javier A. FALCON, Joshua D. HEPPNER
  • Publication number: 20210307189
    Abstract: In some examples, an Internet of Things (IoT) apparatus including a plurality of boards and one or more connectors to couple IoT modules to one or more of the plurality of boards and to couple the plurality of boards to each other. The connectors include stacking connectors on both sides of at least some of the boards and at least some of the IoT modules to be coupled to the boards. The stacking connectors allow the IoT modules and the boards to be coupled together in a manner that boards and modules cannot be inserted incorrectly.
    Type: Application
    Filed: December 21, 2018
    Publication date: September 30, 2021
    Inventors: Chris D. Lucero, Khine Han, Joshua D. Heppner, Christopher Rossi, Hadi Sharifi, Aniekeme Udofia, Abdul Bailey, Katherine Perkins, Kevin Lowell Hudson, Roderick E. Kronschnabel, Neha Purushothaman
  • Patent number: 10825714
    Abstract: A substrate retention plate system for holding a substrate for processing in an electronic device manufacturing process is described. The retention plate system includes a top plate and a bottom plate to sandwich a flexible substrate. Additionally, the top plate includes a number of cams to stretch the flexible substrate across the bottom plate.
    Type: Grant
    Filed: April 2, 2016
    Date of Patent: November 3, 2020
    Assignee: INTEL CORPORATION
    Inventors: Daniel Chavez-Clemente, Joshua D. Heppner, Naida Duranovic
  • Patent number: 10820437
    Abstract: The document discloses a stretchable packaging system for a wearable electronic device. The system includes a first electronic component and a flexible trace connected to the first electronic component. An elastomer layer having a variable thickness at least partially encapsulates the first electronic component and the flexible trace. A first region of the layer has a first thickness that is greater than a second thickness of a second region of the layer that at least partially encapsulates the trace.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: October 27, 2020
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Son V. Nguyen, Rajat Goyal, David B. Lampner, Dilan Seneviratne, Albert S. Lopez, Joshua D. Heppner, Srinivas V. Pietambaram, Shawna M. Liff, Nadine L. Dabby
  • Publication number: 20200286834
    Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.
    Type: Application
    Filed: May 20, 2020
    Publication date: September 10, 2020
    Inventors: Tomita YOSHIHIRO, Eric J. LI, Shawna M. LIFF, Javier A. FALCON, Joshua D. HEPPNER
  • Patent number: 10707171
    Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Tomita Yoshihiro, Eric J. Li, Shawna M. Liff, Javier A. Falcon, Joshua D. Heppner
  • Patent number: 10672625
    Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate having a recess, an electronic component disposed in the recess and electrically coupled to the substrate, and an underfill material disposed in the recess between the electronic component and the substrate. Associated systems and methods are also disclosed.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 2, 2020
    Assignee: Intel Corporation
    Inventors: Sergio A. Chan Arguedas, Joshua D. Heppner, Jimin Yao
  • Patent number: 10636716
    Abstract: Examples of an electronic package include a package assembly. The package assembly can include a substrate having a first substrate surface that includes a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block that includes a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block can include a conductive material. The first contact surface can be coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package can further include an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block can be exposed through the overmold.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: April 28, 2020
    Assignee: Intel Corporation
    Inventors: Sasha Oster, Srikant Nekkanty, Joshua D. Heppner, Adel A. Elsherbini, Yoshihiro Tomita, Debendra Mallik, Shawna M. Liff, Yoko Sekihara
  • Patent number: 10615128
    Abstract: Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include a substrate including electrical connection circuitry therein, grounding circuitry on, or at least partially in the substrate, the grounding circuitry at least partially exposed from a surface of the substrate, a die electrically connected to the connection circuitry and the grounding circuitry, the die on the substrate, and a conductive foil or conductive film surrounding the die, the conductive foil or conductive film electrically connected to the grounding circuitry.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Rajendra C. Dias, Anna M. Prakash, Joshua D. Heppner, Eric J. Li, Nachiket R. Raravikar
  • Patent number: 10446461
    Abstract: Molded electronics package cavities are formed by placing a sacrificial material in the mold and then decomposing, washing, or etching away this sacrificial material. The electronics package that includes this sacrificial material is then overmolded, with little or no change needed in the overmolding process. Following overmolding, the sacrificial material is removed such as using a thermal, chemical, optical, or other decomposing process. This proposed use of sacrificial material allows for formation of complex 3-D cavities, and reduces or eliminates the need for precise material removal tolerances. Multiple instances of the sacrificial material may be removed simultaneously, replacing a serial drilling process with a parallel material removal manufacturing process.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: October 15, 2019
    Assignee: Intel Corporation
    Inventors: Sasha Oster, Adel A. Elsherbini, Joshua D. Heppner, Shawna M. Liff
  • Publication number: 20190281717
    Abstract: The document discloses a stretchable packaging system for a wearable electronic device. The system includes a first electronic component and a flexible trace connected to the first electronic component. An elastomer layer having a variable thickness at least partially encapsulates the first electronic component and the flexible trace. A first region of the layer has a first thickness that is greater than a second thickness of a second region of the layer that at least partially encapsulates the trace.
    Type: Application
    Filed: September 28, 2016
    Publication date: September 12, 2019
    Inventors: Aleksandar Aleksov, Son V. Nguyen, Rajat Goyal, David B. Lampner, Dilan Seneviratne, Albert S. Lopez, Joshua D. Heppner, Srinivas V. Pietambaram, Shawna M. Liff, Nadine L. Dabby
  • Publication number: 20190074199
    Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate having a recess, an electronic component disposed in the recess and electrically coupled to the substrate, and an underfill material disposed in the recess between the electronic component and the substrate. Associated systems and methods are also disclosed.
    Type: Application
    Filed: April 1, 2016
    Publication date: March 7, 2019
    Applicant: Intel Corporation
    Inventors: Sergio A. Chan Arguedas, Joshua D. Heppner, Jimin Yao
  • Patent number: 10205292
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 12, 2019
    Assignee: INTEL CORPORATION
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner
  • Publication number: 20180376591
    Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a magnetic particle embedded flexible substrate, a printed flexible substrate for a magnetic tray, or an electro-magnetic carrier for magnetized or ferromagnetic flexible substrates.
    Type: Application
    Filed: August 31, 2018
    Publication date: December 27, 2018
    Inventors: Yoshihiro TOMITA, Joshua D. HEPPNER, Shawna M. LIFF, Pramod MALATKAR
  • Publication number: 20180337135
    Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.
    Type: Application
    Filed: December 22, 2015
    Publication date: November 22, 2018
    Inventors: Tomita YOSHIHIRO, Eric J. LI, Shawna M. LIFF, Javier A. FALCON, Joshua D. HEPPNER
  • Patent number: 10111368
    Abstract: Systems to manufacture an electronic circuit assembly are disclosed. In one embodiment, the system includes a flexible substrate with a substrate registration feature and a carrier with a carrier registration feature. A removable fastener removably fixes the flexible substrate to the carrier by being received into the substrate registration feature and the carrier registration feature. Once the flexible substrate is removably affixed to the carrier, the carrier provides the flexible substrate with rigidity to receive at least one electronic device of the electronic circuit assembly.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: October 23, 2018
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, Joshua D. Heppner
  • Publication number: 20180277458
    Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Inventors: Sasha Oster, Srikant Nekkanty, Joshua D. Heppner, Adel A. Elsherbini, Yoshihiro Tomita, Debendra Mallik, Shawna M. Liff, Yoko Sekihara
  • Patent number: 10070520
    Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a magnetic particle embedded flexible substrate, a printed flexible substrate for a magnetic tray, or an electro-magnetic carrier for magnetized or ferromagnetic flexible substrates.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Yoshihiro Tomita, Joshua D. Heppner, Shawna M. Liff, Pramod Malatkar