Patents by Inventor Joshua D. Heppner

Joshua D. Heppner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170188455
    Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a magnetic particle embedded flexible substrate, a printed flexible substrate for a magnetic tray, or an electro-magnetic carrier for magnetized or ferromagnetic flexible substrates.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Yoshihiro Tomita, Joshua D. Heppner, Shawna M. Liff, Pramod Malatkar
  • Publication number: 20170181338
    Abstract: The present disclosure is directed to a system to manufacture an electronic circuit assembly. In one embodiment, the system includes a flexible substrate with a substrate registration feature and a carrier with a carrier registration feature. A removable fastener removably fixes the flexible substrate to the carrier by being received into the substrate registration feature and the carrier registration feature. Once the flexible substrate is removably affixed to the carrier, the carrier provides the flexible substrate with rigidity to receive at least one electronic device of the electronic circuit assembly. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventors: YOSHIHIRO TOMITA, JOSHUA D. HEPPNER
  • Publication number: 20170179041
    Abstract: Semiconductor packages with electromagnetic interference (EMI) shielding and a method of manufacture therefor is disclosed. The semiconductor packages may house single electronic component or may be a system in a package (SiP) implementation. The EMI shielding may be provided on top of and along the periphery of the semiconductor package. The EMI shielding on the periphery may be formed of cured conductive ink or cured conductive paste disposed on sidewalls of molding that encapsulates the electronic component(s) provided on the semiconductor package. The vertical portions of the EMI shielding, including EMI shielding on the periphery may be formed by filling conductive ink in trenches formed in-situ with curing the molding. The top portion of the EMI shielding and the may additionally be cured conductive ink.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Rajendra C. Dias, Eric J. Li, Joshua D. Heppner
  • Publication number: 20170179040
    Abstract: An electric device and method of fabrication of that electric device is disclosed. The electric device includes one or more electrical devices attached to a substrate. The electric device further includes one or more grounding pads attached to the substrate. The electric device further includes a perforated conductive material placed on the substrate. The electric device further includes a molding compound deposited to cover the perforated conductive material, the one or more devices, and the one or more grounding pads.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Rajendra C. Dias, Joshua D. Heppner, Mitul B. Modi, Anna M. Prakash
  • Publication number: 20170178990
    Abstract: Devices and methods include an electronic package having a through-mold interconnect are shown herein. Examples of the electronic package include a package assembly. The package assembly including a substrate having a first substrate surface. The first substrate surface including a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block. The contact block including a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block includes a conductive material. The first contact surface is coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package further includes an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block is exposed through the overmold.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventors: Sasha Oster, Srikant Nekkanty, Joshua D. Heppner, Adel A. Elsherbini, Yoshihiro Tomita, Debendra Mallik, Shawna M. Liff, Yoko Sekihara
  • Publication number: 20170166407
    Abstract: A pick and place machine includes a frame to adjustably mount, in three dimensions, a plurality of vacuum nozzles over a component to be picked according to a first embodiment a multi-head PnP mechanism may be simple and flexible to train for a wide variety of component and package shapes and sizes. Multiple PnP nozzles are staggered independently in three axes. According to a second embodiment, a PnP mechanism uses an array of self-learning nozzles that adapt by adjusting the z height of individual nozzles to the shape of the object to be picked.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Kumar Abhishek Singh, Pramod Malatkar, Joshua D. Heppner, Jimin Yao
  • Publication number: 20170171957
    Abstract: The electronic package includes a substrate that includes a plurality of dielectric layers and conductive routings between the plurality of dielectric layers; wherein the substrate further includes a plurality of thermal finned vias that electrically connect the conductive routings within the substrate to one another; and an electronic component mounted on the substrate, wherein the finned via transfers heat from the electronic component to the substrate and electrically connects the conductive routings within the substrate to the electronic component.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Nayandeep K. Mahanta, Joshua D. Heppner, Adel A. Elsherbini
  • Patent number: 9635764
    Abstract: An integrated circuit that includes a substrate having a shape memory material (SMM), the SMM is in a first deformed state and has a first crystallography structure and a first configuration, the SMM is able to be deformed from a first configuration to a second configuration, the SMM changes to a second crystallography structure and deforms back to the first configuration upon receiving energy, the SMM returns to the first crystallography structure upon receiving a different amount of energy; and an electronic component attached to substrate. In other forms, the SMM is in a first deformed state and has a first polymeric conformation and a first configuration, the SMM changes from a first polymeric conformation to a second polymeric conformation and be deformed from a first configuration to a second configuration, the SMM changes returns to the first polymeric conformation and deforms back to the first configuration upon receiving energy.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Shipeng Qiu, Shawna Liff, Kayleen L Helms, Joshua D Heppner, Adel Elsherbini, Johanna Swan, Gary M. Barnes
  • Patent number: 9615483
    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations associated with a package load assembly. In one embodiment, a package load assembly may include a frame configured to form a perimeter around a die area of a package substrate having a first surface configured to be coupled with a surface of the package substrate and a second surface disposed opposite to the first surface. The frame may include deformable members disposed on the second surface, which may be configured to be coupled with a base of a heat sink to distribute force applied between the heat sink and the package substrate, via the frame, and may deform under application of the force, which may allow the base of the heat sink to contact a surface of an integrated heat spreader within the die area of the package substrate.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Gaurav Chawla, Joshua D. Heppner, Vijaykumar Krithivasan, Michael Garcia, Kuang C. Liu, Rajasekaran Swaminathan
  • Publication number: 20170094799
    Abstract: An integrated circuit that includes a substrate having a shape memory material (SMM), the SMM is in a first deformed state and has a first crystallography structure and a first configuration, the SMM is able to be deformed from a first configuration to a second configuration, the SMM changes to a second crystallography structure and deforms back to the first configuration upon receiving energy, the SMM returns to the first crystallography structure upon receiving a different amount of energy; and an electronic component attached to substrate. In other forms, the SMM is in a first deformed state and has a first polymeric conformation and a first configuration, the SMM changes from a first polymeric conformation to a second polymeric conformation and be deformed from a first configuration to a second configuration, the SMM changes returns to the first polymeric conformation and deforms back to the first configuration upon receiving energy.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Shipeng Qiu, Shawna Liff, Kayleen L. Helms, Joshua D. Heppner, Adel Elsherbini, Johanna Swan, Gary M. Barnes
  • Patent number: 9601848
    Abstract: An apparatus includes a plurality of contact elements to provide electrical continuity between an integrated circuit and an electronic subassembly, wherein a contact element includes a spring element and a separate lead element, wherein the spring element is arranged to be substantially vertically slidable over at least a portion of the lead element in response to a force applied to the contact element.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: March 21, 2017
    Assignee: Intel Corporation
    Inventors: Joshua D Heppner, Sriram Srinivasan
  • Patent number: 9603276
    Abstract: Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic package mounted on the frame. The first electronic package includes a first pin grid array. The electronic assembly further includes a second electronic package mounted on the frame. The second electronic package includes a second pin grid array. The electronic assembly further includes an actuation mechanism on the frame. The actuation mechanism is configured to move the first electronic package and the second electronic package relative to the frame during operation of the actuation mechanism.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: March 21, 2017
    Assignee: Intel Corporation
    Inventors: David J. Llapitan, Jeffory L. Smalley, Gaurav Chawla, Joshua D Heppner, Vijaykumar Krithivasan, Jonathan W. Thibado, Kuang Liu, Gregorio Murtagian
  • Patent number: 9491881
    Abstract: A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an insulative insert. The conductive socket substrate has a first surface, a second surface, and at least one opening extending therebetween. The insulative insert has a base portion with at least one projection extending therefrom. The insulative insert is mated with the conductive socket substrate such that the at least one projection resides within a corresponding conductive socket substrate opening. The insulative insert further includes a plurality of vias, wherein at least one of the plurality of vias extends through the insulative base and through an insulative insert projection, wherein a contact may be disposed within the via.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Joshua D. Heppner, Zhichao Zhang, Srikant Nekkanty, Michael Garcia
  • Publication number: 20160254629
    Abstract: Embodiments of the present disclosure are directed towards socket contact techniques and configurations. In one embodiment, an apparatus may include a socket substrate having a first side and a second side disposed opposite to the first side, an opening formed through the socket substrate, an electrical contact disposed in the opening and configured to route electrical signals between the first side and the second side of the socket substrate, the electrical contact having a cantilever portion that extends beyond the first side, wherein the first side and surfaces of the socket substrate in the opening are plated with a metal. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 26, 2014
    Publication date: September 1, 2016
    Applicant: Intel Corporation
    Inventors: Dhanya Athreya, Gaurav Chawla, Kemal Aygun, Glen P. Gordon, Sarah M. Canny, Jeffory L. Smalley, Srikant Nekkanty, Michael Garcia, Joshua D. Heppner
  • Patent number: 9385444
    Abstract: An apparatus comprises a socket for an integrated circuited (IC), wherein the socket includes a socket body that includes a plurality of land grid array contacts for contacting the IC, an alignment mechanism, and a locking mechanism, and a cover for the socket, wherein the cover is vertically alignable with the alignment mechanism of the socket body and laterally slidable over the grid array contacts upon alignment to engage the locking mechanism of the socket body.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: Vijaykumar Krithivasan, Gaurav Chawla, Joshua D. Heppner, Jeffory L. Smalley
  • Patent number: 9385457
    Abstract: Connectors and methods to couple packages and dies are shown. Selected examples include plugs and receptacles having two or more terraces with contacts provided along the terraces. Examples of connectors and methods include configurations where the connector is usable with a package including a die coupled along a substrate. In selected examples a heat sink is coupled over the die, and a package includes a side access port between the heat sink and the substrate configured to receive the connector, such as one or more of a plug or receptacle through the side access port.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: Gaurav Chawla, Joshua D Heppner, Zhichao Zhang, David J. Llapitan, Vijaykumar Krithivasan
  • Publication number: 20160190717
    Abstract: Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic package mounted on the frame. The first electronic package includes a first pin grid array. The electronic assembly further includes a second electronic package mounted on the frame. The second electronic package includes a second pin grid array. The electronic assembly further includes an actuation mechanism on the frame. The actuation mechanism is configured to move the first electronic package and the second electronic package relative to the frame during operation of the actuation mechanism.
    Type: Application
    Filed: December 26, 2014
    Publication date: June 30, 2016
    Inventors: David J. Llapitan, Jeffory L. Smalley, Gaurav Chawla, Joshua D. Heppner, Vijaykumar Krithivasan, Jonathan W. Thibado, Kuang Liu, Gregorio Murtagian
  • Publication number: 20160190716
    Abstract: Some forms relate to a socket having a housing. A first receiving pin field is formed as part of the housing. The first pin receiving field includes a first plurality of electrical contacts. A second receiving pin field is formed as part of the housing. The second pin field includes a second plurality of electrical contacts. An actuation mechanism is configured to engage the first plurality electrical contacts with a first set of pins on a first electronic package and the second plurality electrical contacts with a second set of pins on a second electronic package.
    Type: Application
    Filed: December 26, 2014
    Publication date: June 30, 2016
    Inventors: Kuang Liu, Gregorio Murtagian, David J. Llapitan, Jeffory L. Smalley, Gaurav Chawla, Joshua D. Heppner, Vijaykumar Krithivasan, Jonathan W. Thibado
  • Patent number: 9325087
    Abstract: A clip-type connector for electrically coupling a substrate with a device or another substrate is disclosed. An electrical connector comprises a top plate and a bottom plate. An array of contacts are on at least one of the top plate and bottom plate. A hinge is located between the top plate and the bottom plate such that the hinge mechanically connects the top plate to the bottom plate. A spring applying a force against the top and bottom plates.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: April 26, 2016
    Assignee: Intel Corporation
    Inventors: Gaurav Chawla, Joshua D. Heppner, Jeffory L Smalley, Vijaykumar Krithivasan
  • Publication number: 20160079150
    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations associated with a package load assembly. In one embodiment, a package load assembly may include a frame configured to form a perimeter around a die area of a package substrate having a first surface configured to be coupled with a surface of the package substrate and a second surface disposed opposite to the first surface. The frame may include deformable members disposed on the second surface, which may be configured to be coupled with a base of a heat sink to distribute force applied between the heat sink and the package substrate, via the frame, and may deform under application of the force, which may allow the base of the heat sink to contact a surface of an integrated heat spreader within the die area of the package substrate.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 17, 2016
    Inventors: Gaurav Chawla, Joshua D. Heppner, Vijaykumar Krithivasan, Michael Garcia, Kuang C. Liu, Rajasekaran Swaminathan