Abstract: A method for treating the photoresist includes: developing the photoresist, forming a patterned photoresist layer on a mask material layer, and forming byproducts on the surface of the photoresist layer; and treating the photoresist layer with plasma to harden the photoresist layer.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: Provided is a preparation method of a semiconductor device, including the following steps: providing a substrate and forming a mask layer with a plurality of first windows on the substrate; forming a dielectric layer, the dielectric layer at least covering sidewalls of the first windows; forming a first photoresist material layer, the first photoresist material layer covering the dielectric layer and the mask layer and filling the first windows; patterning the first photoresist material layer to form a patterned first photoresist layer which exposes a top surface of the dielectric layer; by using the first photoresist layer and the mask layer as masks, removing the dielectric layer to form second windows; and removing part of the substrate along the second windows to form a patterned substrate.

Abstract: The present application relates to the technical field of manufacturing semiconductor, and in particular to a method of manufacturing semiconductor structure and a semiconductor structure. The method of manufacturing semiconductor structure includes: forming a conductive layer on a substrate, and removing part of the conductive layer to form a contact structure composed of a plurality of contact pads; where each of the contact pads is electrically connected to a transistor structure on the substrate; and, after the contact pads are formed, removing residual core on top ends of the contact pads away from the substrate by dry etching.

Abstract: Provided is a formation method of a semiconductor structure, including: providing a substrate having a first region and a second region, a plurality of discrete through holes being formed in the substrate, an arrangement density of the through holes in the first region being greater than that in the second region; forming a sacrificial layer filling the through holes; etching some thickness of the substrate around the sacrificial layer to form openings, the openings surrounding the sacrificial layer, a depth of the opening being less than a depth of the through hole in a direction perpendicular to a surface of the substrate; and removing the sacrificial layer, the openings communicating with the corresponding through holes to form trenches.

Abstract: Devices and methods for photoacoustic tomography are disclosed herein. One exemplary photoacoustic tomography device uses a laser to produce acoustic waves in a sample. A transducer receives the acoustic waves through a slit formed by one or more blades positioned substantially parallel to the receiving aperture of the transducer. An acoustic absorber is affixed to each of the one or more blades along a surface proximal to the transducer. A processor acquires acoustic data and reconstructs photoacoustic tomographic images based on the acquired data. Reconstructing the image involves setting reconstruction parameters, defining a reconstruction area, reconstruction position, and pixel size, and calculating an acoustic travelling path for the sample to each transducer element. The acoustic travelling paths are saved into a three-dimensional array.

Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.

Abstract: A laminated capacitor and a method for manufacturing the same are provided. The method includes operations of providing a substrate; forming a first isolation insulation spacer and a plurality of discrete bottom bonding pads on the substrate; forming a sub-capacitor structure on the bottom bonding pads, which comprises a plurality of discrete bottom electrodes, a plurality of discrete top electrodes, and a dielectric medium located between the bottom electrodes and the top electrodes, wherein the plurality of bottom bonding pads are respectively electrically connected with the plurality of bottom electrodes in one-to-one correspondence; and repeatedly performing an operation of forming a connection structure and the sub-capacitor structure for N times on the sub-capacitor structure, such that N connection structures and N+1 sub-capacitor structures are alternately arranged along a direction perpendicular to the substrate, wherein N is an integer greater than or equal to 1.

Abstract: A capacitor structure and a method of preparing the same are provided. The method includes the followings. A substrate is provided. A stacked layer is formed on the substrate. A plurality of first via holes penetrating through the stacked layer are formed. The first via hole is filled with a conductive material to form a conductive pillar. A plurality of second via holes penetrating through the stacked layer are formed at a preset radius with the conductive pillar as an axis. The second via hole surrounds the conductive pillar circumferentially. The second via hole is filled with the conductive material to form an annular top electrode with a second gear.

Abstract: The method for preparing the hole in the semiconductor device includes: providing a base to be etched and forming a mask layer on the base to be etched; forming a first pattern layer arranged in an array on the mask layer; etching the mask layer by using the first pattern layer as a mask to form a first hole and a second pattern layer; depositing a protective layer on a side of the second pattern layer away from the base to be etched, the protective layer simultaneously covering a side wall and a bottom portion of the first hole; etching the protective layer which covers the bottom portion of the first hole; and etching a supporting layer by using the second pattern layer and the protective layer which covers the side wall of the first hole as a mask to form a second hole.

Abstract: Provided are a Phi29 DNA polymerase mutant with improved thermal stability and an use thereof in sequencing. The phi29 DNA polymerase mutant is represented by A) or B) below: the DNA polymerase mutant represented by the A) is a protein having DNA polymerase activity that is obtained by modifying at least one amino acid residue(s) in the following six sites in a phi29 DNA polymerase amino acid sequence: the 97-th, 123-th, 217-th, 224-th, 515-th, and 474-th sites; the DNA polymerase mutant represented by the B) is a protein having DNA polymerase activity that is derived from the A) by adding a tag sequence to a terminal of the amino acid sequence of the protein represented by the A).

Abstract: This application provides an authentication credential protection method and system. The protection method includes the following steps: generating authentication secret information based on a lock screen password and hardware secret information of a first device; randomly generating, by the first device, a symmetric key, and using the symmetric key as an encryption key for the authentication secret information; splitting the encryption key into at least two first key segments by using a multi-party data splitting algorithm, where one of the at least two first key segments is stored on the first device; and sending, by the first device, another first key segment to a trusted device. In the foregoing technical solution, the authentication secret information is generated by using the lock screen password and the hardware secret information, increasing information complexity. In addition, different trusted devices are used to store the split key segments, improving security of the encryption key.

Abstract: The present invention relates to compositions, devices and methods of delayed and sustained release of energy molecules for brain function. The composition comprises an energy molecule required for human brain function; wherein the release of the energy molecule is delayed and then sustained over a period of time. The methods comprise administering the composition subject in need thereof immediately prior to going to sleep. The present invention also relates to systems for brain stimulation during sleep and methods of use thereof. The system comprises a brain stimulation module and at least one of a brain energy source, a hypnotic source, or both. The methods involve administering to a subject a brain energy molecule, a hypnotic, or both and providing to the subject during restorative sleep a sensory stimulation.

Abstract: The present disclosure provides a sedimentation tank capable of automatically adjusting liquid level and flow, which comprises one or more sedimentation cells which are connected in sequence, a water inlet pipe is arranged on the left side of the leftmost sedimentation cell; the front end of the water inlet pipe is bent and the input port of it is close to the wall; the highest point of the connecting pipe is lower than the highest point of the grease discharge port of the corresponding sedimentation cell, when the liquid level in the sedimentation cell reaches the discharge level of the connecting pipe, the connecting pipe automatically adjusts the flow according to different discharge level so as to adjust the liquid level of the sedimentation cell, and the settled sewage is discharged out of the tank or discharged into the next-stage sedimentation cell until the last stage, and finally discharged.

Abstract: Systems and methods for improving limited-view photoacoustic tomography using an acoustic reflector are described. In particular, an acoustic reflector and ultrasonic transducer array are integrated to provide a virtual array that enhances the field of view of the ultrasonic transducer array, thereby improving the quality of photoacoustic tomography images obtained using the systems and methods described herein.

Abstract: A base station includes multiple edge nodes and a central node. The edge nodes are configured to perform communication with a user equipment, and execute baseband processing and mutual conversion between baseband data and radio data, in which the multiple edge nodes belong to one or more edge node groups, and each edge node group includes at least one edge node. The central node is configured to perform communication with the multiple edge nodes, manage the multiple edge nodes, and perform resource sharing so that resources are shared by the multiple edge nodes. The base station is divided into two levels of architecture, namely, a central node and an edge node, and the central node implements resource sharing so that resources are shared by the edge nodes, so that a resource sharing degree in the base station is enhanced.

Abstract: The disclosure discloses a pixel structure. The pixel structure at least includes a first pixel electrode and a second pixel electrode disposed adjacently. The first pixel electrode includes a first effective display section and a first ineffective display section. The second pixel electrode includes a second effective display section and a second ineffective display section. A display area of the first effective display section is smaller than a display area of the second effective display section. A ratio of an actual coverage area of the second pixel electrode to an actual coverage area of the first pixel electrode is in a range of 1˜2/3.

Abstract: Described herein is a fluid dispensing system, a system for processing waste material and a fluid monitoring system and a method of monitoring the quality of a fluid. One embodiment provides a fluid dispensing system (1) including a fluid dispenser (3) in fluid communication with at least one source of a first fluid. An identification device identifies a user of the system and generates a user identifier. A processor (19) is responsive to the user identifier to access a database (27) to retrieve user data indicative of one or more user preferences and, in response, generate a control signal. One or more electrical sensors (25) are configured to sense a gesture motion from the user and, in response, generate a local input signal. An actuator system (29) is responsive to the control signal and the local input signal to dispense the first fluid from the fluid dispenser with predefined characteristics.

Abstract: A display pixel structure includes a plurality of pixel units arranged in an array. Each of the pixel units comprises the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel. Each of the sub-pixels includes a TFT switch. A ratio between a width/length ratio of the TFT switch of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of width/length ratios of multiple TFT switches thereof and a width/length ratio of the TFT switch of the fourth sub-pixel is equal to a ratio between a storage capacitance of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of multiple storage capacitances thereof and a storage capacitance of the fourth sub-pixel. An array substrate and a liquid crystal display device are also disclosed.

Abstract: An embodiment of the present invention discloses an RGBX display panel, including: a plurality of sub-pixels defined by an intersection of a plurality of scan lines and a plurality of data lines and arranged in an array manner. The plurality of sub-pixels includes a plurality of red sub-pixel, a plurality of green sub-pixels, a plurality of blue sub-pixels, and a plurality of X color sub-pixels; the X color is different from red, green and blue; a plurality of first thin film transistors; a ratio of an area of the X color sub-pixel blocked by the spacer to an X color sub-pixel area is a and 10%?a<100%. The present embodiment also discloses a liquid crystal display device. According to the present disclosure, there is an advantage that picture quality can be improved.