Abstract: A display apparatus includes: a base substrate including a display area and a non-display area adjacent to the display area; a first power supply wire in the non-display area, a first power supply voltage being applied to the first power supply wire; a second power supply wire in the non-display area and spaced apart from the first power supply wire, a second power supply voltage being applied to the second power supply wire; and a dam overlapping the first power supply wire and the second power supply wire, having a first height on the first power supply wire, and having a second height greater than the first height between the first power supply wire and the second power supply wire.

Abstract: Provided is an analytical method of providing an information for diagnosis of a hepatocellular carcinoma patient having susceptibility to sorafenib, wherein the expression levels of eight genes, i.e., CDH1, CHAD, EFNA2, FANCC, MAP2K1, MEN1, PBRM1, and PPARG genes, in combination, are measured in carcinoma tissues of a hepatocellular carcinoma patient, and thereby the response (susceptibility) to sorafenib can be predicted with high accuracy, and the combination of said genes can be usefully applied as a biomarker for selecting a hepatocellular carcinoma patient having susceptibility to sorafenib.

Abstract: An electronic device and a method for manufacturing a flexible circuit board are provided. The electronic device includes the flexible circuit board. The flexible circuit board includes a first flexible substrate, a first seed layer, a first conductive layer, and a second seed layer. The first seed layer is disposed on the first flexible substrate. The first conductive layer is disposed on the first seed layer. The second seed layer is disposed on the first conductive layer. The first seed layer is in contact with the first conductive layer.

Abstract: In a method of patterning an integrated circuit, test layer thickness variation data is received when a test layer with a known thickness disposed over a test substrate undergoes tilted angle plasma etching. Overlay offset data per substrate locations caused by the tilted angle plasma etching is determined. The overlay offset data is determined based on the received thickness variation data. The overlay offset data is associated with an overlay between first circuit patterns of a first layer on the semiconductor substrate and corresponding second circuit patterns of a second layer disposed over the first layer on the substrate. A location of the substrate is adjusted based on the overlay offset data during a lithography operation to pattern a resist layer over the second layer. The second layer is patterned based on the projected layout patterns of the reticle and using the tilted angle plasma etching.

Abstract: A vertical oscillation auxiliary platform, wherein a drive mechanism drives an upper cover tread board to make vertical up-and-down movements with a transmission mechanism; when the drive mechanism drives a transmission shaft rotate, the transmission shaft drives lower parts of 8-shaped bearing blocks to rotate eccentrically, and upper parts thereof move horizontally; the 8-shaped bearing blocks drive one end of triangular bearing blocks to move horizontally with horizontal transmission rods, and the triangular bearing blocks, without moving a third end, convert horizontal movements at one end to be vertical movements at another end, and drive finally the upper cover tread board to generate stable vertical oscillation, so that singularity and stability of vertical movements of the upper cover tread board can be promised, and more stable and comfortable feeling and passive exercise effects can be gained, without deteriorating the exercise effects and exercise comfort due to additional disorganized lateral move

Abstract: A mobile device for avoiding accidental shutdown includes a battery cell, a controller, and a jack element. The controller defines a first delay time and a second delay time. The first delay time is relative to the ODCP (Over Discharge Current Protection) of the battery cell. The second delay time is relative to the OVP (Over Voltage Protection) of the battery cell. When a plug of a power supply device is unplugged from the jack element, the controller detects an SOH (State of Health) of the battery cell. The controller compares the SOH with a first threshold ratio and a second threshold ratio. Then, the controller extends the first delay time and the second delay time according to a first multiplier, a second multiplier, or a third multiplier.

Abstract: A display is provided. The display device includes a display area and a non-display area located around the display area; a base layer; an organic light-emitting diode (OLED) that is located on the base layer in the display area; and a first crack detection line that is located on the base layer in the non-display area; wherein the first crack detection line comprises a first line that extends substantially in a first direction along a first edge of the display area, a second line that is separated from the first line and extends substantially in the first direction, and a third line that is connected to an end of the first line and an end of the second line, wherein a cross-sectional shape of the first line in a second direction crossing the first direction is inversely tapered.

Abstract: A moisture-permeable waterproof shoe includes an upper defining an interior space, and an inner sleeve unit disposed in the interior space and including a shoe-shaped inner sleeve defining a foot space and having an inner sleeve bottom surface, a moisture-permeable waterproof layer located on an outer side thereof, and a bottom seam formed on the inner sleeve bottom surface. A waterproof unit includes a bottom waterproof strip fixed to an outer surface of the waterproof layer at a position corresponding to the bottom seam so as to cover the bottom seam and formed with at least one gap. A bottom sealing member is fixed to the inner sleeve bottom surface. A sole is fixed to a bottom portion of the upper.

Abstract: A method for forming a memory device structure is provided. The method includes providing a substrate, a first dielectric layer, a conductive via, a magnetic tunnel junction cell, a first etch stop layer, and a first spacer layer. The substrate has a first region and a second region, the first dielectric layer is over the substrate, the conductive via passes through the first dielectric layer over the first region. The method includes removing the first etch stop layer, which is not covered by the first spacer layer. The method includes removing the first dielectric layer, which is not covered by the first etch stop layer.

Abstract: This invention relates to a novel mRNA composition and its production method useful for developing and manufacturing RNA-based anti-viral and/or anti-cancer vaccines and medicines. This invention includes two types of mRNA constructs, namely “5?-hairpin messenger RNA (5hmRNA)” and “messenger-hairpin-messenger RNA (mhmRNA)”, respectively. Both of 5hmRNA and mhmRNA contain at least a hairpin-like stem-loop RNA structure. The 5hmRNA contains at least a stem-loop RNA structure in the 5?-UTR of a protein/peptide-coding mRNA, while the mhmRNA contains a middle stem-loop structure flanked with two protein/peptide-coding mRNA sequences on both sides. In mhmRNA, the first 5?-mRNA preferably encodes an RNA replicase, for amplifying the second 3?-mRNA in transfected cells. After transfection into target cells, 5hmRNA and mhmRNA can be further translated into at least a desired protein/peptide.

Abstract: A pixel array is provided. The pixel array includes a plurality of red pixels, a plurality of green pixels, and a plurality of blue pixels. Each green pixel includes a light emitting diode (LED), a first transistor, a second transistor, a third transistor, and a fourth transistor. The LED receives a system low voltage. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to a second end of the first transistor and the anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to a first end of the second transistor. The fourth transistor is coupled to the anode of the light-emitting diode of an adjacent green pixel, a control terminal of the third transistor, and the anode of the light-emitting diode.

Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.

Abstract: An electronic device for suppressing battery swelling includes a first battery cell, a first conductive label, a second conductive label, a third conductive label, and a BMU (Battery Management Unit). The first battery cell includes a first nonconductive housing. The first conductive label, the second conductive label, and the third conductive label are disposed on the first nonconductive housing. The BMU outputs a charging voltage to the first battery cell. The BMU determines the voltage level of the charging voltage by detecting the states of the first conductive label, the second conductive label, and the third conductive label.

Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.

Abstract: The present disclosure provides a light emitting diode component, including a body and a plurality of P-N diode structures. The P-N diode structures are coupled in series and integrated on the body. The P-N diode structures include a plurality of p-type doping layers and a plurality of n-type doping layers. The p-type doping layer of a first P-N diode structure in the P-N diode structures is electrically coupled to the n-type doping layer of a second P-N diode structure in the P-N diode structures.

Abstract: A battery module for monitoring and suppressing battery swelling and interacting with a charging device includes a battery cell disposed in a nonconductive housing, a conductive label affixed to the nonconductive housing, a switch, and a controller. The battery cell is charged via a supply voltage from a charging device. The switch is coupled between the battery cell and the conductive label. The controller detects a resistance variation value ?R of the conductive label as result of swelling of the nonconductive housing, and generates a corresponding control voltage. As the resistance of the conductive label increases, the supply voltage may be adjusted downward according to the control voltage. If the resistance variation value ?R conductive label is greater than or equal to a predetermined threshold, the controller closes the switch, and the battery cell may then fully discharge through the conductive label.

Abstract: The present disclosure provides a semiconductor device, including a buffer layer, a first sub-chip and a second sub-chip, and a connecting element. The first sub-chip and the second sub-chip are separately arranged on the buffer layer. Each of the first sub-chip and the second sub-chip includes a first diffusion layer, an active layer, and a second diffusion layer. The first diffusion layer, the active layer, and the second diffusion layer are sequentially arranged on the buffer layer in a top-down approach. The first diffusion layer and the buffer layer are first-type epitaxial layers, and the second diffusion layer is a second-type epitaxial layer. The connecting element is configured to couple the second diffusion layer of the first sub-chip and the first diffusion layer of the second sub-chip.

Abstract: A pixel array is provided. The pixel array includes a plurality of red pixels, a plurality of green pixels, and a plurality of blue pixels. Each green pixel includes a light emitting diode (LED), a first transistor, a second transistor, a third transistor, and a fourth transistor. The LED receives a system low voltage. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to a second end of the first transistor and the anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to a first end of the second transistor. The fourth transistor is coupled to the anode of the light-emitting diode of an adjacent green pixel, a control terminal of the third transistor, and the anode of the light-emitting diode.

Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.

Abstract: The disclosure provides an electromagnetic wave adjustment apparatus includes a control circuit, a transistor circuit die and an electronic assembly. The transistor circuit die receives a control signal from the control circuit and drives the electronic assembly.