Patents by Inventor Jung Hsu

Jung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230341654
    Abstract: An optical system includes an optical module with a main axis is provided. The optical module includes a fixed portion, a movable portion, and a driving mechanism. The movable portion is connected to an optical element and is movable relative to the fixed portion. The driving mechanism drives the movable portion to move relative to the fixed portion. When viewed along a direction that is parallel with the main axis, the fixed portion is a polygonal structure with a first side, a second side, a third side, and a fourth side. The first side is parallel with the third side, the second side is parallel with the fourth side, and the first side is not parallel with the second side.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Chan-Jung HSU, I-Mei HUANG, Yi-Ho CHEN, Shao-Chung CHANG, Ichitai MOTO, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Wei-Jhe SHEN, Chao-Chang HU, Che-Wei CHANG, Sin-Jhong SONG, Shu-Shan CHEN, Chih-Wei WENG, Chao-Hsi WANG
  • Publication number: 20230341653
    Abstract: An optical system includes an optical module with a main axis is provided. The optical module includes a fixed portion, a movable portion, a driving mechanism, and a supporting assembly. The movable portion is connected to an optical element and is movable relative to the fixed portion. The driving mechanism drives the movable portion to move relative to the fixed portion. The supporting assembly is connected to the movable portion and the fixed portion. When viewed along a direction that is parallel with the main axis, the fixing portion is a polygonal structure with a first side, a second side, a third side, and a fourth side. The first side is parallel with the third side, the second side is parallel with the fourth side, and the first side is not parallel with the second side.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Chan-Jung HSU, I-Mei HUANG, Yi-Ho CHEN, Shao-Chung CHANG, Ichitai MOTO, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Wei-Jhe SHEN, Chao-Chang HU, Che-Wei CHANG, Sin-Jhong SONG, Shu-Shan CHEN, Chih-Wei WENG, Chao-Hsi WANG
  • Publication number: 20230327003
    Abstract: A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 12, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20230292516
    Abstract: A manufacturing method for a nonvolatile charge-trapping memory apparatus is provided. During the manufacturing process of the nonvolatile memory apparatus, a blocking layer of a storage device is effectively protected. Consequently, the blocking layer is not contaminated or thinned. Moreover, since the well regions of the logic device area and the memory device area are not simultaneously fabricated, it is feasible to fabricate small-sized nonvolatile memory cell in the memory device area and precisely control the threshold voltage of the charge trapping transistor.
    Type: Application
    Filed: March 10, 2023
    Publication date: September 14, 2023
    Inventors: Chun-Hsiao LI, Tsung-Mu LAI, Cheng-Yen SHEN, Chia-Jung HSU
  • Patent number: 11754928
    Abstract: A method for a lithography exposing process includes placing a reticle over a reticle stage, generating a light beam by irradiating a droplet by a laser, projecting a first portion of the light beam over a plurality of light permeable protrusions formed on a reflection layer and directing, by the protrusions and the reflection layer, the first portion of the light beam to the reticle.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Hung-Jung Hsu
  • Patent number: 11751398
    Abstract: A memory structure including a substrate, a gate structure, a charge storage layer, and a first control gate is provided. The substrate has a fin portion. A portion of the gate structure is disposed on the fin portion. The gate structure and the fin portion are electrically insulated from each other. The charge storage layer is coupled the gate structure. The charge storage layer and the gate structure are electrically insulated from each other. The first control gate is coupled to the charge storage layer. The first control gate and the charge storage layer are electrically insulated from each other.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: September 5, 2023
    Assignee: eMemory Technology Inc.
    Inventors: Chia-Jung Hsu, Woan-Yun Hsiao, Wein-Town Sun
  • Publication number: 20230266635
    Abstract: An optical system includes a first optical element driving mechanism, including a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to at least two first optical elements. The first movable assembly includes a first movable element. The first driving assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis. The first driving assembly is configured to drive the first movable element to move around the main axis. A portion of the first driving assembly is disposed on the first movable element. When viewed in a direction perpendicular to the main axis, the first driving assembly exceeds the first fixed assembly and the first movable assembly.
    Type: Application
    Filed: February 22, 2023
    Publication date: August 24, 2023
    Inventors: Chan-Jung HSU, Chen-Hsin HUANG, Chen-Hung CHAO, Yi-Ho CHEN, Kun-Shih LIN, Shou-Jen LIU
  • Publication number: 20230266637
    Abstract: An optical system is provided and includes a first optical element driving mechanism, which includes a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to a first optical element, and the first movable assembly is movable relative to the first fixed assembly. The first movable assembly includes a first movable element and a second movable element. The first driving assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis, and the first driving assembly is configured to drive the second movable element to move along a first axis, thereby driving the first movable element to move around the main axis.
    Type: Application
    Filed: October 6, 2022
    Publication date: August 24, 2023
    Inventors: Chan-Jung HSU, Chen-Hsin HUANG, Chen-Hung CHAO, Yi-Ho CHEN, Kun-Shih LIN, Shou-Jen LIU
  • Publication number: 20230269451
    Abstract: An optical system is provided and includes a first optical element driving mechanism, which includes a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to at least two first optical element, and the first movable assembly is movable relative to the first fixed assembly. The first movable assembly includes a first movable element. The first drive assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis, the first driving assembly is configured to drive the first movable element to move around the main axis, and a portion of the first driving assembly is disposed on the first movable element.
    Type: Application
    Filed: November 17, 2022
    Publication date: August 24, 2023
    Inventors: Chan-Jung HSU, Chen-Hsin HUANG, Chen-Hung CHAO, Yi-Ho CHEN, Kun-Shih LIN, Shou-Jen LIU
  • Publication number: 20230268346
    Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate having a high-voltage (HV) region and a low-voltage (LV) region; forming a base on the HV region and fin-shaped structures on the LV region; forming a first insulating around the fin-shaped structures; removing the base, the first insulating layer, and part of the fin-shaped structures to form a first trench in the HV region and a second trench in the LV region; forming a second insulating layer in the first trench and the second trench; and planarizing the second insulating layer to form a first shallow trench isolation (STI) on the HV region and a second STI on the LV region.
    Type: Application
    Filed: March 21, 2022
    Publication date: August 24, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ya Chiu, Chih-Kai Hsu, Ssu-I Fu, Yu-Hsiang Lin, Chien-Ting Lin, Chia-Jung Hsu, Chin-Hung Chen
  • Publication number: 20230266603
    Abstract: An optical system is provided and includes a first optical element driving mechanism, which includes a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to a first optical element, and the first movable assembly is movable relative to the first fixed assembly. The first movable assembly includes a first movable element and a second movable element. The first driving assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis, and when viewed along the main axis, a portion of the first movable element overlaps the second movable element.
    Type: Application
    Filed: September 2, 2022
    Publication date: August 24, 2023
    Inventors: Chan-Jung HSU, Chen-Hsin HUANG, Chen-Hung CHAO, Yi-Ho CHEN, Kun-Shih LIN, Shou-Jen LIU
  • Publication number: 20230266561
    Abstract: An optical system is provided and includes a first optical element driving mechanism, which includes a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to a first optical element, and the first movable assembly is movable relative to the first fixed assembly. The first movable assembly includes a first movable element. The first drive assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis, and the first driving assembly is configured to drive the first movable element to move around the main axis.
    Type: Application
    Filed: August 5, 2022
    Publication date: August 24, 2023
    Inventors: Chan-Jung HSU, Chen-Hsin HUANG, Chen-Hung CHAO, Yi-Ho CHEN, Kun-Shih LIN, Shou-Jen LIU
  • Publication number: 20230268424
    Abstract: A method for fabricating a semiconductor device includes the steps of providing a substrate having a high-voltage (HV) region and a low-voltage (LV) region, forming first fin-shaped structures on the HV region, and then performing an oxidation process to form a gate oxide layer on and directly connecting the first fin-shaped structures. Preferably, a bottom surface of the gate oxide layer includes first bumps on the first fin-shaped structures while a top surface of the gate oxide layer includes second bumps.
    Type: Application
    Filed: March 28, 2022
    Publication date: August 24, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Jung Hsu, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chin-Hung Chen, Yu-Hsiang Lin, Chien-Ting Lin
  • Publication number: 20230261108
    Abstract: The disclosure discloses a manufacturing method for high-voltage transistor. The manufacturing method comprises: providing a substrate; forming a recess in the substrate; forming an epitaxial doped structure with a first conductivity type in the recess of the substrate, wherein a top portion of the epitaxial doped structure comprises a top undoped epitaxial layer; forming a gate structure on the substrate and at least overlapping with the top undoped epitaxial layer; and forming a source/drain region with a second conductivity type in the epitaxial doped structure on a side of the gate structure. The first conductivity type is different from the second conductivity type.
    Type: Application
    Filed: April 24, 2023
    Publication date: August 17, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Ya Chiu, Chih-Kai Hsu, Chin-Hung Chen, Chia-Jung Hsu, Ssu-I Fu, Yu-Hsiang Lin
  • Patent number: 11721770
    Abstract: A manufacturing method of a semiconductor device includes the following steps. An opening is formed penetrating a dielectric layer on a semiconductor substrate. A stacked structure is formed on the dielectric layer. The stacked structure includes a first semiconductor layer partly formed in the opening and partly formed on the dielectric layer, a sacrificial layer formed on the first semiconductor layer, and a second semiconductor layer formed on the sacrificial layer. A patterning process is performed for forming a fin-shaped structure including the first semiconductor layer, the sacrificial layer, and the second semiconductor layer. An etching process is performed to remove the sacrificial layer in the fin-shaped structure. The first semiconductor layer in the fin-shaped structure is etched to become a first semiconductor wire by the etching process. The second semiconductor layer in the fin-shaped structure is etched to become a second semiconductor wire by the etching process.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: August 8, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20230240075
    Abstract: A memory cell of a charge-trapping non-volatile memory is provided. The memory cell is formed on a well region of a semiconductor substrate. The memory cell includes a storage transistor. A gate structure of the storage transistor includes a first tunneling layer, a second tunneling layer, a trapping layer, a blocking layer and a gate layer. The first tunneling layer is contacted with a surface of the well region. The second tunneling layer covers the first tunneling layer. The trapping layer covers the second tunneling layer. The blocking layer covers the trapping layer. The gate layer covers the blocking layer. The second tunneling layer has gradient nitrogen distribution. A first nitrogen concentration of a first region of the second tunneling layer close to the first tunneling layer is lower than a second nitrogen concentration of a second region of the second tunneling layer close to the trapping layer.
    Type: Application
    Filed: January 9, 2023
    Publication date: July 27, 2023
    Inventors: Chun-Hsiao LI, Tsung-Mu LAI, Cheng-Yen SHEN, Chia-Jung HSU
  • Patent number: 11710778
    Abstract: A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: July 25, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20230228619
    Abstract: An optical sensor module and a packaging method thereof are disclosed, wherein the optical sensor module comprises a substrate having a light sensing element; and a housing made of a transparent material. The housing is connected to the substrate and covers the light sensing element. The housing has a light-receiving area facing the light sensing element, and the inner surface of the housing toward the substrate is provided with a light-shielding coating in a portion outside of the light-receiving area. In this way, optical components such as the light sensor can be effectively protected, and still retain the effect of avoiding noise light interference with the light sensor module.
    Type: Application
    Filed: December 16, 2022
    Publication date: July 20, 2023
    Inventors: YU-MIN LIN, FENG-JUNG HSU
  • Publication number: 20230203367
    Abstract: A luminescence conversion material is provided. The luminescence conversion material includes: a hybrid luminescence conversion particle, a first cladding material covering the hybrid luminescence conversion particle, and a second cladding material formed on the first cladding material and covering the first cladding material. The hybrid luminescence conversion particle includes a matrix and a plurality of quantum dots uniformly dispersed in the matrix. The first cladding material includes silicon oxide. The ratio ? (absorbance ratio ?: A939/A1000-1150) of the absorbance at 939 cm?1 (A939) to the absorbance peak at 1000-1150 cm?1 (A1000-1150) in a FTIR spectrum of the first cladding material is less than or equal to 0.8.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chin-Cheng WENG, Ming-Chang LI, Po-Jung HSU
  • Publication number: 20230197523
    Abstract: A method for fabricating a semiconductor device includes first providing a substrate having a high-voltage (HV) region, a medium-voltage (MV) region, and a low-voltage (LV) region, forming a HV device on the HV region, and forming a LV device on the LV region. Preferably, the HV device includes a first base on the substrate, a first gate dielectric layer on the first base, and a first gate electrode on the first gate dielectric layer. The LV device includes a fin-shaped structure on the substrate, and a second gate electrode on the fin-shaped structure, in which a top surface of the first gate dielectric layer is even with a top surface of the fin-shaped structure.
    Type: Application
    Filed: January 27, 2022
    Publication date: June 22, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Yu-Hsiang Lin, Chien-Ting Lin, Chun-Ya Chiu, Chia-Jung Hsu, Chin-Hung Chen