Patents by Inventor Jung Wang

Jung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR CALCULATING CONFIRMATION RELIABILITY FOR BLOCKCHAIN BASED TRANSACTION AND BLOCKCHAIN NETWORK MONITORING SYSTEM FOR PERFORMING THE METHOD
    Publication number: 20180293583
    Abstract: Provided is a method comprising acquiring information on a branch formed on blockchain data, calculating a difference in a block height between a target block corresponding to a current block height of the blockchain data and a block in a non-branched state based on the information on the branch and calculating a transaction confirmation reliability of transaction data recorded in the target block based on the difference in the block height, wherein the transaction confirmation reliability indicates a probability that, for as k blocks are further connected after the target block, a position of the block at which the transaction data is recorded will not change, wherein k is an integer greater than zero.
    Type: Application
    Filed: March 23, 2018
    Publication date: October 11, 2018
    Applicant: SAMSUNG SDS CO., LTD.
    Inventors: Ji Hwan RHIE, Hee Jung WANG, Kwang Wook LEE, Dong Hoe KIM, Seung Won SON
  • DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20180270961
    Abstract: A display device is provided. The display device includes a display panel, a flexible circuit board, an integrated circuit, and a conductive layer. The flexible circuit board is electrically connected with the display panel and includes a plurality of conductive wires. The integrated circuit is disposed on the flexible circuit board and has a plurality of bumps. The conductive layer is disposed between the integrated circuit and the flexible circuit board and covers a periphery of the integrated circuit. In addition, the conductive layer includes an adhesive and a plurality of conductive particles distributed in the adhesive. Moreover, the bumps are electrically connected with the conductive wires through the conductive particles.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 20, 2018
    Applicant: Innolux Corporation
    Inventors: Wei-Cheng Chu, Chia-Cheng Liu, Chih-Yuan Lee, Chin-Lung Ting, Tong-Jung Wang
  • SOFTWARE RISK EVALUATION SYSTEM AND METHOD THEREOF
    Publication number: 20180260558
    Abstract: A software risk evaluation system and method thereof are provided. The software risk evaluation system includes a computer system and a server. The computer system executes a software risk evaluation program to perform the steps of: scanning the computer system to obtain a software installation list of software installed on the computer system; obtaining a software risk management file from the server; setting a risk level for each software on the software installation list according to the software risk management file; adjusting the risk level of each software on the software installation list according to software asset management data and the software risk management file; and generating a software risk evaluation report according to the adjusted risk level of each software on the software installation list.
    Type: Application
    Filed: August 14, 2017
    Publication date: September 13, 2018
    Inventors: Tu-Jung LI, Chen-Chung LEE, Mei-Jung WANG, Hung-Yu YANG, Ming-Jen CHEN, Chia-Hung LIN
  • SOLAR TRACKING DEVICE
    Publication number: 20180234047
    Abstract: A solar tracking device includes a base, a first driving member, a turntable, a translating plate, a second driving member and a solar panel stand. The first driving member includes a first rotary gear. The turntable has an outer gear ring and a track. The outer gear ring is engaged with the first rotary gear to drive the turntable to rotate with respect to the base. The translating plate is accommodated in the track. The second driving member includes a second rotary gear installed at the translating plate and engaged with the track to drive the translating plate to move horizontally along the track. The solar panel stand includes a main frame and first and second link rod frames. The main frame is driven by the first and second link rod frames to adjust the angle of elevation with respect to the translating plate.
    Type: Application
    Filed: February 12, 2017
    Publication date: August 16, 2018
    Inventors: Tzu WANG, Pie-Jung WANG
  • Ultrasound imaging system and method thereof, and beamforming circuit
    Patent number: 10048360
    Abstract: An ultrasound imaging system includes a beam receiving circuit and a back-end circuit. The beam receiving circuit receives a plurality of digitized echo signals. The back-end circuit is coupled to the beam receiving circuit for outputting a plurality of compressed delay timing parameters corresponding to a plurality of channels to the beam receiving circuit. The beam receiving circuit decompresses the compressed delay timing parameters into a plurality of delay timing parameters, and processes the digitized echo signals into an ultrasound beamforming value according to the delay timing parameters corresponding to the channels. The back-end circuit synthesizes an ultrasound image according to the ultrasound beamforming value outputted from the beam receiving circuit.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: August 14, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chi Chang, Yi-Jung Wang, Guo-Zua Wu, Oscal Tzyh-Chiang Chen, Chien-Ju Li, Ji-Da Chen
  • Semiconductor structure and manufacturing method thereof
    Patent number: 10020239
    Abstract: A semiconductor structure includes a substrate comprising a die pad disposed over the substrate, and a passivation disposed over the substrate and surrounding the die pad, a redistribution layer (RDL) comprising a dielectric layer disposed over the passivation and an interconnect structure disposed within the dielectric layer and electrically connecting with the die pad, a conductive bump disposed over and electrically connected with the interconnect structure; and an isolation layer surrounding the substrate and the RDL.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: July 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Pei-Haw Tsao, Chien-Jung Wang
  • DISPLAY DEVICE
    Publication number: 20180166525
    Abstract: A display is provided. The display device includes a display area and a non-display area located around the display area; a base layer; an organic light-emitting diode (OLED) that is located on the base layer in the display area; and a first crack detection line that is located on the base layer in the non-display area; wherein the first crack detection line comprises a first line that extends substantially in a first direction along a first edge of the display area, a second line that is separated from the first line and extends substantially in the first direction, and a third line that is connected to an end of the first line and an end of the second line, wherein a cross-sectional shape of the first line in a second direction crossing the first direction is inversely tapered.
    Type: Application
    Filed: June 2, 2017
    Publication date: June 14, 2018
    Inventors: Hun KIM, Yong Jin KIM, Soon Jung WANG, Keun Soo LEE, Jae Ho LEE, Kyung Chan CHAE
  • HEAT DISSIPATION DEVICE FOR LAMP
    Publication number: 20180156441
    Abstract: A heat dissipation device for a lamp includes a housing, a heat sink module and a light source module. The housing includes an opening. The heat sink module is received in the housing. The heat sink module includes a heat sink member which has a substrate. The substrate includes a first area and a second area surrounding a perimeter of the first area. One side of the first area includes an installation surface, and first hollow tubes extend from the other side of the first area. Second hollow tubes extend from two opposite sides of the second area. The light source module is thermally adhered to the installation surface and exposed from the opening. The heat of the light source module is expelled to the outside by means of the first hollow tubes and the second hollow tube to achieve excellent heat dissipation.
    Type: Application
    Filed: October 25, 2017
    Publication date: June 7, 2018
    Inventors: Tzu WANG, Pieh-Jung WANG
  • METHOD OF FORMING BANDGAP REFERENCE INTEGRATED CIRCUIT
    Publication number: 20180145067
    Abstract: A method of forming an integrated circuit comprises forming a first doped region and a second doped region in a substrate. The second doped region is formed separate from the first doped region by a first spacing. A dielectric layer is formed over the substrate, and a gate is formed over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate, opposite the first substrate side of the gate. A third doped region is formed in the substrate separated from the first doped region by a second spacing. The method further comprises forming a fourth doped region in the substrate.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 24, 2018
    Inventors: Chewn-Pu JOU, Chien-Jung WANG
  • Circuit with a droop compensating mechanism
    Patent number: 9972995
    Abstract: A method includes charging a capacitor connected to an input node, gradually decreasing an output voltage at an output node, and electrically connecting the input node to the output node. A circuit that performs the method is also disclosed. A system that includes the circuit is also disclosed.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: May 15, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company LImited
    Inventors: Chewn-Pu Jou, Huan-Neng Chen, Chien-Jung Wang
  • Semiconductor device and manufacturing method thereof
    Patent number: 9882013
    Abstract: Provided is a semiconductor device including a gate electrode, source and drain regions, and a spacer. The gate electrode is located over a substrate, and an angle of a base corner of the gate electrode is greater than 90 degrees. The source and drain regions are located in the substrate at sides of the gate electrode. The spacer is located at a sidewall of the gate electrode.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: January 30, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jung-Wang Lu, Kuo Hui Chang, Mu-Tsang Lin
  • Bandgap reference circuit
    Patent number: 9876008
    Abstract: An integrated circuit comprises a first doped region and a second doped region in a substrate. The second doped region is separated from the first doped region by a first spacing. The integrated circuit further comprises a dielectric layer over the substrate and a gate over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate opposite the first substrate side of the gate. The integrated circuit also comprises a third doped region in the substrate separated from the first doped region by a second spacing. The integrated circuit further comprises a fourth doped region in the substrate. The gate and the third doped region are coupled with a first voltage supply, and the fourth doped region is coupled with a second voltage supply.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chewn-Pu Jou, Chien-Jung Wang
  • INTERNET MULTIMEDIA SYSTEM BASED ON UNIFORM RESOURCE LOCATOR
    Publication number: 20180020260
    Abstract: The present invention relates to an internet multimedia system. The internet multimedia system includes a remote server comprising a backend application program, wherein the backend application program is built as a web-based platform, accessed by a browser and provides a program playlist comprising a plurality of arranged uniform resource locators; and a local device connected with the remote server through an internet and comprising a frontend application program and the browser for providing a user to operate the backend application program through the browser, wherein the frontend application program installs and executes on the local device and accesses the program playlist through the backend application program.
    Type: Application
    Filed: July 11, 2017
    Publication date: January 18, 2018
    Inventors: Jui-Chi JAO, Feng-Liang LEE, Chen-Da TSAI, Tsung-Jung WANG, Feng-Chi YU
  • Field effect transistor and manufacturing method thereof
    Patent number: 9871123
    Abstract: A field effect transistor (FET) and a manufacturing method thereof are provided. The FET includes a substrate, a fin bump, an insulating layer, a charge trapping structure and a gate structure. The fin bump is disposed on the substrate. The insulating layer is disposed on the substrate and located at two sides of the fin bump. The charge trapping structure is disposed on the insulating layer and located at least one side of the fin bump. A cross-section of the charge trapping structure is L-shaped. The gate structure covers the fin bump and the charge trapping structure.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: January 16, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • Method of Manufacturing a Functional Fabric
    Publication number: 20170368841
    Abstract: A method of manufacturing a functional fabric includes the steps of: (a) providing an undyed base fabric having a top surface and a bottom surface opposite to the top surface; (b) forming a moisture-permeable waterproof layer on the top surface of the base fabric; and (c) forming at least one pattern layer on at least one of the moisture-permeable waterproof layer or the bottom surface of the base fabric.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 28, 2017
    Inventors: Hung-Jung Wang, Szu-Kai Wang
  • Headset apparatus
    Patent number: 9838774
    Abstract: A headset apparatus including an audio transmitter, a control circuit, a magnetic field generator and a magnetic field sensor is provided. The control circuit is configured to generate a test signal. The magnetic field generator is coupled to the control circuit to receive the test signal and generate a magnetic field accordingly. The magnetic field sensor is coupled to the control circuit and configured to sense the magnetic field and generate a sensing signal accordingly. When the control circuit detects that the magnetic field is changed based on the sensing signal, the control circuit generates a control signal to enable the audio transmitter.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: December 5, 2017
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Chun-Yuan Lee, Tsu-Jung Wang, Hung-Yuan Li, Chien-Min Yao
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20170288032
    Abstract: Provided is a semiconductor device including a gate electrode, source and drain regions, and a spacer. The gate electrode is located over a substrate, and an angle of a base corner of the gate electrode is greater than 90 degrees. The source and drain regions are located in the substrate at sides of the gate electrode. The spacer is located at a sidewall of the gate electrode.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Jung-Wang Lu, Kuo Hui Chang, Mu-Tsang Lin
  • METHOD FOR MAKING A COATED FABRIC
    Publication number: 20170274579
    Abstract: A method for making a coated fabric includes the steps of: applying a coating solution of a resin in an organic solvent to a roller-conveyed non-stretchable and releasable substrate web to form a coating layer; laminating a roller-conveyed base fabric to the coating layer to form a laminate; guiding the laminate to pass through at least one tank containing water to immerse the laminate in water such that the coating layer is solidified and the organic solvent contained in the coating layer is replaced by water; and removing water from the coating layer by drying to leave micropores in the coating layer.
    Type: Application
    Filed: March 28, 2016
    Publication date: September 28, 2017
    Inventor: Hung-Jung Wang
  • Battery charger
    Patent number: D806019
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: December 26, 2017
    Assignee: Gogoro Inc.
    Inventors: Yu-Jung Wang, Chen-Hsin Hsu, Chi-Chun Chen, Chien-Chih Weng, Chi-Wang Lien
  • Battery charger
    Patent number: D820782
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: June 19, 2018
    Assignee: Gogoro Inc.
    Inventors: Yu-Jung Wang, Chen-Hsin Hsu, Chi-Chun Chen, Chien-Chih Weng, Chi-Wang Lien