Patents by Inventor Jung Wang

Jung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BANDGAP REFERENCE CIRCUIT
    Publication number: 20160049912
    Abstract: An integrated circuit comprises a first doped region and a second doped region in a substrate. The second doped region is separated from the first doped region by a first spacing. The integrated circuit further comprises a dielectric layer over the substrate and a gate over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate opposite the first substrate side of the gate. The integrated circuit also comprises a third doped region in the substrate separated from the first doped region by a second spacing. The integrated circuit further comprises a fourth doped region in the substrate. The gate and the third doped region are coupled with a first voltage supply, and the fourth doped region is coupled with a second voltage supply.
    Type: Application
    Filed: August 13, 2014
    Publication date: February 18, 2016
    Inventors: Chewn-Pu JOU, Chien-Jung WANG
  • CIRCUIT WITH A DROOP COMPENSATING MECHANISM
    Publication number: 20160013633
    Abstract: A method includes charging a capacitor connected to an input node, gradually decreasing an output voltage at an output node, and electrically connecting the input node to the output node. A circuit that performs the method is also disclosed. A system that includes the circuit is also disclosed.
    Type: Application
    Filed: September 25, 2015
    Publication date: January 14, 2016
    Inventors: Chewn-Pu Jou, Huan-Neng Chen, Chien-Jung Wang
  • Method For Preparing Instant Noodle, Flour Composition For Instant Noodle And Use Thereof
    Publication number: 20160007617
    Abstract: A method for preparing an instant noodle, a flour composition for an instant noodle, and an instant noodle are disclosed. The method for preparing the instant noodle includes preprocessing a non-wheat cereal to form processed non-wheat cereal flour. The method further includes providing a non-wheat cereal component having the processed non-wheat cereal flour, and mixing the non-wheat cereal component with a wheat component to form a flour composition. The amount of the non-wheat cereal component is at least 50 weight percent of the total weight of the flour composition, and the amount of the wheat component is 7.5-50 weight percent of the total weight of the flour composition. The flour composition is then formed into the instant noodle.
    Type: Application
    Filed: January 30, 2015
    Publication date: January 14, 2016
    Inventor: Shing-Jung Wang
  • Method of forming trench in semiconductor substrate
    Patent number: 9214384
    Abstract: The present invention provides a method of forming a trench in a semiconductor substrate. First, a first patterned mask layer is formed on a semiconductor substrate. The first patterned mask layer has a first trench. Then, a material layer is formed along the first trench. Then, a second patterned mask layer is formed on the material layer to completely fill the first trench. A part of the material layer is removed when the portion of the material layer between the second patterned mask layer and the semiconductor substrate is maintained so as to form a second trench. Lastly, an etching process is performed by using the first patterned mask layer and the second patterned mask layer as a mask.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: December 15, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • SLEEVE-TYPE HEAT DISSIPATER FOR LAMP
    Publication number: 20150285482
    Abstract: A sleeve-type heat dissipater for a lamp includes: a heat conduction module which includes a heat conduction base, a first heat pipe, a second heat pipe and a press plate; a first heat dissipation member which includes a primary tubular body and a plurality of secondary tubular bodies annularly arranged at the outer periphery of the primary tubular body, two ends of the first heat pipe are respectively received in each of the secondary tubular bodies; and a second heat dissipation member which is detachably sleeved with the heat conduction module and the first heat dissipation member, and formed with a pair of accommodation slots respectively allowing two ends of the second heat pipe to be accommodated. Accordingly, the heat dissipater provided by the present invention can be coordinately adjusted with respect to the lamp with different power for providing an optimal heat dissipation effect.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 8, 2015
    Inventors: Tzu Wang, Pie-Jung Wang
  • Replacement LED lamp module for street light
    Patent number: 9103515
    Abstract: A replacement LED lamp module for a street light includes a heat dissipating cover (10), a driver (20), and an LED module (30). The heat dissipating cover (10) has a receiving cavity (14) and a receiving recess (15) disposed inward of a bottom of the heat dissipating cover (10). The driver (20) is installed in the receiving cavity (14). The LED module (30) is disposed corresponding to the receiving recess (15) and fixed to the heat dissipating cover (10); the LED module (30) is electrically connected to the driver (20). Thus, the replacement of the LED lamp module can be achieved without affecting the main structure of the conventional street light.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: August 11, 2015
    Assignee: HABEMIT INTERNATIONAL CO. LTD.
    Inventors: Tzu Wang, Pie-Jung Wang
  • PATTERNED STRUCTURE OF SEMICONDUCTOR DEVICE
    Publication number: 20150179652
    Abstract: A patterned structure of a semiconductor device includes a substrate, at least a first patterned structure, and at least a second patterned structure. The first patterned structure is a single-layered structure, and the second patterned structure is a multi-layered structure. The width of the second patterned structure is greater than the width of the first patterned structure.
    Type: Application
    Filed: March 5, 2015
    Publication date: June 25, 2015
    Inventors: Chih-Jung Wang, Tong-Yu Chen
  • FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF
    Publication number: 20150171194
    Abstract: A field effect transistor (FET) and a manufacturing method thereof are provided. The FET includes a substrate, a fin bump, an insulating layer, a charge trapping structure and a gate structure. The fin bump is disposed on the substrate. The insulating layer is disposed on the substrate and located at two sides of the fin bump. The charge trapping structure is disposed on the insulating layer and located at at least one side of the fin bump. A cross-section of the charge trapping structure is L-shaped. The gate structure covers the fin bump and the charge trapping structure.
    Type: Application
    Filed: March 3, 2015
    Publication date: June 18, 2015
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • Illumination Control System and Illumination Control Method
    Publication number: 20150138433
    Abstract: An illumination control method and an illumination control system for controlling at least one illuminating device are disclosed. The illumination control method includes following steps: capturing an image through an image capturing device; analyzing a characteristic of the image; and generating a first control signal.
    Type: Application
    Filed: March 31, 2014
    Publication date: May 21, 2015
    Applicant: Gunitech Corp.
    Inventors: Chi-Jung Wang, Huan-Ruei Shiu, Po-Kuei Chou, Yueh-Chang Wu, Ming-Chuan Tsai, Ya-Chi Tseng, Yu-Feng Chen, Chien-Ju Hung
  • Light Control System and Light Control Method Thereof
    Publication number: 20150137708
    Abstract: A light control system and a light control method thereof are disclosed. The light control system is used for controlling a light-emitting device. The light control system includes an ambient status sensing module, a storage module, a controlling module, and a driver module. The ambient status sensing module is used for sensing an ambient state to generate an ambient state value. The storage module has a database for storing a plurality of parameter values, wherein the plurality of parameter values are corresponded to a plurality of ambient state values. The controlling module is used for searching the plurality of parameter values stored within the database according to the ambient state value, so as to generating a controlling signal. The driver module is used for driving the light-emitting device according to the control signal.
    Type: Application
    Filed: April 8, 2014
    Publication date: May 21, 2015
    Applicant: Gunitech Corp.
    Inventors: Chi-Jung Wang, Huan-Ruei Shiu, Po-Kuei Chou, Yueh-Chang Wu, Ming-Chuan Tsai, Ya-Chi Tseng, Yu-Feng Chen, Chien-Ju Hung
  • POWER MANAGEMENT DEVICE AND METHOD
    Publication number: 20150123875
    Abstract: A power management device and method are provided. The power management device for a flip electrical device, which has a lid part and a main part, includes: a sensing unit, configured to detect whether the lid part and the main part are overlapped, and generate a notification signal when the lid part and the main part are overlapped; an operation unit, configured to detect whether the flip electrical device is connected to an external display device according to the notification signal, and generate a detecting result, and when a defined condition is conformed, the operation unit is operated in an operating mode and transmits image data to the external display device, wherein the defined condition includes a set function being enabled, and the detecting result is that the flip electrical device is connected to the external display device.
    Type: Application
    Filed: April 18, 2014
    Publication date: May 7, 2015
    Applicant: Wistron Corp.
    Inventor: Tsung-Jung Wang
  • Processes for preparing of glucopyranosyl-substituted benzyl-benzene derivatives
    Patent number: 9024010
    Abstract: The present invention relates to processes for preparing a glucopyranosyl-substituted benzyl-benzene derivative of general formula III, wherein R1 is defined according to claim 1.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: May 5, 2015
    Assignee: Boehringer Ingelheim International GmbH
    Inventors: Dirk Weber, Tobias Fiedler, Christian Filser, Rainer Hamm, Simone Orlich, Matthias Post, Svenja Renner, Xiao-Jung Wang, Thomas Wirth
  • Method of Forming Trench in Semiconductor Substrate
    Publication number: 20150111385
    Abstract: The present invention provides a method of forming a trench in a semiconductor substrate. First, a first patterned mask layer is formed on a semiconductor substrate. The first patterned mask layer has a first trench. Then, a material layer is formed along the first trench. Then, a second patterned mask layer is formed on the material layer to completely fill the first trench. A part of the material layer is removed when the portion of the material layer between the second patterned mask layer and the semiconductor substrate is maintained so as to form a second trench. Lastly, an etching process is performed by using the first patterned mask layer and the second patterned mask layer as a mask.
    Type: Application
    Filed: December 24, 2014
    Publication date: April 23, 2015
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • Field effect transistor and manufacturing method thereof
    Patent number: 9012975
    Abstract: A field effect transistor (FET) and a manufacturing method thereof are provided. The FET includes a substrate, a fin bump, an insulating layer, a charge trapping structure and a gate structure. The fin bump is disposed on the substrate. The insulating layer is disposed on the substrate and located at two sides of the fin bump. The charge trapping structure is disposed on the insulating layer and located at at least one side of the fin bump. A cross-section of the charge trapping structure is L-shaped. The gate structure covers the fin bump and the charge trapping structure.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: April 21, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • Patterned structure of semiconductor device and fabricating method thereof
    Patent number: 9006107
    Abstract: A method for fabricating a patterned structure in a semiconductor device is provided. First, a substrate with a first region and a second region is provided. Then, a plurality of sacrificial patterns is respectively formed within the first region and the second region. A first spacer is then formed on the sidewalls of each of the sacrificial patterns followed by forming a mask layer to cover the sacrificial patterns located within the first region. Finally, the first spacer exposed from the mask layer is trimmed to be a second spacer and the mask layer is then removed.
    Type: Grant
    Filed: March 11, 2012
    Date of Patent: April 14, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Jung Wang, Tong-Yu Chen
  • Automatic software audit system and associated method
    Patent number: 8997244
    Abstract: An automatic software audit system includes a client and a server. The client includes a network interface, a software installation record database, a software audit rule database, a software release database and a central processing unit (CPU). The network interface is coupled to the client. The software installation record databases stores a software installation record of the client. The software audit rule database stores a software audit rule. The software release database stores a software release record of the client. The CPU installs an agent program to the client to collect the software installation record, and generates a software audit result of the client according to the software installation record, the software audio rule and the software release record.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: March 31, 2015
    Assignee: Quanta Computer Inc.
    Inventors: Tien-Chin Fang, Chen-Chung Lee, Ping-Chi Lai, Chia-Hung Lin, Cheng-Yao Wang, His-Chieh Hsu, Mei-Jung Wang, Hung-Yu Yang, Wei-Chi Tai
  • Magnetic separation unit, magnetic separation device and method for separating magnetic substance in bio-samples
    Patent number: 8993342
    Abstract: A magnetic separation unit is provided, including a first member made of non-magnetic materials comprising a trench extending within the first member and a second member made of magnetic materials including a protrusion portion protruding over a surface of the second member, wherein the first member connects the second member such that the trench functions as a fluid channel formed between the first and second members, and the protrusion portion of the second member is contained by the trench of the first member.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: March 31, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Mean-Jue Tung, Yu-Ting Huang, Li-Kou Chen, Yi-Shan Lin, Hsiang-Ming Huang, Shinn-Zong Lin, Woei-Cherng Shyu, Hsiao-Jung Wang
  • Method of forming trench in semiconductor substrate
    Patent number: 8946078
    Abstract: The present invention provides a method of forming a trench in a semiconductor substrate. First, a first patterned mask layer is formed on a semiconductor substrate. The first patterned mask layer has a first trench. Then, a material layer is formed along the first trench. Then, a second patterned mask layer is formed on the material layer to completely fill the first trench. A part of the material layer is removed when the portion of the material layer between the second patterned mask layer and the semiconductor substrate is maintained so as to form a second trench. Lastly, an etching process is performed by using the first patterned mask layer and the second patterned mask layer as a mask.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: February 3, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Tong-Yu Chen, Chih-Jung Wang
  • Method for fabricating MOS device
    Patent number: 8946031
    Abstract: A method for fabricating a MOS device is described. A first hard mask layer is formed over a substrate. The first hard mask layer is patterned and a portion of the substrate removed to form a first patterned hard mask, and a fin structure surrounded by a trench and extending in a first direction. An insulating layer is formed at the trench bottom. A gate conductive layer is formed on the insulating layer, extending in a second direction. A first implant process is performed using the first patterned hard mask as a mask to form first S/D extension regions in the sidewalls of the fin structure. The first patterned hard mask is removed to expose the top of the fin structure, and then a second implant process is performed to form second S/D extension region therein.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: February 3, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Jung Wang, Tong-Yu Chen
  • Charger for electronic devices
    Patent number: D730825
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: June 2, 2015
    Assignee: Aver Information Inc.
    Inventors: Yu-Jung Wang, Yu-Ching Liao