Patents by Inventor Jung-Woo Park

Jung-Woo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120112708
    Abstract: The present invention relates to a control device for a doubly-fed induction generator in which a feedback linearization method is enabled and further provides a control device for a doubly-fed induction generator in which a feedback linearization method is embedded, characterized in that the control device divides and measures positive sequency components and negative sequency components from stator voltage and current, rotor voltage and current, and signals of stator magnetic flux and rotor magnetic flux of the doubly-fed induction generator.
    Type: Application
    Filed: December 27, 2010
    Publication date: May 10, 2012
    Applicant: Korea Electrotechnology Research Institute
    Inventors: Jung Woo Park, Dae Wook Kang, Ji Woo Moon, Jin Soo Kwon, Deuk Woo Pae, Chang Hun Oh
  • Patent number: 8124478
    Abstract: A method for fabricating a flash memory device includes forming a control gate having a hollow donut shape over an insulation layer formed over a substrate. The method also includes forming an inter-poly dielectric of a spacer shape on an inner wall of the control gate, filling a conductive layer for a floating gate between the spacer shaped inter-poly dielectrics, and forming an interlayer insulation layer over a resulting product formed with the conductive layer for a floating gate. The method further includes removing a center portion of the conductive layer for a floating gate to form an opening, forming a tunnel insulation layer on an inner face of the opening, and filling with a semiconductor layer the opening formed with the tunnel insulation layer to form an active region.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: February 28, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jung Woo Park, Sung Yoon Cho
  • Patent number: 8089638
    Abstract: The present invention relates to a stage with a displacement measuring means capable of measuring a displacement, and more particularly, to a stage provided with a displacement magnification means capable of magnifying a displacement so as to precisely measure a minute displacement on the order of nanometers. A stage according to an aspect of the present invention comprises a fixed base, a movable table, a first elastic support, a first actuator, a first displacement converting means and a first displacement measuring means. The movable table is installed to be movable with respect to the fixed base. The first elastic support supports the movable table with respect to the fixed base, and the first actuator generates a displacement of the movable table in one direction.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: January 3, 2012
    Inventors: Deug Woo Lee, Soo Chang Choi, Jung Woo Park
  • Publication number: 20110227080
    Abstract: A flat panel display includes; a first substrate, a white reflective layer disposed on the first substrate, a pixel electrode disposed on the white reflective, a second substrate disposed facing the first substrate, a common electrode disposed on the second substrate, and an electrooptic layer disposed between the pixel electrode and the common electrode, wherein the white reflective layer includes at least one of TiO2 and BaSO4.
    Type: Application
    Filed: March 2, 2011
    Publication date: September 22, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Nam-Seok ROH, Jung-Woo PARK, Dae-Jin PARK, Yu-Jin KIM, Joo-Han BAE, Tae-Hyung HWANG, Seok-Joon HONG
  • Publication number: 20110198688
    Abstract: A semiconductor device includes an active region including a surface region and a first recess formed below the surface region, the active region extending along a first direction; a device isolation structure provided on an edge of the active region; a gate line traversing over the surface region of the active region along a second direction orthogonal to the first direction; a second recess formed in the device isolation structure to receive a given portion of the gate line into the second recess; a first junction region formed in the active region beneath the first recess and on a first side of the gate line; and a second junction region formed on a second side of the gate line and above the first junction region. The first and second junction regions define a vertical-type channel that extends along lateral and vertical directions.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 18, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventor: Jung-Woo PARK
  • Publication number: 20110156118
    Abstract: A method for fabricating a semiconductor substrate includes defining an active region by forming a device isolation layer over the substrate, forming a first trench dividing the active region into a first active region and a second active region, forming a buried bit line filling a portion of the first trench, forming a gap-filling layer gap-filling an upper portion of the first trench over the buried bit line, forming second trenches by etching the gap-filling layer and the device isolation layer in a direction crossing the buried bit line, and forming a first buried word line and a second buried word line filling the second trenches, wherein the first buried word line and the second buried word line are shaped around sidewalls of the first active region and the second active region, respectively.
    Type: Application
    Filed: July 6, 2010
    Publication date: June 30, 2011
    Inventor: Jung-Woo Park
  • Publication number: 20110150138
    Abstract: A direct conversion receiver includes: a high linearity mixer device including a sampler unit charge-sampling an input current according to a sampling frequency, and a buffer unit receiving an output signal from the sampler unit while having a low input impedance, amplifying the received signal, and outputting a current signal; and a filter device decimating an output signal from the mixer device and FIR-filtering the decimated signal.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 23, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jung Woo PARK, Young Jae Lee, Hyun Kyu Yu, Byung Hun Min, Seong Do Kim, Hoai Nam Nguyen, Sang Gug Lee
  • Publication number: 20110123729
    Abstract: A display substrate includes a gate line disposed on a substrate, a data line crossing the gate line, a thin-film transistor electrically connected to the gate line and the data line, a light blocking layer disposed on the substrate and the thin-film transistor, where the light blocking layer blocks light and includes at least one selected from the group consisting of a zinc oxide, a copper oxide and a zinc-copper-oxide composite, and a pixel electrode electrically connected to the thin-film transistor.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 26, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Myoung Lee, Tae-Hyung Hwang, Jung-Woo Park, Kyung-Tae Chae, Hyung-Il Jeon, Seok-Joon Hong
  • Publication number: 20110093811
    Abstract: Provided is a system and method for performing an auto scroll. The system for performing the auto scroll may include an auto scroll determination unit to determine whether to perform the auto scroll on a page, an auto scroll performing unit to perform the auto scroll on the page so that a main text of the page may be obtained with focus, and a page providing unit to output the auto scrolled page. According to exemplary embodiments of the present invention, even though a user does not manually scroll to data of the page to be viewed, the data of the page may automatically be scrolled so that the data may be obtained with focus.
    Type: Application
    Filed: October 15, 2010
    Publication date: April 21, 2011
    Applicant: NHN CORPORATION
    Inventors: Jung Woo PARK, Woong Sub KIM, Kee Duk PARK, Se KWON
  • Patent number: 7923334
    Abstract: A method for fabricating a semiconductor device includes the following steps. A device isolation layer with a trench type is etched in a predetermined portion of a substrate to define an active region. Predetermined portions where gate lines traverse in the device isolation layer are etched to a certain depth to form a plurality of first recesses. A pair of gate lines filling the first recesses and traversing over the active region is formed. Portions of the active region which storage nodes contact on one sides of the gate lines are etched to form a plurality of second recesses. An ion-implantation process is performed to form a plurality of first junction regions beneath the second recesses and to form a second junction region in a portion of the active region between the gate lines such that the second junction region contacts bit lines.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: April 12, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jung Woo Park
  • Patent number: 7915120
    Abstract: Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: March 29, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jung-Woo Park, Jin-Ki Jung, Kwon Hong, Ki-Seon Park
  • Patent number: 7894034
    Abstract: A thin film transistor (TFT) array panel with improved contact between the display signal lines and test lines is presented. The TFT array panel includes: gate lines and data lines intersecting each other, switching elements connected to the gate lines and the data lines, and at least one test line disposed near end portions of the gate lines or the data lines. An insulating layer covers the gate lines, the data lines and the switching elements and has first contact holes exposing the end portions of the gate lines or the data lines and second contact holes exposing the test lines. Auxiliary test lines are formed on the insulating layer and commonly connected to conductive layers, wherein the conductive layers connect at least one test line to the gate lines or the data lines via the first and the second contact holes.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jung-Woo Park
  • Publication number: 20110003448
    Abstract: A method for fabricating a semiconductor device includes the following steps. A device isolation layer with a trench type is etched in a predetermined portion of a substrate to define an active region. Predetermined portions where gate lines traverse in the device isolation layer are etched to a certain depth to form a plurality of first recesses. A pair of gate lines filling the first recesses and traversing over the active region is formed. Portions of the active region which storage nodes contact on one sides of the gate lines are etched to form a plurality of second recesses. An ion-implantation process is performed to form a plurality of first junction regions beneath the second recesses and to form a second junction region in a portion of the active region between the gate lines such that the second junction region contacts bit lines.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 6, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventor: Jung-Woo PARK
  • Publication number: 20100296035
    Abstract: A display substrate includes a transparent substrate, a pixel layer, an organic insulating layer, a transparent electrode and a reflective electrode. The pixel layer is formed on the transparent substrate, and includes a plurality of pixel parts. Each of the pixel parts includes a transmission region and a reflection region. The organic insulating layer is formed on the pixel layer. The transparent electrode is formed on the organic insulating layer corresponding to each of the pixel parts. The reflective electrode is formed on the transparent electrode corresponding to the reflection region. The reflective electrode includes a silver alloy that includes silver (Ag) and impurities having a low solubility in the silver.
    Type: Application
    Filed: August 2, 2010
    Publication date: November 25, 2010
    Inventors: Jong-Seong Kim, Sung-Hwan Cho, Ho-Nam Yum, Jae-Hyun Kim, Jung-Woo Park, Bong-Sun Seo, Seong-Chul Hong, Seong-Ho Kim
  • Publication number: 20100238636
    Abstract: A stretchable electronic circuit that includes a stretchable base substrate having a plurality of stretchable conductors formed onto a surface thereof, with both the stretchable base substrate and conductors being bendable together about two orthogonal axes. The stretchable circuit also includes a stretchable sensor layer attached to the base substrate with a cavity formed therein which has a contact point exposing one of the plurality of stretchable conductors. The stretchable electronic circuit further includes a surface mount device (SMD) package with a conductor contact protrusion installed into the cavity, and wherein a substantially constant electrical connection is established between the conductor contact protrusion and the stretchable conductor at the contact point by tensile forces interacting between the stretchable base substrate and the stretchable sensor layer.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 23, 2010
    Inventors: Stephen Mascaro, Debra Mascaro, Jumana Abu-Khalaf, Jung Woo Park
  • Publication number: 20100195039
    Abstract: In a method of manufacturing a display apparatus, an opposite substrate on which a conductive pattern is formed is coupled with a display substrate to face the display substrate, and the opposite substrate is cut to partially expose the display substrate. Since the conductive pattern is cut with the opposite substrate during the cutting of the opposite substrate, an electric resistance of the conductive pattern is changed. The change in electric resistance of the conductive pattern is detected to determine whether the opposite substrate is cut or not.
    Type: Application
    Filed: November 20, 2009
    Publication date: August 5, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventor: Jung Woo PARK
  • Patent number: 7749844
    Abstract: A semiconductor device includes an active region including a surface region and a first recess formed below the surface region, the active region extending along a first direction; a device isolation structure provided on an edge of the active region; a gate line traversing over the surface region of the active region along a second direction orthogonal to the first direction; a second recess formed in the device isolation structure to receive a given portion of the gate line into the second recess; a first junction region formed in the active region beneath the first recess and on a first side of the gate line; and a second junction region formed on a second side of the gate line and above the first junction region, wherein the first and second junction regions define a vertical-type channel that extends along lateral and vertical directions.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: July 6, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jung Woo Park
  • Publication number: 20100062581
    Abstract: Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.
    Type: Application
    Filed: April 29, 2009
    Publication date: March 11, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Jung-Woo PARK, Jin-Ki JUNG, Kwon HONG, Ki-Seon PARK
  • Publication number: 20100003795
    Abstract: A method for fabricating a flash memory device includes forming a control gate having a hollow donut shape over an insulation layer formed over a substrate. The method also includes forming an inter-poly dielectric of a spacer shape on an inner wall of the control gate, filling a conductive layer for a floating gate between the spacer shaped inter-poly dielectrics, and forming an interlayer insulation layer over a resulting product formed with the conductive layer for a floating gate. The method further includes removing a center portion of the conductive layer for a floating gate to form an opening, forming a tunnel insulation layer on an inner face of the opening, and filling with a semiconductor layer the opening formed with the tunnel insulation layer to form an active region.
    Type: Application
    Filed: June 30, 2009
    Publication date: January 7, 2010
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventors: Jung Woo Park, Sung Yoon Cho
  • Publication number: 20090323083
    Abstract: The present invention relates to a stage with a displacement measuring means capable of measuring a displacement, and more particularly, to a stage provided with a displacement magnification means capable of magnifying a displacement so as to precisely measure a minute displacement on the order of nanometers. A stage according to an aspect of the present invention comprises a fixed base, a movable table, a first elastic support, a first actuator, a first displacement converting means and a first displacement measuring means. The movable table is installed to be movable with respect to the fixed base. The first elastic support supports the movable table with respect to the fixed base, and the first actuator generates a displacement of the movable table in one direction.
    Type: Application
    Filed: December 12, 2006
    Publication date: December 31, 2009
    Inventors: Jung Woo Park, Deug Woo Lee, Soo Chang Choi