Abstract: A semiconductor device includes an active region including a surface region and a first recess formed below the surface region, the active region extending along a first direction; a device isolation structure provided on an edge of the active region; a gate line traversing over the surface region of the active region along a second direction orthogonal to the first direction; a second recess formed in the device isolation structure to receive a given portion of the gate line into the second recess; a first junction region formed in the active region beneath the first recess and on a first side of the gate line; and a second junction region formed on a second side of the gate line and above the first junction region, wherein the first and second junction regions define a vertical-type channel that extends along lateral and vertical directions.

Abstract: Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.

Abstract: A method for fabricating a flash memory device includes forming a control gate having a hollow donut shape over an insulation layer formed over a substrate. The method also includes forming an inter-poly dielectric of a spacer shape on an inner wall of the control gate, filling a conductive layer for a floating gate between the spacer shaped inter-poly dielectrics, and forming an interlayer insulation layer over a resulting product formed with the conductive layer for a floating gate. The method further includes removing a center portion of the conductive layer for a floating gate to form an opening, forming a tunnel insulation layer on an inner face of the opening, and filling with a semiconductor layer the opening formed with the tunnel insulation layer to form an active region.

Abstract: The present invention relates to a stage with a displacement measuring means capable of measuring a displacement, and more particularly, to a stage provided with a displacement magnification means capable of magnifying a displacement so as to precisely measure a minute displacement on the order of nanometers. A stage according to an aspect of the present invention comprises a fixed base, a movable table, a first elastic support, a first actuator, a first displacement converting means and a first displacement measuring means. The movable table is installed to be movable with respect to the fixed base. The first elastic support supports the movable table with respect to the fixed base, and the first actuator generates a displacement of the movable table in one direction.

Abstract: Disclosed is a controller of a grid coupled type doubly-fed induction generator having a multi-level converter topology, which can control the doubly-fed induction generator having a high voltage specification and can perform a fault ride-through function, an anti-islanding function and a grid voltage synchronization function required for a dispersed power generation facility. The controller makes a H-bridge multi-level converter generate a three-phase voltage waveform resulted from the structure that single-phase converters each being composed of a 2-leg IGBT are stacked in a serial manner, and controls a rotor current so as to make the rotor coil of the doubly-fed induction generator in charge of a slip power only. The boost converter is composed of a 3-leg IGBT and a boost inductor generating a direct current voltage of its source required for the H-bridge multi-level converter.

Abstract: A thin film transistor (TFT) array panel with improved contact between the display signal lines and test lines is presented. The TFT array panel includes: gate lines and data lines intersecting each other, switching elements connected to the gate lines and the data lines, and at least one test line disposed near end portions of the gate lines or the data lines. An insulating layer covers the gate lines, the data lines and the switching elements and has first contact holes exposing the end portions of the gate lines or the data lines and second contact holes exposing the test lines. Auxiliary test lines are formed on the insulating layer and commonly connected to conductive layers, wherein the conductive layers connect at least one test line to the gate lines or the data lines via the first and the second contact holes.

Abstract: A thin film transistor (TFT) array panel with improved contact between the display signal lines and test lines is presented. The TFT array panel includes: gate lines and data lines intersecting each other, switching elements connected to the gate lines and the data lines, and at least one test line disposed near end portions of the gate lines or the data lines. An insulating layer covers the gate lines, the data lines and the switching elements and has first contact holes exposing the end portions of the gate lines or the data lines and second contact holes exposing the test lines. Auxiliary test lines are formed on the insulating layer and commonly connected to conductive layers, wherein the conductive layers connect at least one test line to the gate lines or the data lines via the first and the second contact holes.

Abstract: Provided is an operational transconductance amplifier (OTA). An existing Nauta transconductor used to implement a high frequency Gm-C filter integrated circuit (IC) is analyzed by a new method and from a new perspective to remove extra components and divide roles of remaining inverters for more simple and efficient circuit structure. In an existing Nauta transconductor, a common mode signal from an input terminal is amplified and appears at an output terminal, while in the inventive Nauta transconductor the common mode signal from an input terminal does not appear at the output terminal and is effectively eliminated. These enhanced characteristics can be achieved with a smaller number of inverters than an existing Nauta transconductor. Frequency characteristics of the filter can be effectively enhanced by independently controlling the quality factor without affecting the transconductance value required for frequency characteristics of the filter.

Abstract: Disclosed are a protected alcohol or derivative thereof, a surface-modified organic-inorganic hybrid glass, and preparation methods thereof. More specifically, disclosed are a protected alcohol or derivative thereof and a surface-modified organic-inorganic hybrid glass, which are prepared by allowing a silane compound, having vinyl or a vinyl derivative, to react with an alcohol or derivative thereof or with an organic-inorganic hybrid glass, in the presence of an acid catalyst, a transition metal catalyst and an organic solvent, so as to introduce an organic group thereto even at room temperature, as well as preparation methods thereof. The disclosed invention allows a functional group to be effectively introduced into alcohol or a derivative thereof or into an organic-inorganic hybrid glass, not only high temperatures but also room temperature, and thus is highly effective in introducing compounds having a thermally sensitive functional group, for example, natural compounds or proteins.

Abstract: Disclosed herein is an electric power converting device and power converting method for controlling doubly-fed induction generators, which provides a synchronous generator for generating auxiliary electric power independently of a doubly-fed induction generator so as to generate electricity even in a system power-free environment, a grid-side converter is composed of a three-phase four-wire converter so as to generate a balanced voltage even in an unbalanced load condition and automatically synchronize a stator voltage of a doubly-fed induction generator and a system voltage with each other.

Abstract: A method for fabricating a fine pattern in a semiconductor device includes forming a first photoresist pattern over an etch target layer, forming a first hard mask layer over a substrate structure, planarizing the first hard mask layer to form a first hard mask pattern and expose the first photoresist pattern, removing the first photoresist pattern, forming a second photoresist pattern enclosing the first hard mask pattern, forming a second hard mask layer over the substrate structure, planarizing the second hard mask layer to form a second hard mask pattern and expose the first hard mask pattern, removing the second photoresist pattern, and etching the etch target layer using the first hard mask pattern and the second hard mask pattern.

Abstract: Provided is an operational transconductance amplifier (OTA). An existing Nauta transconductor used to implement a high frequency Gm-C filter integrated circuit (IC) is analyzed by a new method and from a new perspective to remove extra components and divide roles of remaining inverters for more simple and efficient circuit structure. In an existing Nauta transconductor, a common mode signal from an input terminal is amplified and appears at an output terminal, while in the inventive Nauta transconductor the common mode signal from an input terminal does not appear at the output terminal and is effectively eliminated. These enhanced characteristics can be achieved with a smaller number of inverters than an existing Nauta transconductor. Frequency characteristics of the filter can be effectively enhanced by independently controlling the quality factor without affecting the transconductance value required for frequency characteristics of the filter.

Abstract: A method of manufacturing thin film transistor and color filter substrates suitable for liquid crystal displays comprises imprinting a pattern in a resin layer formed on a substrate by disposing a mold on the resin layer, aligning the mold and the substrate, curing an edge portion of the resin layer, pressing the full area of the resin layer, curing the full area of the resin layer, and separating the mold from the resin layer.

Abstract: Disclosed is a controller of a grid coupled type doubly-fed induction generator having a multi-level converter topology, which can control the doubly-fed induction generator having a high voltage specification and can perform a fault ride-through function, an anti-islanding function and a grid voltage synchronization function required for a dispersed power generation facility. The controller makes a H-bridge multi-level converter generate a three-phase voltage waveform resulted from the structure that single-phase converters each being composed of a 2-leg IGBT are stacked in a serial manner, and controls a rotor current so as to make the rotor coil of the doubly-fed induction generator in charge of a slip power only. The boost converter is composed of a 3-leg IGBT and a boost inductor generating a direct current voltage of its source required for the H-bridge multi-level converter.

Abstract: Disclosed are a mask mold, a manufacturing method thereof, and a method for forming a large-sized micro pattern using the manufactured mask mold, in which the size of a nano-level micro pattern can be enlarged using a simple method with low cost and interference and stitching errors between cells forming a large area can be minimized. The method for manufacturing the mask mold includes the operations of coating resist on a mask or a plurality of small molds having an engraved micro pattern, pressing the small molds to imprint the micro pattern on the resist, curing the resist, and releasing the small molds from the resist.

Abstract: A slider-activated vehicle remote controller incorporates a sliding mechanism to enable locking and/or unlocking of a vehicle. Either a straight-path slide movement or an axis-based slide movement can be used as the sliding mechanism for the slider-activated vehicle remote controller, wherein a direction of the sliding movement or a particular position of the sliding mechanism of the slider-activated vehicle remote controller can be configured to indicate the vehicle's locked and/or unlocked status. Therefore, by looking at the current shape of the slider-activated vehicle remote controller, a user can readily identify whether the vehicle is locked or unlocked. In one embodiment of the invention, the sliding mechanism acts as a switch to trigger locking and/or unlocking of the vehicle. In another embodiment of the invention, the sliding mechanism activates an underlying switch to trigger locking and/or unlocking of the vehicle.

Abstract: A method for fabricating a fine pattern in a semiconductor device includes forming a first photoresist pattern over an etch target layer, forming a first hard mask layer over a substrate structure, planarizing the first hard mask layer to form a first hard mask pattern and expose the first photoresist pattern, removing the first photoresist pattern, forming a second photoresist pattern enclosing the first hard mask pattern, forming a second hard mask layer over the substrate structure, planarizing the second hard mask layer to form a second hard mask pattern and expose the first hard mask pattern, removing the second photoresist pattern, and etching the etch target layer using the first hard mask pattern and the second hard mask pattern.

Abstract: A semiconductor memory device having a capacitor is disclosed. The capacitor includes a bottom capacitor surface formed of a silicon-germanium crystalline layer or a dual layer in which a silicon-germanium crystalline layer covers a silicon crystalline layer. The bottom capacitor surface is uneven and is conventionally formed by an epitaxial method. The silicon germanium crystalline layer is approximately 5 to 50 percent germanium content by weight. The method of fabricating the semiconductor memory device comprises: selectively exposing the surface of a crystalline silicon substrate at the region where the capacitor bottom electrode is formed; supplying a source gas to grow a silicon germanium crystalline layer at the surface of the selectively exposed silicon substrate; stacking a dielectric layer over the silicon germanium crystalline layer; and stacking a conductive layer over the dielectric layer to form a capacitor top electrode.

Abstract: A display substrate includes a transparent substrate, a pixel layer, an organic insulating layer, a transparent electrode and a reflective electrode. The pixel layer is formed on the transparent substrate, and includes a plurality of pixel parts. Each of the pixel parts includes a transmission region and a reflection region. The organic insulating layer is formed on the pixel layer. The transparent electrode is formed on the organic insulating layer corresponding to each of the pixel parts. The reflective electrode is formed on the transparent electrode corresponding to the reflection region. The reflective electrode includes a silver alloy that includes silver (Ag) and impurities having a low solubility in the silver.

Abstract: Disclosed herein is an electric power converting device and power converting method for controlling doubly-fed induction generators, which provides a synchronous generator for generating auxiliary electric power independently of a doubly-fed induction generator so as to generate electricity even in a system power-free environment, a grid-side converter is composed of a three-phase four-wire converter so as to generate a balanced voltage even in an unbalanced load condition and automatically synchronize a stator voltage of a doubly-fed induction generator and a system voltage with each other.