Abstract: Disclosed are a method of plasma etching and a method of fabricating a semiconductor device including the same. The method of plasma etching includes loading a substrate including an etch target onto a first electrode in a chamber, the chamber including the first electrode and a second electrode arranged to face each other, and etching the target. The etching the target includes applying a plurality of RF powers to one of the first and second electrodes. The plurality of RF powers may include a first RF power having a first frequency in a range from about 40 MHz to about 300 MHz, a second RF power having a second frequency in a range from about 100 kHz to about 10 MHz, and a third RF power having a third frequency in a range from about 10 kHz to about 5 MHz.

Abstract: A substrate subject to degradation at temperatures above 100° C. is coated with a nanostructured ceramic coating having a thickness in excess of 100 nm, formed on a surface of the substrate, wherein a process temperature for deposition of the nanostructured coating does not exceed 90° C. The coating may be photocatalytic, photovoltaic, or piezoelectric. The coating, when moistened and exposed to ultraviolet light or sunlight, advantageously generates free radicals, which may be biocidal, deodorizing, or assist in degradation of surface deposits on the substrate after use. The substrate may be biological or organic, and may have a metallic or conductive intermediate layer.

Abstract: A semiconductor packaging apparatus and methods of manufacturing semiconductor devices using the same. The semiconductor packaging apparatus includes a process unit, and a controller associated with the process unit. The process unit includes a bonding part that bonds a semiconductor substrate and a carrier substrate to each other to form a bonded substrate, a cooling part that cools the bonded substrate, and a detection part in the cooling part and configured to detect a defect of the bonded substrate. The controller is configured to control the process unit using data obtained from the detection part.

Abstract: Embodiments of the inventive concepts provide antennas, plasma generating circuits, plasma processing apparatus, and methods for manufacturing semiconductor devices using the same. The circuits include radio-frequency power sources generating radio-frequency powers, antennas receiving the radio-frequency powers to generate plasma and having a first mutual inductance, and inductors connecting the antennas to the radio-frequency power sources, respectively. The inductors have a second mutual inductance reducing and/or canceling the first mutual inductance.

Abstract: A variable resistance memory device including a substrate; first and second transistors on the substrate; first conductive lines on the transistors, each of the first conductive lines extending in a first direction, and the first conductive lines being spaced apart from each other; first contact plugs directly contacting substrate-facing surfaces of the first conductive lines, the first contact plugs being electrically connected to the first transistors, respectively; second conductive lines on the first conductive lines, each of the second conductive lines extending in the second direction, and the second conductive lines being spaced apart from each other; second contact plugs directly contacting substrate-facing surfaces of the second conductive lines, the second contact plugs being electrically connected to the second transistors, respectively; and memory units between the conductive lines, wherein each of the second contact plugs does not overlap with any of the memory units in the third direction.

Abstract: A semiconductor package includes: an interposer substrate including a core substrate and a connection structure, the core substrate having a cavity and having through-vias connecting upper and lower surfaces thereof, and the connection structure including an insulating member on the upper surface and a redistribution layer on the insulating member; a semiconductor chip on an upper surface of the connection structure and including connection pads connected to the redistribution layer; a passive component accommodated in the cavity; a first insulating layer disposed between the core substrate and the connection structure; a first wiring layer on the first insulating layer and connecting the through-vias and the passive component to the redistribution layer; a second insulating layer on the lower surface of the core substrate; and a second wiring layer on a lower surface of the second insulating layer and connected to the through-vias.

Abstract: An organic light emitting diode display device includes a substrate, a protection layer on the substrate, the protection layer including a trench pattern and a recessed portion, a first electrode on the protection layer, a pixel defining layer on the protection layer, the pixel defining layer defining an opening that exposes at least a part of the first electrode, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer. The recessed portion overlaps the opening and is spaced apart from an edge of the opening in a plan view. The trench pattern includes a plurality of trenches extending along a first direction. Each trench of the plurality of trenches is spaced apart from the first electrode in a plan view and has a concave cross-section.

Abstract: Embodiments of the inventive concepts provide antennas, plasma generating circuits, plasma processing apparatus, and methods for manufacturing semiconductor devices using the same. The circuits include radio-frequency power sources generating radio-frequency powers, antennas receiving the radio-frequency powers to generate plasma and having a first mutual inductance, and inductors connecting the antennas to the radio-frequency power sources, respectively. The inductors have a second mutual inductance reducing and/or canceling the first mutual inductance.

Abstract: An organic light emitting diode display device includes a substrate, a protection layer on the substrate, the protection layer including a trench pattern and a recessed portion, a first electrode on the protection layer, a pixel defining layer on the protection layer, the pixel defining layer defining an opening that exposes at least a part of the first electrode, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer. The recessed portion overlaps the opening and is spaced apart from an edge of the opening in a plan view. The trench pattern includes a plurality of trenches extending along a first direction. Each trench of the plurality of trenches is spaced apart from the first electrode in a plan view and has a concave cross-section.

Abstract: A substrate subject to degradation at temperatures above 100° C. is coated with a nanostructured ceramic coating having a thickness in excess of 100 nm, formed on a surface of the substrate, wherein a process temperature for deposition of the nanostructured coating does not exceed 90° C. The coating may be photocatalytic, photovoltaic, or piezoelectric. The coating, when moistened and exposed to ultraviolet light or sunlight, advantageously generates free radicals, which may be biocidal, deodorizing, or assist in degradation of surface deposits on the substrate after use. The substrate may be biological or organic, and may have a metallic or conductive intermediate layer.

Abstract: A variable resistance memory device includes: a substrate including a peripheral region and a core region, the core region including a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction intersecting the first direction, and memory cells disposed between the first and second conductive lines on the core region. The memory cells include a near memory cell disposed on the near region, and a far memory cell disposed on the far region, wherein a resistance or threshold voltage of the near memory cell, controlling connection of each of the memory cells to a corresponding one of the second conductive lines, is different from that of the far memory cell.

Abstract: Exemplary embodiments relate to a method for unlocking a mobile device using authentication based on ear recognition including obtaining an image of a target showing at least part of the target's body in a lock state, extracting a set of ear features of the target from the image of the target, when the image of the target includes at least part of the target's ear, and determining if the extracted set of ear features of the target satisfies a preset condition, and a mobile device performing the same.

Abstract: A semiconductor package includes: an interposer substrate including a core substrate and a connection structure, the core substrate having a cavity and having through-vias connecting upper and lower surfaces thereof, and the connection structure including an insulating member on the upper surface and a redistribution layer on the insulating member; a semiconductor chip on an upper surface of the connection structure and including connection pads connected to the redistribution layer; a passive component accommodated in the cavity; a first insulating layer disposed between the core substrate and the connection structure; a first wiring layer on the first insulating layer and connecting the through-vias and the passive component to the redistribution layer; a second insulating layer on the lower surface of the core substrate; and a second wiring layer on a lower surface of the second insulating layer and connected to the through-vias.

Abstract: A semiconductor device includes a substrate and memory cell arrays arranged on the substrate in a first direction and second direction. The first direction and second direction are parallel to a top surface of the substrate and intersect each other. The memory cell arrays include a plurality of memory cells. A cell dummy pattern on the substrate is arranged between the memory cell arrays in at least one of the first direction and second direction and extends along a side of the memory cell arrays. A cell conductive pattern is included on the substrate. A cell contact plug is configured to connect the cell dummy pattern and the cell conductive pattern. The cell contact plug is arranged between the cell dummy pattern and the cell conductive pattern in a third direction that is perpendicular to the first direction and the second direction.

Abstract: An organic light emitting display device includes: a substrate; a first electrode on the substrate; a pixel defining layer on the substrate, the pixel defining layer defining a first opening which exposes at least a part of the first electrode; an organic light emitting layer on the first electrode; a second electrode on the organic light emitting layer; a thin film encapsulation layer on the second electrode; a sensing electrode on the thin film encapsulation layer; a low refractive index layer on the sensing electrode, the low refractive index layer defining a second opening which overlaps the first opening; and a high refractive index layer on the thin film encapsulation layer. A gap between an edge of the first opening and an edge of the second opening is constant irrespective of direction.

Abstract: Disclosed are a method of plasma etching and a method of fabricating a semiconductor device including the same. The method of plasma etching includes loading a substrate including an etch target onto a first electrode in a chamber, the chamber including the first electrode and a second electrode arranged to face each other, and etching the target. The etching the target includes applying a plurality of RF powers to one of the first and second electrodes. The plurality of RF powers may include a first RF power having a first frequency in a range from about 40 MHz to about 300 MHz, a second RF power having a second frequency in a range from about 100 kHz to about 10 MHz, and a third RF power having a third frequency in a range from about 10 kHz to about 5 MHz.

Abstract: Disclosed are a method of plasma etching and a method of fabricating a semiconductor device including the same. The method of plasma etching includes loading a substrate including an etch target onto a first electrode in a chamber, the chamber including the first electrode and a second electrode arranged to face each other, and etching the target. The etching the target includes applying a plurality of RF powers to one of the first and second electrodes. The plurality of RF powers may include a first RF power having a first frequency in a range from about 40 MHz to about 300 MHz, a second RF power having a second frequency in a range from about 100 kHz to about 10 MHz, and a third RF power having a third frequency in a range from about 10 kHz to about 5 MHz.

Abstract: A semiconductor package may include: a connection structure including an insulating member having a first surface having a recess portion and a second surface opposing the first surface, a plurality of first pads disposed on a bottom surface of the recess portion, a plurality of second pads embedded in the second surface of the insulating member, and a redistribution layer disposed between the plurality of first pads and the plurality of second pads and connected to the plurality of first and second pads; a semiconductor chip disposed on the first surface of the insulating member and having a plurality of connection electrodes electrically connected, respectively, to the plurality of first pads; and a passivation layer disposed on the second surface of the insulating member and having a plurality of openings exposing, respectively, the plurality of second pads.

Abstract: An organic light emitting display device includes: a substrate; a first electrode on the substrate; a pixel defining layer on the substrate, the pixel defining layer defining a first opening which exposes at least a part of the first electrode; an organic light emitting layer on the first electrode; a second electrode on the organic light emitting layer; a thin film encapsulation layer on the second electrode; a sensing electrode on the thin film encapsulation layer; a low refractive index layer on the sensing electrode, the low refractive index layer defining a second opening which overlaps the first opening; and a high refractive index layer on the thin film encapsulation layer. A gap between an edge of the first opening and an edge of the second opening is constant irrespective of direction.

Abstract: Disclosed are a method of plasma etching and a method of fabricating a semiconductor device including the same. The method of plasma etching includes loading a substrate including an etch target onto a first electrode in a chamber, the chamber including the first electrode and a second electrode arranged to face each other, and etching the target. The etching the target includes applying a plurality of RF powers to one of the first and second electrodes. The plurality of RF powers may include a first RF power having a first frequency in a range from about 40 MHz to about 300 MHz, a second RF power having a second frequency in a range from about 100 kHz to about 10 MHz, and a third RF power having a third frequency in a range from about 10 kHz to about 5 MHz.