Patents by Inventor Junya Maruyama

Junya Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070163457
    Abstract: Provided is a squib for attaining a normal ignition of gas generants even when an adhesion state of the plug with enhancers is released by vibration or impact and a gas generator having the squib. A squib including a plug 13, two or more electrode pins 14 which pass through the plug 13 and respectively provided with a head 25, a bridge wire 16 connecting spaces between the respective heads 25 on at least two electrode pins 14 among the electrode pins 14, and ignition charge 10 which are ignited by the bridge wire 16 electrified via the electrode pins 14, wherein the plug 13 is a cured composition of thermosetting resins, the electrode pin 14 in which the bridge wire 16 is connected to the head 25 passes through the plug 13, with a predetermined distance A kept between the head 25 and the plug 13, and at least the head 25 and the bridge wire 16 are enclosed by the ignition charge 10, which is a solid, and fixed to the plug 13.
    Type: Application
    Filed: April 15, 2005
    Publication date: July 19, 2007
    Applicant: NIPPON KAYAKU KABUSHIKI KAISHA
    Inventors: Yasushi Matsumura, Junya Maruyama, Akitoshi Hironaka, Kazumasa Kurita, Kenjiro Ikeda
  • Patent number: 7245331
    Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: July 17, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Publication number: 20070158745
    Abstract: (Object) It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.
    Type: Application
    Filed: March 5, 2007
    Publication date: July 12, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
  • Patent number: 7241666
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: July 10, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Publication number: 20070138954
    Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 21, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yumiko Ohno, Masakazu Murakami, Toshiji Hamatani, Hideaki Kuwabara, Shunpei Yamazaki
  • Patent number: 7230316
    Abstract: It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor element, a TFT element, an embedded wiring and the like, is formed over a substrate, separated from the substrate, and transferred onto a circuit board 100. An electrical conduction with a wiring pattern 114 provided in the circuit board 100 is made by a wire 112 or a solder 107, thereby forming a high frequency module or the like.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: June 12, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno, Yuugo Goto, Hideaki Kuwabara
  • Patent number: 7229900
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: June 12, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
  • Publication number: 20070120132
    Abstract: It is an object of the present invention to provide a light emitting device having a structure wherein oxygen and moisture are prevented from reaching to the light emitting device, and to provide a manufacturing method thereof. It is another object of the present invention to seal a light emitting device in fewer steps without encapsulating a desiccant. The present invention provides a structure in which a pixel region 13 is surrounded by a first sealing material (having higher viscosity than a second sealing material) 16 including a spacer (filler, minute particles and/or the like) which maintains a gap between the two substrates, filled with a few drops of the transparent second sealing material 17a which is spread in the region; and sealed by using the first sealing material 16 and the second sealing material 17.
    Type: Application
    Filed: January 29, 2007
    Publication date: May 31, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno
  • Publication number: 20070109735
    Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.
    Type: Application
    Filed: January 2, 2007
    Publication date: May 17, 2007
    Applicant: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
  • Publication number: 20070095236
    Abstract: To provide reduction in size of an igniter device and a gas generator by enhancing strength of a plug under high temperature and thereby reducing thickness of the plug, and to surely prevent electrode pins being burst forth from the plug. An igniter device comprising a resistance heating element, gunpowder to be ignited by heat generation of the resistance heating element, electrode pins connected to the resistance heating element, and a plug for holding the electrode pins, wherein material of the plug is a thermosetting resin. A gas generator comprising a cup packed with gas generant to generate gas by burning, an igniter device arranged in an interior of the cup, and a holder for holding the igniter device and the cup, wherein the holder has insertion holes for allowing the electrode pins to extend through them, respectively.
    Type: Application
    Filed: November 25, 2004
    Publication date: May 3, 2007
    Applicant: Nippon Kayaku Kabushiki Kaisha
    Inventors: Junya Maruyama, Kazumasa Kurita, Masaki Shinmoto, Michal Kilian
  • Patent number: 7189631
    Abstract: It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: March 13, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
  • Publication number: 20070051959
    Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.
    Type: Application
    Filed: November 3, 2006
    Publication date: March 8, 2007
    Inventors: Toshimitsu Konuma, Junya Maruyama
  • Patent number: 7180093
    Abstract: The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: February 20, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yumiko Ohno, Masakazu Murakami, Toshiji Hamatani, Hideaki Kuwabara, Shunpei Yamazaki
  • Publication number: 20070032042
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Application
    Filed: October 4, 2006
    Publication date: February 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Patent number: 7169636
    Abstract: It is an object of the present invention to provide a light emitting device having a structure wherein oxygen and moisture are prevented from reaching to the light emitting device, and to provide a manufacturing method thereof. It is another object of the present invention to seal a light emitting device in fewer steps without encapsulating a desiccant. The present invention provides a structure in which a pixel region 13 is surrounded by a first sealing material (having higher viscosity than a second sealing material) 16 including a spacer (filler, minute particles and/or the like) which maintains a gap between the two substrates, filled with a few drops of the transparent second sealing material 17a which is spread in the region; and sealed by using the first sealing material 16 and the second sealing material 17.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: January 30, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno
  • Publication number: 20070020932
    Abstract: A manufacturing method of a wiring board and a semiconductor device at low cost and by a simple process, without performing complicated steps many times is proposed. Furthermore, a manufacturing method of a wiring board at low cost and with fewer adverse effects on the environment, and a manufacturing method of a semiconductor device using the wiring board are proposed. A pattern of a conductive material is formed over a first substrate, a conductive film is formed over the pattern by an electrolytic plating process, the pattern and the conductive film are separated, an IC chip including at least one thin film transistor is formed over a second substrate, and the conductive film is electrically connected to the IC chip.
    Type: Application
    Filed: June 27, 2006
    Publication date: January 25, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Tomoyuki Aoki
  • Patent number: 7164151
    Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: January 16, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
  • Publication number: 20070004125
    Abstract: It is an object of the present invention to provide a semiconductor device in which a barrier property is improved; a compact size, a thin shape, and lightweight are achieved; and flexibility is provided. By providing a stacked body including a plurality of transistors in a space between a pair of substrates, a semiconductor device is provided, in which a harmful substance is prevented from entering and a barrier property is improved. In addition, by using a pair of substrates which are thinned by performing grinding and polishing, a semiconductor device is provided, in which a compact size, a thin shape, and lightweight are achieved. Further, a semiconductor device is provided, in which flexibility is provided and a high-added value is achieved.
    Type: Application
    Filed: June 12, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuko Watanabe, Junya Maruyama, Yoshitaka Moriya
  • Publication number: 20070004233
    Abstract: A first layer (an insulating layer), a second layer (a metal layer), and a third layer (an insulating layer) are formed over a substrate. Then, a fourth layer including a semiconductor element is formed over the third layer. After applying an organic resin film covering the fourth layer, laser light is irradiated to sections of a rear surface side of the substrate. By irradiating the second layer with laser light, the state of being covered with the organic resin film can be maintained at the same time as forming a space under the organic resin film by ablating (alternatively, evaporating or breaking down) an irradiated region of the second layer, to cause a lift in the film in a periphery thereof.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 4, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masafumi MORISUE, Ryosuke WATANABE, Junya MARUYAMA, Daiki YAMADA
  • Publication number: 20070004100
    Abstract: An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed.
    Type: Application
    Filed: December 14, 2004
    Publication date: January 4, 2007
    Inventors: Shinji Maekawa, Gen Fujii, Junya Maruyama, Toru Takayama, Yumiko Fukumoto, Yasuyuki Arai