Patents by Inventor Junya Maruyama

Junya Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7465674
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device with high reliability, at low cost, in which an element forming layer having a thin film transistor and the like provided over a substrate is peeled from the substrate, so that a semiconductor device is manufactured. According to the invention, a metal film is formed over a substrate, a plasma treatment is performed to the metal film in a dinitrogen monoxide atmosphere to form a metal oxide film over the metal film, a first insulating film is formed continuously without being exposed to the air, an element forming layer is formed over the first insulating film, and the element forming layer is peeled from the substrate, so that a semiconductor device is manufactured.
    Type: Grant
    Filed: May 22, 2006
    Date of Patent: December 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoko Tamura, Kaori Ogita, Koji Dairiki, Junya Maruyama
  • Patent number: 7459726
    Abstract: A semiconductor device which has a high performance integrated circuit formed of an inexpensive glass substrate and capable of processing a large amount of information and operating at higher data rates. The semiconductor device includes semiconductor elements stacked by transferring a semiconductor element formed on a different substrate. A resin film is formed between the stacked semiconductor elements and a metal oxide film is partially formed between the stacked semiconductor elements as well. A first electric signal is converted to an optical signal in a light emitting element electrically connected to one of the stacked semiconductor elements. Meanwhile, the optical signal is converted to a second electric signal in a light receiving element electrically connected to another one of the stacked semiconductor elements.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: December 2, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 7449372
    Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: November 11, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Masafumi Morisue, Hironobu Shoji, Junya Maruyama, Kouji Dairiki, Tomoyuki Aoki
  • Patent number: 7446339
    Abstract: The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an OLED bonded to a base material with curvature. An external force is applied to a support originally having curvature and elasticity, and the support is bonded to a peeled layer formed over a substrate. Then, when the substrate is peeled, the support returns into the original shape by the restoring force, and the peeled layer as well is curved along the shape of the support. Finally, a transfer object original having curvature is bonded to the peeled layer, and then a device with a desired curvature is completed.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: November 4, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masakazu Murakami, Toru Takayama, Junya Maruyama
  • Patent number: 7443097
    Abstract: A highly reliable light-emitting device is provided in which an organic light-emitting device is not degraded by oxygen, moisture, and the like. The organic light-emitting device is press-fit in vacuum using a wrapping film (105) that is covered with a DLC film (or a silicon nitride film, an AlN film, a film of a compound expressed as AlNXOY) (106) containing Ar. The organic light-emitting device thus can be completely shut off from the outside, and moisture, oxygen, or other external substances that accelerate degradation of an organic light emitting layer can be prevented from entering the organic light-emitting device.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: October 28, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junya Maruyama, Keiichi Ogura, Toru Takayama
  • Patent number: 7436050
    Abstract: To provide a thin film device which becomes possible to be formed in the portion which has been considered impossible to be provided with such device by the conventional technique, and to provide a semiconductor device which occupies small space and which has high shock resistance and flexibility, a device formation layer with a thickness of at most 50 ?m which was peeled from a substrate by a transfer technique is transferred to another substrate, hence, a thin film device can be formed over various substrates. For instance, a semiconductor device can be formed so as to occupy small space by pasting a thin film device which is transferred to a flexible substrate onto a rear surface of a substrate of a panel, by pasting directly a thin film device onto a rear surface of a substrate of a panel, or by transferring a thin film device to an FPC which is pasted onto a substrate of a panel.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: October 14, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
  • Publication number: 20080206959
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Patent number: 7407870
    Abstract: The present invention is a separation method for easy separation of an allover release layer with a large area. Further, the present invention is the separating method that is not subjected to restrictions in the use of substrates, such as a kind of substrate, during forming a release layer. A separation method comprising the steps of forming a metal film, a first oxide, and a semiconductor film containing hydrogen in this order; and bonding a support to a release layer containing the first oxide and the semiconductor film and separating the release layer bonded to the support from a substrate provided with the metal layer by a physical means.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: August 5, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Shunpei Yamazaki
  • Publication number: 20080138943
    Abstract: An object of the present invention is to provide a semiconductor device formed by laser crystallization by which formation of grain boundaries in the TFT channel formation region can be avoided, and a method of manufacturing the same. Still another object of the present invention is to provide a method of designating the semiconductor device.
    Type: Application
    Filed: January 4, 2008
    Publication date: June 12, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Toshihiko Saito, Atsuo Isobe, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 7375006
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: May 20, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Publication number: 20080108205
    Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.
    Type: Application
    Filed: December 14, 2007
    Publication date: May 8, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Hiroki Adachi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara, Tomoyuki Aoki, Eiji Sugiyama, Hironobu Takahashi
  • Publication number: 20080093464
    Abstract: It is an object of the present invention to reduce the cost of a wireless chip, further, to reduce the cost of a wireless chip by enabling the mass production of a wireless chip, and furthermore, to provide a downsized and lightweight wireless chip. A wireless chip in which a thin film integrated circuit peeled from a glass substrate or a quartz substrate is formed between a first base material and a second base material is provided according to the invention. As compared with a wireless chip formed from a silicon substrate, the wireless chip according to the invention realizes downsizing, thinness, and lightweight. The thin film integrated circuit included in the wireless chip according to the invention at least has an n-type thin film transistor having an LDD (Lightly Doped Drain) structure, a p-type thin film transistor having a single drain structure, and a conductive layer functioning as an antenna.
    Type: Application
    Filed: August 10, 2005
    Publication date: April 24, 2008
    Applicant: c/o Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Junya Maruyama, Tomoko Tamura, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 7361573
    Abstract: The invention aims to provide a peeling method without damaging a peeled off layer and to allow separation of not only a peeled off layer having a small surface area but also the entire surface of a peeled off layer having a large surface area. Further, the invention aims to provide a lightweight semiconductor device by sticking a peeled off layer to a variety of substrates and its manufacturing method. Especially, the invention aims to provide a lightweight semiconductor device by sticking a variety of elements such as TFT to a flexible film and its manufacturing method. Even in the case a first material layer 11 is formed on a substrate and a second material layer 12 is formed adjacently to the foregoing first material layer 11, and further, layered film formation, heating treatment at 500° C.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: April 22, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
  • Publication number: 20080088034
    Abstract: It is an object of the present invention to provide a technique for making a semiconductor device thinner without using a back-grinding method for a silicon wafer. According to the present invention, an integrated circuit film is mounted, thereby making a semiconductor device mounting the integrated circuit film thinner. The term “an integrated circuit film” means a film-like integrated circuit which is manufactured based on an integrated circuit manufactured by a semiconductor film formed over a substrate such as a glass substrate or a quartz substrate. In the present invention, the integrated circuit film is manufactured by a technique for transferring.
    Type: Application
    Filed: November 30, 2007
    Publication date: April 17, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideaki Kuwabara, Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Etsuko Arakawa, Shunpei Yamazaki
  • Patent number: 7351300
    Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: April 1, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
  • Patent number: 7344925
    Abstract: An object of the present invention is to provide a semiconductor device formed by laser crystallization by which formation of grain boundaries in the TFT channel formation region can be avoided, and a method of manufacturing the same. Still another object of the present invention is to provide a method of designating the semiconductor device.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: March 18, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Toshihiko Saito, Atsuo Isobe, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
  • Patent number: 7341760
    Abstract: The present invention provides a technique for performing film-forming of a cathode comprising a metallic with a good adhesion, as well as a light-emitting device producing a good image to be displayed. An EL element is fabricated to have a structure in which an electron transport layer comprising a low molecular weight film is provided on a luminescent layer (104) comprising a polymer film and a cathode (106) comprising a metallic film is provided on the resultant electron transport layer. With such structure, occurrence of delamination or a dark spot derived from inferior adhesion of the cathode (106) can be prevented to obtain the light-emitting device producing a good image quality.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: March 11, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Hisao Ikeda
  • Publication number: 20080049437
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Application
    Filed: October 24, 2007
    Publication date: February 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Hideaki KUWABARA, Shunpei YAMAZAKI
  • Patent number: 7335573
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: February 26, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Hideaki Kuwabara, Shunpei Yamazaki
  • Patent number: 7335951
    Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: February 26, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Hiroki Adachi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara, Tomoyuki Aoki, Eiji Sugiyama, Hironobu Takahashi