Abstract: Provided is a method for stripping a substrate of a semiconductor structure, including: providing a substrate, a first A1N layer, a first AlGaN layer and a function layer from bottom to top; and irradiating the first AlGaN layer from the substrate with laser light to decompose the first AlGaN layer, such that the function layer is separated from the substrate and the first A1N layer. By the method, the first A1N layer and the first AlGaN layer respectively correspond to a nucleation layer and a buffer layer when the function layer is epitaxially grown, to improve the quality of the function layer.

Abstract: LED structures and methods of manufacturing LED structure are provided. The LED structure includes: an LED light-emitting cell, including a first semiconductor layer, a light-emitting layer on the first semiconductor layer, and a second semiconductor layer on the light-emitting layer; a stress adjusting structure surrounding the LED light-emitting cell and applying stress to a sidewall of the LED light-emitting cell, where a lattice constant of a material of the stress adjusting structure is greater than lattice constants of materials in the LED light-emitting cell.

Abstract: Disclosed are an LED structure and a preparing method of an LED structure. The LED structure includes: an LED light emitting unit including a first semiconductor layer, a light emitting layer and a second semiconductor layer which are stacked; and a first stress layer surrounding the LED light emitting unit and covering a side wall of the LED light emitting unit. In the present disclosure, the first stress layer is configured to apply a stress to the side wall of the LED light emitting unit, adjust a wavelength of the LED structure, and improve a wavelength uniformity of the LED structure. In addition, since a side wall of the LED structure is extruded, and a luminous efficiency of the LED structure is effectively improved.

Abstract: The present disclosure provides a light sensing unit, a gallium nitride_(GaN)-based image sensor, and a display apparatus thereof. The light sensing unit includes: red, green, and blue light sensing sub-units, where materials of a red-light sensing layer of each of the light sensing sub-units are GaN-based materials containing indium(In). The materials of the light sensing layers may contain different contents of In, such that the light sensing sub-units are enabled to generate or not generate light sensing electrical signals according to different wave lengths of received light. During a GaN-based material growth process, the contents of In in different regions are controlled to prepare the light sensing sub-units at the same time to increase integration degrees of the light sensing unit, the GaN-based image sensor, and the display apparatus containing the light sensing unit to achieve miniaturization.

Abstract: The present disclosure provides a resonant tunneling diode and a manufacturing method thereof. The resonant tunneling diode includes: a first barrier layer; a second barrier layer; and a potential well layer between the first barrier layer and the second barrier layer, a material of the first barrier layer being AlxInyN1-x-y, 1>x>0, 1>y>0, and/or a material of the second barrier layer being AlmInnN1-m-n, 1>m>0, 1>n>0, and a material of the well layer including a gallium element.

Abstract: An electronic device includes a substrate, a spacer, a first element and a second element. A spacer is disposed on the substrate and has a first opening, a second opening and a third opening arranged in a first direction. The second opening is located between the first opening and the third opening. A distance between the first opening and the second opening is less than a distance between the second opening and the third opening in the first direction. A first element is located in at least one of the first opening and the second opening. A second element is located in the third opening.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure may include: a first epitaxial layer disposed on a substrate; a bonding layer disposed on the first epitaxial layer (where the bonding layer is provided with a first through-hole to expose the first epitaxial layer); a silicon substrate disposed on a side of the bonding layer away from the first epitaxial layer (where the first epitaxial layer is bonded to the silicon substrate by the bonding layer, the silicon substrate is provided with a through-silicon-via, and the through-silicon-via communicates with the first through-hole); a silicon device disposed on the silicon substrate; and a second epitaxial layer disposed on the first epitaxial layer exposed by the first through-hole. The present disclosure can improve the quality of the second epitaxial layer, and realize the integration of a silicon device and a III-V semiconductor device.

Abstract: Semiconductor structures and manufacturing methods thereof. A semiconductor structure includes: a first epitaxial layer; a bonding layer, on first epitaxial layer and provided with a first through-hole exposing first epitaxial layer; a silicon substrate, on a side of bonding layer away from first epitaxial layer, first epitaxial layer and the silicon substrate being bonded through the bonding layer; a through-silicon-via, in silicon substrate, through-silicon-via communicating with first through-hole; a second epitaxial layer, on first epitaxial layer exposed by first through-hole; a first electrode, on a side of first epitaxial layer away from bonding layer, and electrically coupled with first epitaxial layer; a second electrode, on a side of second epitaxial layer away from first epitaxial layer, and electrically coupled with second epitaxial layer.

Abstract: The present disclosure provides a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes an N-type semiconductor layer provided on a substrate in a vertical direction, and at least one of multiple-quantum-well structure is formed on the N-type semiconductor layer in a horizontal direction, a P-type semiconductor layer is provided above the multiple-quantum-well structure and on at least part of sides of the multiple-quantum-well structure, each multiple-quantum-well structure includes a plurality of semiconductor layers sequentially stacked in the vertical direction and a multiple-quantum-well unit formed between each two adjacent semiconductor layers of the plurality of semiconductor layers, and the P-type semiconductor layer is in contact with each of the plurality of semiconductor layers of the multiple-quantum-well structure in the vertical direction. The method is used to manufacture the semiconductor structure.

Abstract: A steam turbine and a method for internally cooling the same. The steam turbine includes an outer casing and an inner casing; a rotor having a balancing piston, the rotor being rotatably mounted inside the inner casing; and a steam flow channel formed between the inner casing and the rotor. Moving blades fitted with the rotor and stationary blades fitted with the inner casing are alternately arranged to form multiple stages of blade groups, and an interlayer for steam to circulate is formed between the inner casing and the outer casing. The multiple stages of blade groups include a first set blade staging and a second set blade staging; and the top of the balancing piston is provided with a first chamber and a second chamber.

Abstract: The present application provides a synchronous rectification circuit and a control method thereof. A switching element of the synchronous rectification circuit is controlled to turn on or turn off by detecting the occurrence of a positive or negative transition of the inductive voltage of the secondary winding. The synchronous rectification circuit comprises a transition detector for coupling to the secondary winding, a transition controller for coupling to the transition detector, and a switching element comprising a control terminal for coupling to the transition controller.

Abstract: Disclosed are a semiconductor light-emitting device and a preparation method for the semiconductor light-emitting device. The semiconductor light-emitting device having a red light sub-pixel region, a green light sub-pixel region, and a blue light sub-pixel region includes a substrate and a blue light epitaxial layer epitaxially grown on the substrate, and a green light epitaxial layer and a red light epitaxial layer continually grown on the green light sub-pixel region and the red light sub-pixel region, respectively, on the blue light epitaxial layer, the green light epitaxial layer and the red light epitaxial layer being distributed on the blue light epitaxial layer at an interval.

Abstract: A multi-quantum well structure includes at least one lamination layer, each lamination layer includes a first film layer, an insertion layer and a second film layer, and the at least one lamination layer includes a plurality of lamination layers which are stacked with each other. The insertion layer is located between the first film layer and the second film layer. The insertion layer includes at least one of a monomer structure and a superlattice structure, the first film layer is doped with elements of In, Ga and N, the insertion layer is doped with elements of Al, Ga and N, and the second film layer is doped with elements of Ga and N. The multi-quantum well structure has ability to emit a light with a longer wavelength, and defects and other undesirable phenomena, caused by growing the first film layer with low-temperature epitaxy, may be prevented.

Abstract: Disclosed is a graphite disc solving a problem of poor performance uniformity of the epitaxial wafer, which is obtained during material epitaxial growth by using the graphite disc. The graphite disc includes a graphite disc body, where the graphite disc body includes a groove and a plurality of projections on a bottom wall of the groove, and the plurality of projections divide the groove into a plurality of independent regions. According to the graphite disc provided by the present disclosure, a plurality of regions are defined in the groove by using the projections, each region corresponds to one substrate, and different regions are interconnected. Compared with the graphite disc structure with one groove corresponding to one substrate in the related art, a space for gas flow is enlarged, therefore a problem that an edge of the epitaxial wafer is too thick caused by gas flow is alleviated.

Abstract: A method for manufacturing an electronic device is provided. The method for manufacturing the electronic device includes: providing a substrate with elements disposed thereon and transferring a portion of the elements from the substrate to a driving substrate, wherein transferring the portion of the elements from the substrate to the driving substrate includes: transferring the portion of the elements from the substrate to the driving substrate, which comprises illuminating regions of the substrate overlapped with the portion of the elements by an energy beam, wherein when the substrate is illuminated by the energy beam, the substrate and the driving substrate are separated by a gap.

Abstract: Disclosed are a quantum well structure and a preparation method therefor, and a light-emitting diode. The quantum well structure includes at least one quantum well and at least one first film layer. The quantum well includes a well layer and a barrier layer alternately stacked, and the well layer includes a first doping element. Each first film layer includes a second doping element. The second doping element is used for adjusting a doping content of the first doping element in the well layer. The first doping element includes at least one of In and Al, and the second doping element includes at least one of Al, Mg, and Si. A content of the first doping element may be adjusted by catalysis of the second doping element, thereby adjusting light-emitting efficiency and a light wavelength of the quantum well as required.

Abstract: Disclosed herein is an electrical connecting structure having nano-twins copper, including a first substrate having a first nano-twins copper layer and a second substrate having a second nano-twins copper layer. The first nano-twins copper layer includes a plurality of first nano-twins copper grains. The second nano-twins copper layer includes a plurality of second nano-twins copper grains. The first nano-twins copper layer is joined with the second nano-twins copper layer. At least a portion of the first nano-twins copper grains extend into the second nano-twins copper layer, or at least a portion of the second nano-twins copper grains extend into the first nano-twins copper layer.

Abstract: A semiconductor structure and a manufacturing method thereof are provided in the present disclosure. The semiconductor structure includes a semiconductor substrate; a plurality of stacked structures and a plurality of isolation structures on the semiconductor substrate, wherein the stacked structures are spaced apart each other, and each of the isolation structures are located between adjacent stacked structures; each of the stacked structures comprises a nucleation layer and a first epitaxial layer from bottom to top; and a heterojunction structure on the plurality of stacked structures, wherein the heterojunction structure is distributed over an entire surface, and an air gap is formed between the heterojunction structure and each of the isolation structures.

Abstract: The present application provides a method of manufacturing a semiconductor structure. Due to different hole ratios of openings of a mask corresponding to one unit region of a substrate, flow rates of reactive gas in openings are different when growing a light emitting layer. In this way, growth rates of the light emitting layers in openings are different, and doping efficiencies of the light emitting layers in openings are different, such that composition proportions of respective elements in the grown light emitting layer are different, and the light emitting wavelengths of LEDs are different. The processes are simple, and a semiconductor structure applied to a full-color LED can be manufactured on one substrate, which can reduce a size of the full-color LED.

Abstract: A system detects a powerdown event, such as a power loss event, and performs a flush of volatile memory to persistent memory during a powerdown sequence. The system includes an energy backup device to power the system during the powerdown sequence. The system is configurable with optional settings that configure the powerdown sequence specific to a type of the energy backup device.