Patents by Inventor Kang Yeh

Kang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR GIVING READ COMMANDS AND READING DATA, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME
    Publication number: 20120254522
    Abstract: A method for giving a read command to a flash memory chip to read data to be accessed by a host system is provided. The method includes receiving a host read command; determining whether the received host read command follows a last host read command; if yes, giving a cache read command to read data from the flash memory chip; and if no, giving a general read command and the cache read command to read data from the flash memory chip. Accordingly, the method can effectively reduce time needed for executing the host read commands by using the cache read command to combine the host read commands which access continuous physical addresses and pre-read data stored in a next physical address.
    Type: Application
    Filed: June 12, 2012
    Publication date: October 4, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: CHIH-KANG YEH
  • MEMORY STORAGE DEVICE, MEMORY CONTROLLER, AND DATA WRITING METHOD
    Publication number: 20120254511
    Abstract: A memory storage device, a memory controller, and a data writing method are provided. The memory storage device has a rewritable non-volatile memory chip including a plurality of physical units, and each of the physical units has a plurality of physical pages. The data writing method includes configuring a plurality of logical units to be mapped to a portion of the physical units, and each of the logical unit has a plurality of logical pages. The data writing method also includes receiving a first write data from a host system and writing the first write data into the ith physical page in a substitute physical unit selected from the physical units. The data writing method further includes writing a first address access information corresponding to the first write data and a second address access information into the ith physical page. Herein i is a positive integer.
    Type: Application
    Filed: May 20, 2011
    Publication date: October 4, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Block management method for flash memory, and storage system and controller using the same
    Patent number: 8275931
    Abstract: A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Data writing method for a flash memory, and flash memory controller and flash memory storage apparatus using the same
    Patent number: 8276033
    Abstract: A data writing method for a flash memory, and a flash memory controller and a flash memory storage apparatus using the same are provided. First, data is received from a host system. Next, the data is divided into at least one frame. Afterwards, an error checking and correcting (ECC) code corresponding to the frame is generated so as to form at least one ECC frame. Then, the ECC frame is divided into a plurality of frame segments. Finally, the frame segments are written into a flash memory chip according to a non-sequentially ranking order.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Fu Tseng, Yu-Hung Liu, Li-Chun Liang, Chih-Kang Yeh
  • Data writing method for a flash memory, and controller and storage system using the same
    Patent number: 8250292
    Abstract: A data writing method for writing data from a host system into a flash memory chip is provided. The method includes configuring a plurality of logical page addresses, grouping the logical page addresses into a plurality of logical blocks, and recording the data dispersion degree of each of the logical blocks. The method also includes receiving write-in data from the host system, identifying a logical block that a logical page address to be written by the host system belongs to, and writing the write-in data into the flash memory chip according to the data dispersion degree of the logical block, wherein the data dispersion degree of each of the logical blocks is not larger than a logical block data dispersion degree threshold value. Accordingly, the method can effectively reduce the time for executing a host write command.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: August 21, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Block management method, and storage system and controller using the same
    Patent number: 8250286
    Abstract: A block management method for managing a multi level cell (MLC) NAND flash memory is provided, wherein the MLC NAND flash memory has a plurality of physical blocks grouped into at least a data area and a spare area, each of the physical blocks has a plurality of pages divided into a plurality of upper pages, and a plurality of lower pages with a writing speed thereof being greater than that of the upper pages. The block management method includes configuring a plurality of logical blocks for being accessed by a host, recording the logical block belonging to a frequently accessed block and executing a special mode to use the lower pages of at least two physical blocks of the MLC NAND flash memory for storing data of one logical block belonging to the frequently accessed block. Accordingly, it is possible to increase the access speed of a storage system.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: August 21, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • MEMORY MANAGEMENT METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS
    Publication number: 20120210075
    Abstract: A memory management method for managing physical units of a rewritable non-volatile memory module is provided. In the method, the physical units are grouped into at least a data area and a free area. The method includes obtaining empty physical units from the free area to configure a first global random area and obtaining empty physical units from the data area to configure a second global random area. The method further includes using the physical units of the first global random area to write updated data, and using the physical units of the second global random area to write other updated data after the physical units of the first global random area are written full of the updated data. Accordingly, the method can increase the storage space of a global random area, and thereby reduces data merging operations and shortens the time for executing a write command.
    Type: Application
    Filed: May 17, 2011
    Publication date: August 16, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Method for giving read commands and reading data, and controller and storage system using the same
    Patent number: 8244963
    Abstract: A method for giving a read command to a flash memory chip to read data to be accessed by a host system is provided. The method includes receiving a host read command; determining whether the received host read command follows a last host read command; if yes, giving a cache read command to read data from the flash memory chip; and if no, giving a general read command and the cache read command to read data from the flash memory chip. Accordingly, the method can effectively reduce time needed for executing the host read commands by using the cache read command to combine the host read commands which access continuous physical addresses and pre-read data stored in a next physical address.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: August 14, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Flash memory storage system applying SLC NAND flash memory and MLC NAND flash memory and data writing method thereof
    Patent number: 8234466
    Abstract: A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: July 31, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Flash memory storage system and flash memory controller and data processing method thereof
    Patent number: 8230160
    Abstract: A flash memory storage system including a flash memory chip, a connector, and a flash memory controller is provided. The flash memory controller configures a plurality of logical addresses and maps the logical addresses to a part of the physical addresses in the flash memory chip, and a host system uses a file system to access the logical addresses. Besides, the flash memory controller identifies a deleted logical address among the logical addresses and marks data in the physical address mapped to the deleted logical address as invalid data.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: July 24, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Multilevel cell NAND flash memory storage system, and controller and access method thereof
    Patent number: 8225067
    Abstract: A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: July 17, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh, Kok-Yong Tan
  • DATA ACCESSING METHOD FOR FLASH MEMORY STORAGE DEVICE HAVING DATA PERTURBATION MODULE, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME
    Publication number: 20120173805
    Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
    Type: Application
    Filed: March 13, 2012
    Publication date: July 5, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Data writing method for flash memory and control circuit and storage system using the same
    Patent number: 8209472
    Abstract: A data writing method for moving data in a plurality of flash memory modules during a write command of a host system is executed is provided, wherein each of the flash memory modules has a plurality of physical blocks. The present data writing method includes transferring first data received from the host system to one of the flash memory modules and writing the first data into the physical blocks of the flash memory module according to the write command. The present data writing method also includes moving at least one second data in the physical blocks of another one of the flash memory modules during the first data is written. Thereby, when the host system is about to write data into the other flash memory module, the time for executing the write command is effectively reduced.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: June 26, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • DATA MANAGEMENT METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS
    Publication number: 20120159043
    Abstract: A data management method, a memory controller and a memory storage apparatus are provided. The method includes grouping a plurality of physical units of a rewritable non-volatile memory module into at least a data area and a free area. The method also includes configuring a plurality of logical units for mapping a part of the physical units. The method further includes receiving at least two pieces of update data, which are corresponding to different logical pages of the logical units. The method further includes getting a physical unit from the physical units. The method further includes writing the at least two pieces of update data into the same one physical page of the gotten physical unit. Accordingly, the use efficiency of the physical units could be improved.
    Type: Application
    Filed: January 14, 2011
    Publication date: June 21, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD FOR PROGRAMMING DATA THEREOF
    Publication number: 20120151158
    Abstract: A memory storage device, a memory controller thereof, and a method for programming data thereof are provided. The memory storage device comprises a rewritable non-volatile memory chip having a plurality of rewritable non-volatile memory modules, and each rewritable non-volatile memory module comprises a plurality of physical blocks. The method includes receiving a write command from a host system, and a logical address corresponding to the write command belongs to a predetermined logical address range. The method also includes determining whether a suitable memory module has not stored any data belonging to the predetermined logical address range exists in all rewritable non-volatile memory modules. The method further includes writing a writing data corresponding to the write command into the suitable memory module if it is existent.
    Type: Application
    Filed: January 27, 2011
    Publication date: June 14, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • DATA WRITING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS
    Publication number: 20120151180
    Abstract: A data writing method for writing updated data from a host into a memory module is provided. Herein, some physical units of the memory module are gotten to be global random physical units for storing data from the host. The method includes determining whether the updated data is sequential data and determining whether a logical page corresponding to the updated data is a start logical page. The method further includes getting a blank physical unit from the physical units as a new global random physical unit and writing the updated data into the new global random physical unit when the updated data is the sequential data and the logical page corresponding to the updated data is the start logical page. Accordingly, the method can write updated data belonging to the same logical unit into the same physical unit, thereby shortening the time for executing write commands.
    Type: Application
    Filed: March 2, 2011
    Publication date: June 14, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • DATA READING METHOD, MEMORY STORAGE APPARATUS, AND CONTROLLER THEREOF
    Publication number: 20120144267
    Abstract: A data reading method for a rewritable non-volatile memory module is provided, wherein the rewritable non-volatile memory module has a plurality of physical pages. The data reading method includes grouping the physical pages into a plurality of physical page groups and configuring a corresponding threshold voltage set for each of the physical page groups. The data reading method also includes respectively reading data from the physical pages of the physical page groups by using the corresponding threshold voltage sets. The data reading method further includes when data read from one of the physical pages of one of the physical page groups cannot be corrected by using an error checking and correcting (ECC) circuit, updating the threshold voltage set corresponding to the physical page group.
    Type: Application
    Filed: March 1, 2011
    Publication date: June 7, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Chien-Fu Tseng, Chung-Lin Wu
  • Keyboard module
    Patent number: 8194401
    Abstract: A keyboard module, including a base plate, a membrane circuit, keys and a frame set, is provided. The membrane circuit is disposed on the base plate and has touch portions. The keys are assembled to the base plate and correspond to the touch portions respectively. The frame set is assembled to the base plate and includes a first frame and a second frame. The first frame has a plurality of first ribs disposed in a staggered way. The second frame is connected to the first frame and located between the first frame and the base plate. The second frame has a plurality of second ribs disposed in a staggered way, wherein a width of a portion of the second ribs is smaller than a width of the corresponding first ribs, and the keys pass through the second frame and the first frame in sequence to protrude above the frame set.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: June 5, 2012
    Assignee: Compal Electronics, Inc.
    Inventors: Tzu-Hung Wang, Hsi-Ming Cheng, Kang-Yeh Yu
  • MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD FOR RESPONDING HOST COMMAND
    Publication number: 20120131263
    Abstract: A memory storage device, a memory controller thereof, and a method for responding host commands are provided. The memory storage device has a flash memory chip and a buffer memory. The present method includes receiving a write command issued by a host system and determining whether the write command causes the memory storage device to trigger a data moving procedure. If the write command does not cause the memory storage device to trigger the data moving procedure, the present method further includes sending an acknowledgement message corresponding to the write command to the host system after data corresponding to the write command is completely transferred to the buffer memory.
    Type: Application
    Filed: December 22, 2010
    Publication date: May 24, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Data accessing method for flash memory storage device having data perturbation module, and storage system and controller using the same
    Patent number: 8176267
    Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: May 8, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh