Abstract: A flash memory control circuit including a microprocessor unit, a first interface unit for connecting a flash memory, a second interface unit for connecting a computer host, an error correcting unit, a memory management unit, and a marking unit is provided. The memory management unit divides each page in the flash memory into a plurality of data bit areas, and a plurality of redundancy bit areas and a plurality of error correcting bit areas corresponding to the data bit areas, wherein each of the data bit areas has a plurality of sectors for respectively storing a sector data. The marking unit stores a data accuracy mark corresponding to each sector data in the corresponding redundancy bit area to record the status of the sector data. Thereby, the flash memory controller can effectively identify error data in the flash memory by using the error correcting codes and the data accuracy marks.

Abstract: A flash memory control circuit including a microprocessor unit, a first interface unit, a second interface unit, a buffer memory, a memory management unit, and a data read/write unit is provided. The memory management unit manages a plurality of flash memory units, wherein each of the flash memory units has a plurality of flash memories, each of the flash memories has a plurality of memory cell arrays, and each of the memory cell arrays at least has an upper page and a lower page. The memory management unit groups the memory cell arrays of the corresponding flash memories into a plurality of data transfer unit sets (DTUSs). The data read/write unit interleavingly transfers data to the flash memory units in units of the DTUSs. Thereby, the flash memory control circuit can transfer the data stably and the usage of the buffer memory can be reduced.

Abstract: A data access method for accessing a flash memory storage system, a storage system and a controller using the same are provided. A flash memory has a plurality of physical blocks, which are grouped into a system area, a data area, and a spare area. One or more variable tables are established to record transient information of each set of mother-child blocks of the data area and the spare area. The number of the variable table could be adjusted adaptively according to time required for writing the variable table into the system area, such that an overall data access efficiency of the flash memory storage system is enhanced.

Abstract: A data management method for a flash memory storage system having a cache memory is provided. The data management method includes writing data into a flash memory when a write command is executed, and determining currently a state of all the writing data which is temporarily stored in the cache memory. Wherein, if the state indicates that a time for writing all the writing data temporarily stored in the cache memory into a flash memory may exceed an upper limit processing time, a portion of the writing data temporarily stored in the cache memory is first written into the flash memory. Accordingly, the data management method may effectively avoid a delay caused by a flush command issued from the host for flushing the cache memory.

Abstract: A flash memory writing method for writing data into a flash memory storage system is provided. In the present method, a big data usage number and a small data usage number are counted for each logical unit in the flash memory storage system, so as to respectively represent the numbers of writing a big data and a small data into each the logical unit. When a host system writes new data into a logical unit in the flash memory storage system, the new data is written through different writing processes according to the big data usage number and the small data usage number of the logical unit. Thereby, the data writing efficiency is improved and the lifespan of the flash memory storage system is prolonged.

Abstract: A wrench for dental implant is provided, including a main structure, a ratchet element and a wrench arm. The main structure has a shape of long handle, and has a trench channel along the axis of handle. The ratchet element is confined inside the main structure, with the capability to move slight along the axis of the handle, and has a protruding tooth for protruding and engaging. One end of the wrench arm is engaged to the main structure, and extends beyond to outside. The main structure includes a plurality of marks on the outer surface close to the trench channel. In this manner, the wrench arm bends to leave the trench channel during the tightening operation of dental implant, the strength of exerted force can be controlled by reading the marks of the location where the wrench arm leaves the trench channel.

Abstract: A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page.

Abstract: A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system.

Abstract: A flash storage device and a testing method and a testing system for the flash storage device are provided. The testing system includes a testing apparatus and the flash storage device. The flash storage device includes a controller, a flash memory module, a plurality of peripheral pins and at least one test pin. The flash storage device receives an enable signal transmitted from the testing apparatus through the test pin. Subsequently, the controller outputs a signal to the testing apparatus through each peripheral pin based to the enable signal. Finally, the testing apparatus verifies the signal outputted by each peripheral pin.

Abstract: A keyboard module, including a base plate, a membrane circuit, keys and a frame set, is provided. The membrane circuit is disposed on the base plate and has touch portions. The keys are assembled to the base plate and correspond to the touch portions respectively. The frame set is assembled to the base plate and includes a first frame and a second frame. The first frame has a plurality of first ribs disposed in a staggered way. The second frame is connected to the first frame and located between the first frame and the base plate. The second frame has a plurality of second ribs disposed in a staggered way, wherein a width of a portion of the second ribs is smaller than a width of the corresponding first ribs, and the keys pass through the second frame and the first frame in sequence to protrude above the frame set.

Abstract: A display device is provided. The display device is adapted for a notebook computer. The display device includes a display panel, a bezel, a back shell, and a reinforced glass plate. The bezel includes a receiving recess and an opening. The display panel is disposed in the receiving recess. The bezel exposes a part of the display panel from the opening. The back shell is assembled with the bezel. The back shell and the bezel cooperatively define an accommodating space. The display panel is accommodated in the accommodating space. The reinforced glass plate is assembled to the bezel for covering the part of the display panel exposed by the opening of the bezel.

Abstract: A block management and replacement method for a flash memory is provided. The method includes grouping physical blocks of the flash memory into physical units and dividing the physical units as a usage area and a replacement area, wherein the physical blocks grouped into the same physical unit are accessed by using a multi-planes accessing command. The method also includes when one of the physical block of the physical unit in the usage area is damaged, replacing the physical unit having the damaged physical block with one physical unit selected from the replacement area and recording the undamaged physical block within the replaced physical unit if there is an applicable physical unit in the replacement area; and replacing the damaged physical block with one physical block selected from the replacement area if there is no applicable physical unit but an undamaged physical block in the replacement area.

Abstract: A memory managing method for a non-volatile memory and a controller using the same are disclosed. The controller includes a system wear leveling member for performing a first wear leveling process in a non-volatile memory for choosing a memory unit; and a subsystem wear leveling member for performing a second wear leveling process in the chosen memory unit for selecting a block from the chosen memory unit for data programming; whereby uneven use of the blocks of the chosen memory unit is avoided.

Abstract: A data transmission method suitable for transmitting data from a cache to a plurality of flash memory groups through a single data bus in a flash memory storage system is provided. The data transmission method includes sequentially sorting and grouping data to be written at continuous logical addresses in the cache in unit of logical blocks. The data transmission method further includes respectively transmitting the grouped sector data into the flash memory groups through the data bus in an interleaving manner, wherein data in the same logical block is transmitted and written into physical blocks of the same flash memory group. Thereby, the data is prevented from being written into different physical blocks, and accordingly the lifespan of the flash memory storage system is prolonged.

Abstract: A block management method for managing a flash memory is provided. The method includes dividing the flash memory into a cache area and a storage area and dividing the cache area into a plurality of cache sub-areas, wherein the storage area has a plurality of physical blocks and each cache sub-area contains at least one physical block. The method also includes configuring a plurality of logical blocks for mapping the physical blocks of the storage area, and allocating one of the cache sub-areas for each logical block, wherein when the host writes the data into the logical blocks, the data may be temporarily stored in the cache sub-areas allocated for the logical blocks. Accordingly, it is possible to increase efficiency of the flash storage system and avoid wearing of the physical blocks, so as to prolong a lifetime of the flash storage system.

Abstract: A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system.

Abstract: A block management method for a flash memory chip having multiple planes is provided, wherein each plane has a plurality of physical blocks. The method includes disposing a plurality of physical units, wherein each physical unit includes a physical block of each plane, and the physical blocks in the physical unit have a simultaneously-operable relationship. The method also includes writing data in a single plane access mode when a host system does not update all the physical blocks in an updated the physical unit. The method further includes writing the data in a multi-planes access mode when the host system updates all the physical blocks in the updated physical unit, wherein the physical blocks for writing the data have the simultaneously-operable relationship.

Abstract: A data management method, a controller and a storage apparatus thereof are provided. The method is adapted for a storage apparatus having a plurality of blocks. Parts of the blocks are linked to configure a plurality of mother and child blocks (M&C block). The data management method includes: (a) checking whether a mother and child block currently to be written with data is the same of a mother and child block which has been most lately written with data; (b) when it is determined that the mother and child block currently to be written with data is not the same of the mother and child block which has been most lately written with data, saving a transient data of the mother and child block currently to be written with data to a mother and child block transient relationship table.

Abstract: A wear leveling method for a flash is provided, wherein the flash memory includes a plurality of physical blocks grouped into at least a data area and a spare area. The method includes setting a first predetermined threshold value as a wear-leveling start value and randomly generating a random number as a memory erased count, wherein the random number is smaller than the wear-leveling start value. The method also includes counting the memory erased count each time when the physical blocks are erased and determining whether the memory erased count is smaller than the wear-leveling start value, wherein a physical blocks switching is performed between the data area and the spare area when the memory erased count is not smaller then the wear-leveling start value. Accordingly, it is possible to uniformly use the physical blocks, so as to effectively prolong a lifetime of the store system.

Abstract: A wear leveling method under limited system resources is provided, the wear levelling method is suitable for a non-volatile memory, the non-volatile memory is substantially divided into a plurality of blocks, and the blocks are at least grouped into a data area, a spare area and a substitution-transient area. The blocks within the data area may be divided into a plurality of lately-used blocks and a plurality of lately-unused blocks. The method includes only recording erase times of the lately-used blocks and blocks within the spare area and selecting a block used for the substitution-transient area is selected from the spare area according to a judgment condition of erase times of another block within the spare area plus a first threshold value. The method also includes performing a wear leveling procedure. Wherein, the selected block and the other block are selected in a random mode or a sequential mode.