Patents by Inventor Kaoru Yamamoto

Kaoru Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105463
    Abstract: There is provided a technique that includes: (a) loading a substrate into a process container at a loading temperature; (b) setting an interior of the process container to a film formation temperature; (c) forming a metal film on a surface of the substrate by supplying a process gas into the process container; (d) setting the interior of the process container to an unloading temperature lower than the loading temperature; and (e) unloading the substrate from the process container.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Koei KURIBAYASHI, Kaoru Yamamoto
  • Publication number: 20240093372
    Abstract: A technique includes at least one chamber including a process chamber that is capable of processing a substrate and a shower head arranged in an upstream of the process chamber; a gas supplier that is capable of supplying a gas into the process chamber via the shower head; a first exhaust pipe communicating with the shower head; a second exhaust pipe communicating with the process chamber; a first exhaust controller installed in the first exhaust pipe; a first heater installed in the first exhaust pipe; and a controller configured to be capable of: (a) controlling the gas supplier so as to supply a processing gas as the gas to the shower head, and (b) controlling the gas supplier so as to supply a non-processing gas as the gas to the shower head.
    Type: Application
    Filed: July 18, 2023
    Publication date: March 21, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Tadashi TAKASAKI, Atsushi Moriya, Kaoru Yamamoto, Naofumi Ohashi
  • Publication number: 20240096604
    Abstract: There is provided a technique that includes: a process chamber configured to process a plurality of substrates; and a plasma generator configured to generate plasma in the process chamber, the plasma generator including a first electrode part configured to extend from a lower side to an intermediate side of the process chamber, and a second electrode part configured to extend from an upper side to the intermediate side of the process chamber.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 21, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Yukinori ABURATANI, Kaoru YAMAMOTO
  • Patent number: 11925243
    Abstract: The jewelry member according to the present disclosure includes: a plurality of spherical bodies that are three-dimensionally arranged regularly and include an amorphous silicic acid; and a resin that is located in a gap among adjacent spherical bodies of the plurality of spherical bodies and includes a fluorescent dye.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 12, 2024
    Assignee: KYOCERA CORPORATION
    Inventors: Hiroyuki Hongo, Kaoru Yamamoto
  • Patent number: 11900872
    Abstract: To make a frame size of a display device having an external compensation function smaller than those of the known display devices. Each of a plurality of unit circuits configuring a gate driver includes a first output control transistor including a second conduction terminal connected to a first output terminal-connected to another unit circuit and a control terminal connected to a first internal node, a second output control transistor including a second conduction terminal connected to a second output terminal configured to output an on level signal for at least a part of a monitoring period and a control terminal connected to a second internal node, and an output circuit control transistor including a first conduction terminal connected to the first internal node and a second conduction terminal connected to the second internal node. A potential to be applied to a control terminal of the output circuit control transistor is switched between a potential of a high level and a potential of a low level.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 13, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Ryo Yonebayashi
  • Patent number: 11889762
    Abstract: The present disclosure provides: a magnetoresistive element having a large magnetoresistance change ratio (MR ratio); and a magnetic sensor, a reproducing head and a magnetic recording and reproducing device.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: January 30, 2024
    Assignee: National Institute for Materials Science
    Inventors: Yuya Sakuraba, Weinan Zhou, Kenichi Uchida, Kaoru Yamamoto
  • Patent number: 11830428
    Abstract: In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. A source driver includes an integration circuit that measures a current corresponding to the characteristic of a drive transistor. An emission driver applies a light-emission control signal to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. In a current measurement period, the flow of a current corresponding to the characteristic of the drive transistor into the integration circuit is stopped at an edge timing, which is a timing at which the level of at least one of the plurality of light-emission control clock signals (ECK1 to ECK4) changes.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: November 28, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto
  • Patent number: 11823623
    Abstract: A display device that includes pixel circuits, in each of which a plurality of types of transistors coexist, and that operates normally is implemented while suppressing an increase in processing cost. Each unit circuit includes a first control circuit (311), a first output circuit (321), and a second output circuit (322). The first output circuit (321) includes a first output terminal (38) connected to a first scanning signal line; a P-type transistor (M4) having a control terminal connected to a first internal node (N1), a first conductive terminal to which a gate high potential (VGH) is provided, and a second conductive terminal connected to the first output terminal (38); and a N-type transistor (M5) having a control terminal connected to the first internal node (N1), a first conductive terminal connected to the first output terminal (38), and a second conductive terminal to which a gate low potential (VGL) is provided.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: November 21, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto
  • Publication number: 20230368730
    Abstract: A display device includes a display control circuit configured to control a data-side drive circuit and a scanning-side drive circuit such that a drive period and a pause period alternate between one another. The display control circuit, in the pause period, such that voltage of corresponding data signal line is applied to first conduction terminal of drive transistor as bias voltage when light emission control transistor is in an off state and current corresponding to holding voltage of holding capacitor flows through display element when light emission control transistor is in an on state, causes the data-side drive circuit to output the bias voltage and apply the bias voltage to data signal lines and causes the scanning-side drive circuit to stop driving first scanning signal lines and selectively drive second scanning signal lines and selectively make light emission control lines inactive.
    Type: Application
    Filed: October 1, 2020
    Publication date: November 16, 2023
    Inventors: KAORU YAMAMOTO, KOHHEI TANAKA, RYO YONEBAYASHI
  • Publication number: 20230279550
    Abstract: There is provided a technique that includes: a flow rate controller configured to control a flow rate of fluid flowing in a pipe; an adjuster configured to supply an adjustment gas to at least a downstream side of the flow rate controller; and a controller configured to be capable of suppressing a phase change of the fluid, which is caused by a temperature drop due to adiabatic expansion, by supplying the adjustment gas from the adjuster according to a difference between an internal pressure of the flow rate controller and a pressure on the downstream side of the flow rate controller.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Applicant: Kokusai Electric Corporation
    Inventors: Kaoru YAMAMOTO, Kentaro GOSHIMA
  • Publication number: 20230279551
    Abstract: There is provided a configuration that includes: a first gas supply line configured to be capable of controlling a flow rate of a first precursor gas, which is generated by a first raw material, by a flow rate controller, and supplying the first precursor gas into the process chamber; and a second gas supply line configured to be capable of supplying a second precursor gas, which is generated by a second raw material, into the process chamber, wherein a flow rate of the second precursor gas is determined based on a pressure difference between a primary-side pressure of the flow rate controller installed at the first gas supply line and a supply pressure of the second precursor gas from the second gas supply line into the process chamber.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 7, 2023
    Applicant: Kokusai Electric Corporation
    Inventors: Kaoru YAMAMOTO, Kentaro GOSHIMA
  • Patent number: 11749222
    Abstract: The active matrix substrate includes a demultiplexer circuit disposed in a peripheral region. Unit circuits of the demultiplexer circuit each distribute a display signal from one signal output line to n source bus lines (n: two or greater). Each unit circuit includes n branch lines and n switching TFTs configured to perform individual on/off control of electrical connections of the branch lines to the source bus lines. The demultiplexer circuit includes a plurality of boost circuits each configured to boost a voltage applied to a gate electrode of a corresponding one of the switching TFTs. Each boost circuit includes: a set-and-reset unit configured to perform set operation of pre-charging a node connected to the gate electrode and reset operation of resetting the potential of the node at different timings; and a boost unit configured to perform boost operation of boosting the potential of the node pre-charged by the set operation.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: September 5, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto
  • Patent number: 11741897
    Abstract: With regard to a display device having an external compensation function, the occurrence of operational failure caused by off-leakage at a transistor is suppressed. A unit circuit configuring a gate driver is provided with a stabilization transistor including a control terminal, a first conduction terminal connected to a first internal node, and a second conduction terminal connected to a first control signal line, a stabilization circuit-configured to control a potential of the control terminal of the stabilization transistor-based on a potential of the first internal node, a first reset transistor including a control terminal, a first conduction terminal connected to a second output terminal, and a second conduction terminal connected to a first reference potential line, and a reset circuit configured to control a potential of the control terminal of the first reset transistor based on the potential of the first internal node.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 29, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto
  • Publication number: 20230094500
    Abstract: There is provided a technique that includes a container in which a gas is generated; a first pipe connected between the container and a reaction chamber and including a straight pipe portion; a first pressure measurer installed at a first position of the straight pipe portion, and configured to measure a pressure of the gas; a second pressure measurer installed at a second position on a further downstream side of a flow of the gas than the first position, and configured to measure a pressure of the gas; and a controller configured to be capable of calculating a flow rate of the gas flowing through the straight pipe portion based on a pressure loss of the straight pipe portion, which is calculated from a measurement signal from the first pressure measuring part and a measurement signal from the second pressure measuring part, and controlling the flow rate of the gas.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Applicant: Kokusai Electric Corporation
    Inventors: Kentaro GOSHIMA, Kaoru YAMAMOTO
  • Publication number: 20230102920
    Abstract: Provided is a novel thermoelectric conversion element with which the thermoelectric power generated in a direction orthogonal to both a temperature gradient and the magnetization can be increased without changing the thermoelectric conversion characteristic of a magnetic material.
    Type: Application
    Filed: March 12, 2021
    Publication date: March 30, 2023
    Applicant: NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yuya Sakuraba, Weinan Zhou, Kenichi Uchida, Kaoru Yamamoto
  • Publication number: 20230054492
    Abstract: In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. A source driver includes an integration circuit that measures a current corresponding to the characteristic of a drive transistor. An emission driver applies a light-emission control signal to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. In a current measurement period, the flow of a current corresponding to the characteristic of the drive transistor into the integration circuit is stopped at an edge timing, which is a timing at which the level of at least one of the plurality of light-emission control clock signals (ECK1 to ECK4) changes.
    Type: Application
    Filed: February 14, 2020
    Publication date: February 23, 2023
    Inventor: Kaoru YAMAMOTO
  • Publication number: 20230057970
    Abstract: In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. An emission driver that applies a light-emission control signal (EM) to each of a plurality of light-emission control lines includes a shift register formed of a plurality of unit circuits. The shift register generates a light-emission control signal (EM) to be applied to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. The display control circuit stops the outputs of the plurality of light-emission control clock signals (ECK1 to ECK4) throughout a current measurement period in which a current corresponding to the characteristic of the drive transistor is measured.
    Type: Application
    Filed: February 14, 2020
    Publication date: February 23, 2023
    Inventor: Kaoru YAMAMOTO
  • Patent number: 11538810
    Abstract: A wiring structure includes a first conductive pattern including doped polysilicon on a substrate, an ohmic contact pattern including a metal silicide on the first conductive pattern, an oxidation prevention pattern including a metal silicon nitride on the ohmic contact pattern, a diffusion barrier including graphene on the oxidation prevention pattern, and a second conductive pattern including a metal on the diffusion barrier.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: December 27, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunseok Lim, Minhyuk Cho, Kyung-Eun Byun, Hyeonjin Shin, Kaoru Yamamoto, Jungsoo Yoon, Soyoung Lee, Geuno Jeong
  • Publication number: 20220392403
    Abstract: A display device that includes pixel circuits, in each of which a plurality of types of transistors coexist, and that operates normally is implemented while suppressing an increase in processing cost. Each unit circuit includes a first control circuit (311), a first output circuit (321), and a second output circuit (322). The first output circuit (321) includes a first output terminal (38) connected to a first scanning signal line; a P-type transistor (M4) having a control terminal connected to a first internal node (N1), a first conductive terminal to which a gate high potential (VGH) is provided, and a second conductive terminal connected to the first output terminal (38); and a N-type transistor (M5) having a control terminal connected to the first internal node (N1), a first conductive terminal connected to the first output terminal (38), and a second conductive terminal to which a gate low potential (VGL) is provided.
    Type: Application
    Filed: September 17, 2019
    Publication date: December 8, 2022
    Inventor: Kaoru YAMAMOTO
  • Patent number: 11508557
    Abstract: A semiconductor manufacturing apparatus includes a process chamber. An insulating plate divides an interior space of the process chamber into a first space and a second space and thermally isolates the first space from the second space. A gas supplier is configured to supply a process gas to the first space. A radiator is configured to heat the first space. A stage is disposed within the second space and the stage is configured to support a substrate.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: November 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo An, Jeon-Il Lee, Kaoru Yamamoto, Jang-Hee Lee, Kee-Young Jun, Geun-O Jeong