Patents by Inventor Kaoru Yamamoto

Kaoru Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250115996
    Abstract: According to the present disclosure, it is possible to suppress a change in a state of a gas. There is provided a technique that includes: (a) adjusting at least one selected from the group of a pressure and a temperature of a buffer space in a buffer chamber when the temperature of the buffer space is out of a pre-set temperature range or the pressure of the buffer space is out of a pre-set pressure range; and (b) processing a substrate by supplying a gas via the buffer chamber to a process chamber in which the substrate is processed.
    Type: Application
    Filed: October 3, 2024
    Publication date: April 10, 2025
    Inventors: Kaoru YAMAMOTO, Naofumi OHASHI
  • Patent number: 12214694
    Abstract: There is provided a rechargeable battery evaluation device including: a charging controller configured to switch charging current of a rechargeable battery being charged with first current to second current; and a first state estimator configured to estimate a state of the rechargeable battery based on a feature of change in at least one of a voltage and a charging amount of the rechargeable battery due to switching from the charging current to the second current.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 4, 2025
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Yamamoto, Kaoru Koiwa, Hisaaki Hatano, Kenichi Fujiwara, Kohei Maruchi, Koji Takazawa, Yoshiyuki Isozaki, Shun Egusa, Tomokazu Morita
  • Publication number: 20250011930
    Abstract: There is provided a technique for stably controlling a gas flow rate even when the flow rate is difficult for an MFC to control. There is provided a technique that includes: a process vessel; a first gas pipe for a process gas; a flow rate measurer at the first gas pipe to measure a flow rate of the process gas; a second gas pipe connected to the first gas pipe for supplying a first inert gas to a tank storing source material; a first flow rate regulator at the second gas pipe to adjust a flow rate of the first inert gas; a first heater for adjusting temperature of the first inert gas; and a controller for adjusting the flow rate or the temperature of the first inert gas such that the flow rate of the process gas measured by the flow rate measurer becomes a predetermined flow rate.
    Type: Application
    Filed: September 19, 2024
    Publication date: January 9, 2025
    Inventors: Kentaro GOSHIMA, Yukinori ABURATANI, Kaoru YAMAMOTO
  • Patent number: 12190828
    Abstract: To realize frame narrowing of a display device that uses a display element driven by a current. A second scanning signal line drive circuit configured to drive second scanning signal lines each connected to a control terminal of a writing control transistor is constituted by a shift register composed of unit circuits equal in number to half a number of the second scanning signal lines. Each of the unit circuits included in the shift register collectively drives two of the second scanning signal lines adjacent to each other.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: January 7, 2025
    Assignee: SHARP DISPLAY TECHNOLOGY CORPORATION
    Inventor: Kaoru Yamamoto
  • Publication number: 20240404486
    Abstract: In a first transition period during which an operation mode transitions from a normal mode to a low power consumption mode, a VCOM generation unit in a power source IC changes a potential of a common electrode drive voltage VCOM from a potential of a first level (for example, 5 V) to a potential of a second level (for example, 12 V) so that a leakage current flowing through a pixel transistor is not generated during a pause period, a gate driver changes a potential of each gate bus line to 0 V, and a source driver changes a potential of each source bus line to 0 V.
    Type: Application
    Filed: March 29, 2024
    Publication date: December 5, 2024
    Inventors: KAORU YAMAMOTO, KOHHEI TANAKA, Keiichi YAMAMOTO
  • Publication number: 20240404485
    Abstract: In a first transition period during which an operation mode transitions from a normal mode to a low power consumption mode, a source driver changes the potential of each source bus line to 0 V, a gate driver sets all gate bus lines to be in a high impedance state in a state where a gate low power source voltage VGL (a potential of a second level: for example, ?7 V) is applied to all of the gate bus lines, and a power source IC sets a common electrode and a VGL line to be in a high impedance state.
    Type: Application
    Filed: March 29, 2024
    Publication date: December 5, 2024
    Inventors: KAORU YAMAMOTO, Kohhei Tanaka, Keiichi Yamamoto
  • Publication number: 20240387209
    Abstract: There is provided a technique capable of suppressing a variation within a substrate processing. There is provided a technique that includes performing a cycle a plurality of times, the cycle including: (a) storing a first process gas in a storage; (b) supplying the first process gas from the storage at a first temperature to a substrate after (a) to change a temperature of the storage to a second temperature lower than the first temperature; and (c) changing the temperature of the storage after supplying the first process gas to a third temperature after (b), wherein (a), (b) and (c) are sequentially performed in the cycle, and wherein the third temperature is kept within a predetermined temperature range while the cycle is performed the plurality of times.
    Type: Application
    Filed: March 25, 2024
    Publication date: November 21, 2024
    Applicant: KOKUSAI ELECTRIC CORPORATION
    Inventors: Masaru KADOSHIMA, Kaoru Yamamoto, Toshiyuki Kikuchi, Naofumi Ohashi
  • Publication number: 20240355287
    Abstract: When a current-driven display device with an internal compensation method operates in a pause driving mode, a non-light emission period according to a light emission duty is provided in both a refresh frame period and a non-refresh frame period, and an on-bias applying period for applying on-bias to a drive transistor in a pixel circuit is provided in both the non-light emission periods. In the non-light emission period in the refresh frame period, an on-bias applying period is provided in a period from when data writing with threshold compensation is performed to when the light emission period starts. Thus, even when the light emission duty is low, the difference in the stress state of the drive transistor between the refresh frame period and the non-refresh frame period is reduced.
    Type: Application
    Filed: September 30, 2021
    Publication date: October 24, 2024
    Inventors: Kohhei TANAKA, Masahito SANO, Kaoru YAMAMOTO, Ryo YONEBAYASHI, Adnan HEGANOVIC
  • Publication number: 20240321597
    Abstract: There is provided a technique capable of effectively performing a cleaning process. There is provided a technique that includes: a process chamber; a process gas supplier; a cleaning gas supplier; a substrate support including a substrate placing surface for supporting a product substrate or a dummy substrate whose diameter is smaller than that of the product substrate; and a controller capable of control operations for processing the product substrate by supplying the process gas; and performing a cleaning process on a cleaning target formed by the process gas entering between a back surface of the product substrate and the substrate placing surface, wherein the cleaning process is performed by supplying the cleaning gas to at least a portion of the substrate placing surface corresponding to an outer circumference of the dummy substrate in a state where the dummy substrate is supported on the substrate placing surface.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 26, 2024
    Applicant: Kokusai Electric Corporation
    Inventor: Kaoru YAMAMOTO
  • Publication number: 20240274090
    Abstract: To realize frame narrowing of a display device that uses a display element driven by a current. A second scanning signal line drive circuit configured to drive second scanning signal lines each connected to a control terminal of a writing control transistor is constituted by a shift register composed of unit circuits equal in number to half a number of the second scanning signal lines. Each of the unit circuits included in the shift register collectively drives two of the second scanning signal lines adjacent to each other.
    Type: Application
    Filed: July 5, 2021
    Publication date: August 15, 2024
    Inventor: Kaoru YAMAMOTO
  • Patent number: 12027119
    Abstract: In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. An emission driver that applies a light-emission control signal (EM) to each of a plurality of light-emission control lines includes a shift register formed of a plurality of unit circuits. The shift register generates a light-emission control signal (EM) to be applied to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. The display control circuit stops the outputs of the plurality of light-emission control clock signals (ECK1 to ECK4) throughout a current measurement period in which a current corresponding to the characteristic of the drive transistor is measured.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: July 2, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto
  • Patent number: 11996044
    Abstract: A display device includes a display control circuit configured to control a data-side drive circuit and a scanning-side drive circuit such that a drive period and a pause period alternate between one another. The display control circuit, in the pause period, such that voltage of corresponding data signal line is applied to first conduction terminal of drive transistor as bias voltage when light emission control transistor is in an off state and current corresponding to holding voltage of holding capacitor flows through display element when light emission control transistor is in an on state, causes the data-side drive circuit to output the bias voltage and apply the bias voltage to data signal lines and causes the scanning-side drive circuit to stop driving first scanning signal lines and selectively drive second scanning signal lines and selectively make light emission control lines inactive.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: May 28, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Kohhei Tanaka, Ryo Yonebayashi
  • Publication number: 20240162214
    Abstract: A display device includes an active matrix substrate including a plurality of pixels and a driver unit. The driver unit includes a flexible substrate, a first wiring pattern disposed on the flexible substrate, a demultiplexer circuit or a multiplexer circuit supported by the flexible substrate and connected to the first wiring pattern, and a source driver IC supported by the flexible substrate and connected to the first wiring pattern. The driver unit is connected to a display panel, and a TFT of the plurality of pixels and a TFT of the demultiplexer circuit or the multiplexer circuit have semiconductors different from each other.
    Type: Application
    Filed: October 9, 2023
    Publication date: May 16, 2024
    Applicant: Sharp Display Technology Corporation
    Inventors: KOHHEI TANAKA, KAORU YAMAMOTO, Keiichi YAMAMOTO, Ryo YONEBAYASHI
  • Publication number: 20240105463
    Abstract: There is provided a technique that includes: (a) loading a substrate into a process container at a loading temperature; (b) setting an interior of the process container to a film formation temperature; (c) forming a metal film on a surface of the substrate by supplying a process gas into the process container; (d) setting the interior of the process container to an unloading temperature lower than the loading temperature; and (e) unloading the substrate from the process container.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Koei KURIBAYASHI, Kaoru Yamamoto
  • Publication number: 20240096604
    Abstract: There is provided a technique that includes: a process chamber configured to process a plurality of substrates; and a plasma generator configured to generate plasma in the process chamber, the plasma generator including a first electrode part configured to extend from a lower side to an intermediate side of the process chamber, and a second electrode part configured to extend from an upper side to the intermediate side of the process chamber.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 21, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Yukinori ABURATANI, Kaoru YAMAMOTO
  • Publication number: 20240093372
    Abstract: A technique includes at least one chamber including a process chamber that is capable of processing a substrate and a shower head arranged in an upstream of the process chamber; a gas supplier that is capable of supplying a gas into the process chamber via the shower head; a first exhaust pipe communicating with the shower head; a second exhaust pipe communicating with the process chamber; a first exhaust controller installed in the first exhaust pipe; a first heater installed in the first exhaust pipe; and a controller configured to be capable of: (a) controlling the gas supplier so as to supply a processing gas as the gas to the shower head, and (b) controlling the gas supplier so as to supply a non-processing gas as the gas to the shower head.
    Type: Application
    Filed: July 18, 2023
    Publication date: March 21, 2024
    Applicant: Kokusai Electric Corporation
    Inventors: Tadashi TAKASAKI, Atsushi Moriya, Kaoru Yamamoto, Naofumi Ohashi
  • Patent number: 11925243
    Abstract: The jewelry member according to the present disclosure includes: a plurality of spherical bodies that are three-dimensionally arranged regularly and include an amorphous silicic acid; and a resin that is located in a gap among adjacent spherical bodies of the plurality of spherical bodies and includes a fluorescent dye.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 12, 2024
    Assignee: KYOCERA CORPORATION
    Inventors: Hiroyuki Hongo, Kaoru Yamamoto
  • Patent number: 11900872
    Abstract: To make a frame size of a display device having an external compensation function smaller than those of the known display devices. Each of a plurality of unit circuits configuring a gate driver includes a first output control transistor including a second conduction terminal connected to a first output terminal-connected to another unit circuit and a control terminal connected to a first internal node, a second output control transistor including a second conduction terminal connected to a second output terminal configured to output an on level signal for at least a part of a monitoring period and a control terminal connected to a second internal node, and an output circuit control transistor including a first conduction terminal connected to the first internal node and a second conduction terminal connected to the second internal node. A potential to be applied to a control terminal of the output circuit control transistor is switched between a potential of a high level and a potential of a low level.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 13, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Ryo Yonebayashi
  • Patent number: 11889762
    Abstract: The present disclosure provides: a magnetoresistive element having a large magnetoresistance change ratio (MR ratio); and a magnetic sensor, a reproducing head and a magnetic recording and reproducing device.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: January 30, 2024
    Assignee: National Institute for Materials Science
    Inventors: Yuya Sakuraba, Weinan Zhou, Kenichi Uchida, Kaoru Yamamoto
  • Patent number: 11830428
    Abstract: In a display device having an external compensation function, a decrease in compensation accuracy caused by coupling noise generated in a data signal line is prevented. A source driver includes an integration circuit that measures a current corresponding to the characteristic of a drive transistor. An emission driver applies a light-emission control signal to each light-emission control line on the basis of a plurality of light-emission control clock signals (ECK1 to ECK4) outputted from a display control circuit. In a current measurement period, the flow of a current corresponding to the characteristic of the drive transistor into the integration circuit is stopped at an edge timing, which is a timing at which the level of at least one of the plurality of light-emission control clock signals (ECK1 to ECK4) changes.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: November 28, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kaoru Yamamoto