Patents by Inventor Kaoru Yamamoto

Kaoru Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170000429
    Abstract: Provided is a mobile X-ray apparatus which can be manually moved even in a case where a battery is exhausted. The mobile X-ray apparatus according to the present invention is configured to include a motor that drives a driving wheel of a mobile cart via a clutch, a battery that supplies electric power to the motor, a cart manipulation unit that manipulates movement of the mobile cart, and a selector switch that switches between two manipulation states which are a normal manipulation state and a manual manipulation state of the mobile cart. The motor is configured to brake when electric power stops being supplied from the battery. In a case where the manual manipulation state is selected, electric power stops being supplied from the battery to the motor, and the driving wheel and the motor can be controlled so as to be attached to and be detached from each other.
    Type: Application
    Filed: January 8, 2015
    Publication date: January 5, 2017
    Applicant: HITACHI, LTD.
    Inventors: Fumihito NOSE, Kaoru YAMAMOTO
  • Publication number: 20160372068
    Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).
    Type: Application
    Filed: February 25, 2014
    Publication date: December 22, 2016
    Inventors: Kaoru YAMAMOTO, Yasuyuki OGAWA
  • Patent number: 9520097
    Abstract: In a display control circuit (200) of a display device, an image pattern detection portion (230) detects whether an image is an anti-flicker pattern or not, and when it is an anti-flicker pattern, a backlight source is driven (typically, such that its luminance changes in the opposite phase relative to luminance changes that would occur), on the basis of predicted values, which are predetermined so as to compensate for the luminance changes that would occur. Moreover, the backlight is not turned on during the scanning period. As a result, flicker due to current leakage, etc., can be reduced or eliminated in a display device for which a scanning period and a scan stop period are set.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 13, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yutaka Takamaru, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Noriaki Yamaguchi, Shigeyasu Mori
  • Patent number: 9404180
    Abstract: The disclosed deposition device for forming a thin film using a starter gas comprising an organic metal compound is provided with: a processing container 22; a mounting platform 28 which has a heater 34 for heating the workpiece W; a gas introduction mechanism 80 which introduces the starter gas toward the area more exterior than the outer peripheral end of the workpiece W on the mounting platform 28; an internal partition wall 90 which is disposed such that the lower end of said processing space contacts the mounting platform 28 to form gas outlets 92 between the lower portion of the space and the edges of the mounting platform 28; and a orifice forming member 96 which extends radially inward toward the mounting platform 28 and forms an orifice 98 communicating with the gas outlet 92.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: August 2, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Masamichi Hara, Kaoru Yamamoto, Atsushi Gomi, Satoshi Taga
  • Patent number: 9335854
    Abstract: A plurality of first sensor pixel circuits each sensing light during a sensing period when a backlight is turned on and retaining the amount of sensed light otherwise in accordance with a clock signal and a plurality of second sensor pixel circuits each sensing light during a sensing period when the backlight is turned off and retaining the amount of sensed light otherwise in accordance with a clock signal are arranged in a pixel region. The sensor pixel circuits of two types are connected to different output lines, so that a difference between two output signals is obtained at the outside of the sensor pixel circuit. The sensor pixel circuits described above are used for detecting a difference between an amount of light to be incident when the backlight is turned on and an amount of light to be incident when the backlight is turned off.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: May 10, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yasuhiro Sugita, Kohhei Tanaka, Kaoru Yamamoto, Hiromi Katoh
  • Patent number: 9336736
    Abstract: Provided is a liquid crystal display device with reduced power consumption employing a CS drive method. A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: May 10, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kaoru Yamamoto, Seiji Kaneko, Yasuyuki Ogawa, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru, Shigeyasu Mori
  • Patent number: 9330782
    Abstract: A shift register 10 is configured such that m unit circuits 11 each including a shift unit 12 and three buffer units 13r, 13g, and 13b are in a multi-stage cascade connection and that 3m signals in total including three signals from each stage are outputted. The m shift units 12 perform a shift operation, and a first signal Y is outputted from each stage. When a clock signal CK is at a high level, the first signal Y rises higher than a normal high level due to bootstrapping. The buffer unit 13r controls an output signal YR to be at a high level based on the buffer control signal CR and the first signal Y. A buffer control circuit 7 controls buffer control signals CR, CG, and CB to be at a high level for a time period shorter than a half cycle of the clock signal. With this, a shift register with a reduced circuit amount and low power consumption is provided.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: May 3, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kaoru Yamamoto, Yasuyuki Ogawa
  • Patent number: 9310911
    Abstract: A semiconductor layer for an active element included in each of a plurality of pixels in a display section is constituted by an oxide layer containing at least one element selected from the group consisting of In, Ga, and Zn. There is provided, for the display section, a liquid crystal panel's timing controller (13) configured to carry out control so that (i) a length of a first period during which image data is written is not more than twice that of the second period and/or (ii) one (1) frame period is longer than 16.7 msec.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: April 12, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yasuhiro Sugita, Kazutoshi Kida, Shinji Yamagishi, Yuhji Yashiro, Hiroyuki Ogawa, Shigeyasu Mori, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Seiichi Uchida, Yutaka Takamaru
  • Publication number: 20160063955
    Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.
    Type: Application
    Filed: February 25, 2014
    Publication date: March 3, 2016
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru YAMAMOTO, Yasuyuki OGAWA, Akihiro ODA, Masahiro TOMIDA
  • Patent number: 9261746
    Abstract: In order to suppress crosstalk between a pixel electrode and a source line to reduce flicker, an LCD device includes: gate lines 102 and source lines 105 which are provided in a grid pattern; pixel electrodes 111 arranged in a matrix pattern so as to correspond to intersections of the gate lines and the source lines; a transparent auxiliary capacitor electrode 109; and switching elements 121 configured to apply an image signal voltage supplied from the source line 105 to the pixel electrode 111 according to a scanning signal applied from the gate line 102. The switching element 121 is formed by using an oxide semiconductor layer 104, and the transparent auxiliary capacitor electrode 109 is provided between the source line 105 and the pixel electrode 111.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: February 16, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Seiichi Uchida, Seiji Kaneko, Yasuyuki Ogawa, Kaoru Yamamoto, Kohhei Tanaka, Yutaka Takamaru, Shigeyasu Mori
  • Publication number: 20160042806
    Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.
    Type: Application
    Filed: February 12, 2014
    Publication date: February 11, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yasuyuki OGAWA, Kaoru YAMAMOTO, Akihiro ODA, Masahiro TOMIDA
  • Publication number: 20150357222
    Abstract: A cooling processing apparatus includes: a processing vessel; an electrostatic chuck installed in the processing vessel, the electrostatic chuck having a mounting surface on which an object to be processed is mounted; a cooling mechanism configured to cool the electrostatic chuck; and a lamp heating device configured to remove moisture attached to the mounting surface. Further, a method for operating the cooling processing apparatus includes: decompressing the space in the processing vessel by using the exhaust device; removing the moisture attached to the mounting surface of the electrostatic chuck by using the lamp heating device; and cooling the electrostatic chuck by using the cooling mechanism after the removal of the moisture performed by the lamp heating device is terminated.
    Type: Application
    Filed: May 26, 2015
    Publication date: December 10, 2015
    Inventors: Tetsuya MIYASHITA, Masamichi HARA, Naoyuki SUZUKI, Kaoru YAMAMOTO, Kouji MAEDA
  • Publication number: 20150349668
    Abstract: Provided is an electrostatic attraction apparatus in which a first insulating layer is formed on a base in an electrostatic chuck. A first portion of the first insulating layer extends on a first face of the base and a second portion of the first insulating layer extends on at least a portion of a second face of the base. An attraction electrode is formed on the first portion of the first insulating layer. A second insulating layer is formed on the first portion of the first insulating layer and the attraction electrode. A conductor pattern extends from the attraction electrode and provides a power supply terminal on the second portion of the first insulating layer. A contact part of a terminal member urged by an urging unit is in contact with the power supply terminal. The terminal member is connected with a wiring line connected to a supply power.
    Type: Application
    Filed: May 26, 2015
    Publication date: December 3, 2015
    Inventors: Kaoru Yamamoto, Shinji Orimoto, Naoyuki Suzuki
  • Publication number: 20150343836
    Abstract: A transfer sheet is provided, whereby a T-shirt or the like can be printed in few steps by means of an electronic image forming device that uses powdered toner, liquid ink, or the like containing a plastic resin. By means of mirror-image printing a picture pattern, which is an electronic image, onto a first sheet, aligning the first sheet and a second sheet, and heat-pressing, a coating is spread over a portion of the picture pattern printed onto the first sheet. The first sheet has a structure including a mold release layer, a resin layer, and a porous resin layer in a substrate, and the second sheet includes a mold release layer, a resin layer, an adhesive layer, and a colored porous resin layer in a substrate.
    Type: Application
    Filed: August 7, 2015
    Publication date: December 3, 2015
    Inventor: Kaoru YAMAMOTO
  • Patent number: 9202728
    Abstract: A substrate mounting mechanism on which a target substrate is placed is provided. The substrate mounting mechanism includes a heater plate, which has a substrate mounting surface on which the target substrate is placed and has a heater embedded therein to heat the substrate to a deposition temperature at which a film is deposited. The substrate mounting mechanism also includes a temperature control jacket, which is formed to cover at least a surface of the heater plate other than the substrate mounting surface and adjusts the temperature to a non-deposition temperature below the deposition temperature.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: December 1, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masamichi Hara, Atsushi Gomi, Shinji Maekawa, Satoshi Taga, Kaoru Yamamoto
  • Patent number: 9121515
    Abstract: A substrate processing device includes a depressurizable hot wall chamber having a sidewall with a temperature which becomes higher than room temperature and a first substrate transferring port provided in the sidewall, a depressurizable transfer chamber having a transfer arm mechanism and a second substrate transferring port, and a gate valve unit provided between the hot wall chamber and the transfer chamber. The gate valve unit includes: a housing having a sidewall provided with communicating holes, a first housing substrate transferring port, and a second housing substrate transferring port; a valve body which is elevatable in the housing; and a double sealing structure having a first sealing member and a second sealing member provided at an outer side of the first sealing member. The communicating holes communicate a gap between the first sealing member and the second sealing member with an internal space of the housing.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: September 1, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kaoru Yamamoto, Masamichi Hara, Tetsuya Miyashita
  • Publication number: 20150136027
    Abstract: A trap mechanism for trapping exhaust gas from a process chamber. The trap assembly includes a housing containing a plurality of trap units. The plurality of trap units are arranged successively along a flow direction of said exhaust gas. Each trap unit includes a set of trap panels parallel to each other and spaced apart from each other. The two opposite surfaces with a larger area of each trap panel are oriented substantially parallel to a flow direction of the exhaust gas flow. The two opposite surfaces with a smaller area of each trap panels are oriented orthogonal to the exhaust gas flow.
    Type: Application
    Filed: September 19, 2014
    Publication date: May 21, 2015
    Inventors: Masamichi HARA, Kaoru YAMAMOTO, Yasushi MIZUSAWA
  • Patent number: D762891
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 2, 2016
    Assignee: KOITO MANUFACTURING CO., LTD.
    Inventors: Shigeyuki Watanabe, Kaoru Yamamoto, Kazutaka Kosugi, Shinji Sato
  • Patent number: D762892
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 2, 2016
    Assignee: KOITO MANUFACTURING CO., LTD.
    Inventors: Kazutaka Kosugi, Kaoru Yamamoto
  • Patent number: D765287
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 30, 2016
    Assignee: KOITO MANUFACTURING CO., LTD.
    Inventors: Kazutaka Kosugi, Kaoru Yamamoto