Abstract: Provided is an X-ray imaging device having a foldable arm unit for supporting an X-ray tube, and an operating unit for operating the X-ray tube, on a joint of arms constituting the arm unit. The operating unit is, for instance, a display unit serving also as the operating unit (display unit with a touch panel), and it is detachable from the joint of the arms. As another operating unit, a handle for operating the arm unit is provided. The handle for operating the arm unit can be provided with an operating switch for operating the X-ray tube. With this configuration, the X-ray imaging device being superior in operability and easy in checking the displayed information can be provided, at any height the X-ray tube is positioned.

Abstract: An active matrix substrate includes a demultiplexer circuit arranged in a peripheral region. Each unit circuit in the demultiplexer circuit includes n switching TFTs. The demultiplexer circuit includes a boost circuit capable of boosting a voltage applied to a gate electrode of the switching TFT. The boost circuit includes a set unit configured to perform a set action, a boost unit configured to perform a boost action, and a reset unit configured to perform a reset action. The set unit includes a setting TFT including a drain electrode connected to the drive signal line and a source electrode connected to a node connected to the gate electrode of the switching TFT. When the set unit performs the set action, a first signal voltage is supplied from the drive signal line to the drain electrode of the setting TFT, and a second signal voltage higher than the first signal voltage is supplied to the gate electrode of the setting TFT.

Abstract: An active matrix substrate includes a demultiplexer circuit arranged in a peripheral region, and a power source circuit configured to supply power source voltages at a plurality of levels to the demultiplexer circuit. The demultiplexer circuit includes a boost circuit configured to increase a voltage to be applied to a gate electrode of a switching TFT. The boost circuit includes a set up unit to be driven by a first drive signal to pre-charge a node coupled to the gate electrode, a reset unit to be driven by a second drive signal to reset a potential of the node, and a boost unit to be driven by a third drive signal to increase the potential of the node pre-charged by the set up unit. An amplitude of the first drive signal and an amplitude of the second drive signal are identical to each other. An amplitude of the third drive signal differs from the amplitudes of the first drive signal and the second drive signal.

Abstract: Provided is an active matrix substrate (100) that includes multiple pixel TFTs (10), multiple gate wiring lines (GL) along which a scanning signal is supplied to the multiple pixel TFTs, multiple source wiring lines (SL) along which a display signal is supplied to the multiple pixel TFTs, a gate driver (20) that drives multiple gate wiring lines, and a source driver (30) that drives multiple source wiring lines. At least one of the gate driver and the source driver includes a current mirror circuit (70). The current mirror circuit is configured with two oxide semiconductor TFTs (71c and 72c) each of which includes an oxide semiconductor layer.

Abstract: Provided is a semiconductor device having a plurality of memory cells (MC1 and MC2), in which each of the plurality of memory cells (MC1 and MC2) includes: a memory transistor (10M) having an oxide semiconductor layer (17M) as an active layer; and a first selection transistor (10S) having a crystalline silicon layer (13S) as the active layer and connected to the memory transistor (10M) in series.

Abstract: Provided is an active substrate that is capable of performing high-speed scanning for setting specific scan signal lines to be active at the same time. Each of the shift registers (4) in an N-th stage shift register in two shift register blocks (2 and 3) outputs an out signal in such a manner that neighboring scan signal lines (GLn and GLn+1) are active at the same time.

Abstract: Provided is a mobile X-ray apparatus that is capable of safely charging multiple mobile X-ray apparatuses. A power supply device 10 includes a plug 7; an electrical outlet 8; a battery 12; a control unit 20; a current detector 26; and a power supply circuit 30. The power supply circuit 30 includes a power limiting circuit 40; an external output circuit 50; and a charging circuit 60. The power limiting circuit 40 limits power together with the control unit 20. In the power supply circuit 30, i) if an external output circuit 50 side is current-limited, charging is preferentially performed, and ii) if the charging circuit 60 side is current-limited, power is output preferentially to external equipment. In the power supply circuit 30, the current of one current path is limited, and a large amount of current is allowed to flow preferentially in the other current path.

Abstract: In a forward shift operation, a second input signal having a higher voltage than a voltage of a first input signal is input to a second gate terminal in a case that a first gate terminal of a first transistor is charged, and a fourth input signal having a higher voltage than a voltage of a third input signal is input to a third gate terminal in a case that the first gate terminal of the first transistor is discharged. In a backward shift operation, the fourth input signal having a higher voltage than a voltage of the third input signal is input to the third gate terminal in a case that the first gate terminal of the first transistor is charged, and the second input signal having a higher voltage than a voltage of the first input signal is input to the second gate terminal in a case that the first gate terminal of the first transistor is discharged.

Abstract: A display device includes a display panel including gate lines, and drive circuits sequentially scanning the gate lines and supplied with any of M-phase (M: three or greater) drive signals having different phases and a first potential or a second potential (lower) at predetermined cycles. The drive circuit includes netA(n) whose potential changes by one drive signal with the first/second potential as reference, and an output circuit switching a corresponding gate line to a selected/unselected state and including at least one first output switch including a gate connected to netA(n+1) of a first drive circuit different from the drive circuit, a drain supplied with the drive signal, and a source connected to the gate line. Difference between the potential of netA(n+1) in case of switching the gate line to the unselected/selected state and the reference potential in netA(n+1) is equal to difference between the first and second potentials or greater.

Abstract: Provided is an active substrate that is capable of performing high-speed scanning for setting specific scan signal lines to be active at the same time. Each of the shift registers (4) in an N-th stage shift register in two shift register blocks (2 and 3) outputs an out signal in such a manner that neighboring scan signal lines (GLn and GLn+1) are active at the same time.

Abstract: The display device includes drive circuits 301 provided in correspondence to the gate lines, respectively, and alternately switches a scanning period for scanning the gate lines and a non-scanning period during one vertical scanning period. The drive circuit 301 includes netA(n), an output switching element M5 connected to netA(n), and a reset circuit R. The output switching element M5 applies a selection voltage to the gate line GLn. The potential of netA(n) changes between a first potential that is equal to or higher than a threshold voltage of the output switching element M5, and a second potential that is lower than the first potential. In the drive circuit 301 wherein a period while netA(n) thereof has the second potential overlaps with the non-scanning period, the reset circuit R resets the potential of netA(n) to the second potential, before the resumption of the scanning period after the non-scanning period.

Abstract: Provided is a technique of causing less display irregularities to occur when the scanning of the gate lines is resumed in a display device in which the scanning of gate lines is performed intermittently. A display device includes a display panel, and a driving circuitry that includes a plurality of drive circuits for scanning gate lines. The driving circuitry alternately switches a scanning period in which the gate lines are scanned, and a non-scanning period in which the scanning of the gate lines is suspended, during one vertical scanning period, according to a control signal. Each driving circuit 301n includes a first switching element N that applies a selection voltage to the gate line; an internal line netA; a second switching element A that charges the internal line netA to a first potential; and a third switching element B that includes a drain electrode connected to the internal line netA, and a source electrode having a second potential that is lower than the first potential.

Abstract: An active matrix substrate includes a demultiplexer circuit which includes a plurality of DMX circuit TFTs. Each of the DMX circuit TFTs includes a front-gate electrode (FG) supplied with a control signal from one of a plurality of control signal main lines ASW, BSW and a back-gate electrode (BG) supplied with a back-gate signal which is different from the control signal. The plurality of DMX circuit TFTs includes first DMX circuit TFTs (T1a, T1b) and second DMX circuit TFTs (T2a, T2b). The back-gate electrode of each of the first DMX circuit TFTs (T1a, T1b)is connected with a first back-gate signal main line (BGL(1)) which supplies a first back-gate signal and, the back-gate electrode of each of the second DMX circuit TFTs (T2a, T2b)is connected with a second back-gate signal main line (BGL(2)) which supplies a second back-gate signal which is different from the first back-gate signal.

Abstract: A shift register circuit can achieve high definition of a display device with the smallest possible number of elements without causing defective operation. A unit circuit is provided with a thin film transistor functioning as an output control transistor; a thin film transistor precharging an internal node based on an on-level signal outputted from an output terminal of a previous stage; two thin film transistors provided in series with each other between the output terminal of the previous stage and the internal node of this stage; a thin film transistor provided between the internal node and an output terminal; and a thin film transistor pulling down the output terminal. The thin film transistors go to an on state only for a quarter period of a clock cycle which is a part of a period during which the output terminal of the previous stage is pulled down.

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: In a current measurement period set in a pause period, a display device of the present invention applies measurement voltages to data lines (S1 to Sm) and measures currents outputted to monitoring lines (M1 to Mm) from m pixel circuits (18), and then applies data voltages generated corresponding to video signals to the data lines (S1 to Sm).

Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).

Abstract: A shift register circuit can achieve high definition of a display device with the smallest possible number of elements without causing defective operation. A unit circuit is provided with a thin film transistor functioning as an output control transistor; a thin film transistor precharging an internal node based on an on-level signal outputted from an output terminal of a previous stage; two thin film transistors provided in series with each other between the output terminal of the previous stage and the internal node of this stage; a thin film transistor provided between the internal node and an output terminal; and a thin film transistor pulling down the output terminal. The thin film transistors go to an on state only for a quarter period of a clock cycle which is a part of a period during which the output terminal of the previous stage is pulled down.

Abstract: The method of forming a thin film feeds a raw material gas causing a reversible decomposition reaction toward an upper surface of substrate placed on a placing table in a processing container; decomposes the raw material gas with a predetermined decomposing scheme thereby forming a thin film of the raw material gas on the surface of the substrate; and feeds a decomposition restraint gas having a characteristic of restraining a thermal decomposition of the raw material gas separately from the raw material gas toward a peripheral portion of the substrate when the raw material gas is fed to the substrate, thereby restraining the thermal decomposition of the raw material gas and selectively preventing the thin film from being formed in the peripheral portion of the substrate.

Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.