Abstract: The present technology relates to an imaging device and an electronic device that enable highly accurate adjustment of a focus position and a camera shake correction position. The device includes: a lens that focuses subject light; an imaging element that photoelectrically converts the subject light from the lens; a circuit substrate including a circuit that externally outputs a signal from the imaging element; an actuator that drives the lens with a Pulse Width Modulation (PWM) waveform in at least one of an X-axis direction, a Y-axis direction, or a Z-axis direction; and a detection unit that detects a magnetic field generated by a coil included in the actuator. The actuator drives the lens to move a focus, or drives the lens to reduce an influence of camera shake. The present technology can be applied to the imaging device.

Abstract: The present technology relates to an imaging apparatus and an electronic apparatus that are capable of adjusting a focal position with high accuracy. There are provided a lens that collects subject light, an image sensor that photoelectrically converts the subject light from the lens, a circuit substrate including a circuit that outputs a signal from the image sensor to the outside, an actuator that drives the lens with a pulse width modulation (PWM) waveform, and a detection unit that detects a magnetic field generated by a coil included in the actuator. The detection unit detects an induced electromotive force generated by the magnetic field. In addition, the detection unit detects a position of the lens from the induced electromotive force. The present technology can be applied to an imaging apparatus.

Abstract: The present disclosure relates to an inspection apparatus and an inspection method, and a program that enable inspection of the performance of an image pickup element. Generation of collimated light and transmission of part of the collimated light through a transmission filter having a light-blocking face provided with circular holes arranged regularly, causes conversion to rays of columnar collimated light arranged regularly. An image including the rays of columnar collimated light arranged regularly, is captured by an image pickup element being inspected. Then, acquisition of the difference between the image captured by the image pickup element being inspected and an ideal image captured by an ideal image pickup element and comparison between the difference and a threshold, result in inspection of the performance of the image pickup element being inspected The present disclosure can be applied to the manufacturing of an image pickup device.

Abstract: An imaging apparatus includes an imaging structure. The imaging structure includes an imaging element that converts received light into electric charge, a transparent substrate disposed on the imaging element, at least one lens disposed on the transparent substrate, and an air cavity between the transparent substrate and the at least one lens.

Abstract: There is provided an imaging apparatus including: a solid state image sensor configured to generate a pixel signal by photoelectric conversion in accordance with a light amount of an incoming light; an integrated configuration unit configured to integrate a function for fixing the solid state image sensor and a function for removing an infrared light of the incoming light.

Abstract: An imaging apparatus with reduced flare includes an imaging structure including a solid state imaging element (1) and a transparent substrate (2) disposed on the imaging element. The imaging apparatus includes a circuit substrate (7) including a circuit, a spacer (10) including at least one fixing portion (11) that guides the imaging structure to a desired position on the circuit substrate (7) when the imaging structure is mounted on the circuit substrate, and a light absorbing material (13) disposed on at least one side surface of the imaging structure such that that light absorbing material (13) is between the imaging structure and the at least one fixing portion.

Abstract: A camera module includes an imaging device. The imaging device has a solid-state image sensor and a glass substrate bonded to a light-incident side of the solid-state image sensor. The solid-state image sensor and the glass substrate together form an integral body. A circuit substrate is electrically coupled to the solid-state image sensor. A spacer fixes a position of the imaging device relative to the circuit substrate. The spacer has a fixing structure. The fixing structure has a plurality of first surfaces positioned closer to the imaging device than at least one second surface of the spacer. The at least one second surface of the spacer is separated from the imaging device by adhesive.

Abstract: An imaging optical system according to the present disclosure includes: a lens; and an optical member, in which the optical member is configured such that a light transmittance value at least in a peripheral portion is larger than a light transmittance value in a central portion. Furthermore, a camera module according to the present disclosure includes the imaging optical system of the present disclosure. Furthermore, an electronic device according to the present disclosure includes a solid-state imaging element and the imaging optical system of the present disclosure.

Abstract: Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second squaring circuit receives a differential subtraction voltage of the first input voltage and the second input voltage. Outputs of the first and second squaring circuits are first and second terminal voltages of the first and second diode-connected MOS transistors. A differential voltage between the first and second terminal voltages corresponds to the product of the first and second input voltages.

Abstract: Disclosed is a variable gain circuit, which operates in a region where the gain varies substantially exponentially with respect to a control voltage, having an operation region in which the gain varies substantially with an exponential function {(?{square root over (1?x)}??{square root over (2)})2+K}/{(?{square root over (1+x)}??{square root over (2)})2+K} where 0?K?1 and x is a variable corresponding to the control voltage. The denominator and the numerator of the above function are given by a first sum current and a second sum current, respectively. The first sum current is a sum of the drain current of a first transistor and a constant current, and the second sum current is a sum of the drain current of a second transistor and the constant current. The first and second transistors have sources grounded, having gates connected common and supplied with a bias voltage, and having back-gates supplied with control voltages differentially.

Abstract: Disclosed is a variable gain circuit including a gain change region in which the gain is changed substantially exponentially as a function of a control voltage. The gain is changed in the gain change region substantially exponentially based on a function {(1+x)2+K}/{1?x}2+K}, where x is a control voltage and K is a parameter of K?1. The parameter K of the function is about equal to 0.21. The denominator and the numerator of the function are proportionate to driving currents of OTAs (operational transconductance amplifiers). Or, the denominator and the numerator of the above function are constituted by output currents of a MOS differential pair and a quadritail cell that includes four transistors driven by a common tail current. Outputs of two of the transistors, receiving a differential input voltage, are connected in common and outputs of the other two of the transistors, receiving the common mode voltage of the differential input voltage, are connected in common.

Abstract: A correction processing section 1 performs a color correction such that a movement amount indicating how much input values of image signals should be moved for the purpose of color correction becomes smaller as the distance between the input values and the coordinates of the center of region to be corrected becomes larger in the region to be corrected, based on the input values of the input signals (L signal, *a signal, *b signal), conditional data (such as radius r) defining a local region to be corrected, the coordinates (Lc, *ac, *bc) of the center of the region to be corrected and the coordinates (Lm, *am, *bm) of the center of an ideal color region to be targeted.

Abstract: Disclosed is a phase shifting circuit that includes a PLL loop in which a reference frequency received is branched into first and second signals. The first signal becomes one input to a phase comparator and the second signal becomes another input to the phase comparator after being shifted in phase via a phase shifter. The output of the phase comparator is supplied to one input terminal of a differential amplifier via a low-pass filter. The amount of phase shift of the phase shifter is controlled by the output signal of the differential amplifier. The amount of phase shift of the phase shifter is decided by a reference voltage applied to another input terminal of the differential amplifier.

Abstract: Disclosed is a reference voltage circuit including a first I-V(current-to-voltage) converter, a second I-V converter, a current mirror and a control circuit. The first I-V converter includes a parallel connection of a diode and a resistor, and the second I-V converter includes parallel-connected diodes, series-connected resistors connected in parallel with the diodes, and a resistor connected between the diodes and the ground. The current mirror supplies currents to the first and second I-V converters. The control circuit controls so that a preset output voltages of the first and second I-V converters will be equal. A mid-point terminal voltage of the first or second I-V converter is used as a reference voltage Vref.

Abstract: Disclosed is a complex elliptic filter having an order of three or higher which receives two differential signals that differ in phase from each other by 90 degrees are applied and outputs two differential signals that differ in phase from each other by 90 degrees. The complex filter circuit has internally at least two circuit blocks that include a capacitor connected in series with a coupler (gyrator). The complex filter is a third-order inverse Chebychev filter having an equiripple stopband of 40-dB attenuation amount. Alternatively, the coupler (gyrator) between elliptic capacitors is removed. Alternatively, the elliptic capacitors are made substantially equal to the capacitor arranged in parallel therewith. Alternatively, the gm value of an OTA and the capacitance value are each in an integral ratio represented substantially by a geometric progression of 2.

Abstract: Disclosed is a temperature sensor circuit including a bipolar differential pair driven by a constant current and having an emitter area ratio of 1:N (N>1) and two MOS transistors having the transistor size ratio of K:1 (K>1) connected as an active load to the bipolar differential pair. A reference voltage is applied to one of the transistors of the bipolar differential pair. The other transistor has a base and a collector connected together. A desired voltage is output between the bases of the two transistors of the bipolar differential pair. A plural number of the temperature sensor circuits may be connected in cascade (FIG. 3).

Abstract: Disclosed is a buffer circuit including a source follower circuit comprising a MOS transistor which is driven by a current source. The MOS transistor has a gate to which an input voltage is supplied, a source from which an output voltage is output and a back gate supplied with a back gate voltage for being controlled to provide for a desired value of the source voltage. There is provided a second MOS transistor, to a gate of which a bias voltage is supplied, and a source of which is connected to a non-inverting input terminal of an OP amp.

Abstract: Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second squaring circuit receives a differential subtraction voltage of the first input voltage and the second input voltage. Outputs of the first and second squaring circuits are first and second terminal voltages of the first and second diode-connected MOS transistors. A differential voltage between the first and second terminal voltages corresponds to the product of the first and second input voltages.

Abstract: Disclosed is a reference voltage circuit including control means for performing control so that the voltage of a first current-to-voltage conversion circuit becomes equal to the voltage of a second current-to-voltage conversion circuit; a first current mirror circuit for outputting a current proportionate to the value of a current supplied to the first current-to-voltage conversion circuit or the second current-to-voltage conversion circuit; and a third current-to-voltage conversion circuit for converting the output current from the first current mirror circuit to a voltage, wherein each of the first to third current-to-voltage conversion circuits is configured as follows: a first diode (or a diode-connected first bipolar transistor) is connected in series with a first resistor, and a second resistor is further connected in parallel with the first diode and the first resistor.

Abstract: Disclosed is a reference voltage circuit including first, second and third current-to-voltage converters, a current mirror circuit that supplies the currents to the first, second and third current-to-voltage converters, and a control unit that exercises control so that a preset output voltage of the first current-to-voltage converter will be equal to a preset output voltage of the second current-to-voltage converter. A preset voltage of the third current-to-voltage converter is output as a reference voltage. The first current-to-voltage converter includes a diode and a resistor connected in parallel with the diode. The second current-to-voltage converter includes a plurality of diodes, connected in parallel with one another, a resistor connected in parallel with the parallel-connected diodes, a resistor connected in series with the parallel connection of the diodes and the resistor, and a resistor connected in parallel with the serial connection of the parallel circuit and the resistor.