Abstract: A method of manufacturing an active matrix substrate includes forming multiple thin film transistors corresponding to multiple subpixels on a substrate; forming color filters provided with colored layers having predetermined colors disposed on the multiple thin film transistors, respectively, and having contact holes for electrical connection to the multiple thin film transistors, respectively; forming a first transparent electrode by forming a first transparent conductive film above the color filters and patterning the first transparent conductive film; forming an inorganic protection film made of an inorganic insulating film on the first transparent electrode; forming a second transparent conductive film on the inorganic protection film; forming antireflection layers on the second transparent conductive film, each of the antireflection layers formed by layering a metal layer and an inorganic insulating layer and overlapping a boundary portion between the colored layers; and forming a second transparent elec

Abstract: Each thin film transistor of an active matrix substrate includes an oxide semiconductor layer, a gate electrode disposed closer to the substrate side of the oxide semiconductor layer, a gate insulating layer, a source electrode, and a drain electrode, wherein the oxide semiconductor layer includes a layered structure including a first layer and a second layer disposed on a part of the first layer and extending across the first layer in a channel width direction when viewed in a normal direction of the substrate, the first layer includes an overlapping portion overlapping with the second layer, and a first portion and a second portion each located on a corresponding one of both sides of the second layer, when viewed in a normal direction of the substrate, the second layer covers an upper surface and a side surface of the overlapping portion of the first layer, the source electrode is electrically connected to at least a part of an upper surface of the first portion, and the drain electrode is electrically conn

Abstract: A photoelectric conversion device includes: a substrate; a photoelectric conversion element provided on the substrate; a first protective layer provided on the photoelectric conversion element; and a second protective layer provided above the substrate and surrounding the photoelectric conversion element and the first protective layer, the second protective layer being lower in water vapor transmittance than the first protective layer. The second protective layer has an upper end positioned above an upper end of the first protective layer.

Abstract: Each thin film transistor of an active matrix substrate includes an oxide semiconductor layer, a gate electrode disposed closer to the substrate side of the oxide semiconductor layer, a gate insulating layer, a source electrode, and a drain electrode, wherein the oxide semiconductor layer includes a layered structure including a first layer and a second layer disposed on a part of the first layer and extending across the first layer in a channel width direction when viewed in a normal direction of the substrate, the first layer includes an overlapping portion overlapping with the second layer, and a first portion and a second portion each located on a corresponding one of both sides of the second layer, when viewed in a normal direction of the substrate, the second layer covers an upper surface and a side surface of the overlapping portion of the first layer, the source electrode is electrically connected to at least a part of an upper surface of the first portion, and the drain electrode is electrically conn

Abstract: An active matrix substrate includes a thin film transistor that includes a gate electrode, a first inorganic insulating film that covers the gate electrode, a second inorganic insulating film that is disposed on the first inorganic insulating film and that has an opening overlapping the gate electrode, a source electrode and a drain electrode disposed on the second inorganic insulating film, and a semiconductor layer that overlaps the gate electrode in an opening of the first inorganic insulating film and that covers the source electrode and the drain electrode. Regarding a surface of the first inorganic insulating film in a first region overlapping the opening of the first inorganic insulating film and a surface in a second region other than the first region, the surfaces being arranged nearer to the second inorganic insulating film, the surface in the first region is lower than the surface in the second region.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region other than the transmission and/or reception region. The TFT substrate includes a dielectric substrate, and the plurality of antenna unit regions, a plurality of gate bus lines, and a plurality of source bus lines supported on the dielectric substrate. Each of the antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate further includes a first conductive layer including one of a gate electrode or a source electrode of the TFT, a first insulating layer on the first conductive layer, and a plurality of terminal sections provided in the non-transmission and/or reception region.

Abstract: A manufacturing method of a TFT substrate is a manufacturing method of a TFT substrate in which each of a source electrode and a drain electrode includes a lower source metal layer and an upper source metal layer. The manufacturing method of the TFT substrate includes the steps of: forming an upper source metal layer by etching an upper conductive film with the first resist layer as an etching mask; forming a lower source metal layer by etching a lower conductive film; removing the first resist layer and forming a second resist layer covering the upper source metal layer; and forming a source contact portion and a drain contact portion by etching a contact layer by dry etching with the second resist layer as an etching mask.

Abstract: A method for manufacturing a scanning antenna with a plurality of antenna units arrayed therein, the scanning antenna including a TFT substrate including a first dielectric substrate, a TFT, gate bus lines, source bus lines, and a plurality of patch electrodes, a slot substrate including a second dielectric substrate and a slot electrode including a plurality of slots disposed corresponding to the plurality of patch electrodes, a liquid crystal layer, and a reflective conductive plate, includes a step (a) of depositing a first conductive film containing copper on a first main surface of the second dielectric substrate, a step (b) of, after step (a), bringing the first conductive film into contact with an atmosphere to form an oxide film on a surface of the first conductive film, and a step (c) of, after step (b), depositing a second conductive film containing copper on the oxide film.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region located in a region other than the transmission and/or reception region. Each of the antenna unit regions U includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a gate metal layer including a gate electrode of the TFT, a gate insulating layer, a source metal layer including a source electrode of the TFT and the drain electrode, a first insulating layer, a patch metal layer including the patch electrode, a second insulating layer, and an upper conductive layer. The upper conductive layer includes a patch drain connection section electrically connected to the patch electrode and the drain electrode.

Abstract: The scanning antenna includes a TFT substrate, a slot substrate including a slot electrode, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate. Each of the plurality of antenna units includes a TFT, a patch electrode electrically connected to the drain of the TFT, a slot formed in the slot electrode corresponding to the patch electrode, and a first region in which the patch electrode and the slot electrode overlap each other when viewed from the normal direction of the first dielectric substrate. A distance in the normal direction of the first dielectric substrate between the patch electrode and the slot electrode of the plurality of second antenna units is smaller than a distance in the normal direction of the first dielectric substrate between the patch electrode and the slot electrode of the plurality of first antenna units.

Abstract: An imaging panel includes a photoelectric conversion layer. The surface of the photoelectric conversion layer is partly covered with an inorganic insulating film having a first opening above the photoelectric conversion layer. An organic insulating film having a second opening having a larger opening width than the first opening is disposed on the inorganic insulating film. A surface of the inorganic insulating film that is not covered with the organic insulating film is covered with the protection film at the inside of the second opening. The etching rate of the protection film upon etching with an etchant containing an acid is equal to or higher than that of the inorganic insulating film. The surface of the photoelectric conversion layer at the first opening and the surface of the protection film are covered with an electrode.

Abstract: An imaging panel includes a photoelectric conversion element disposed on a substrate. The photoelectric conversion element includes a cathode electrode, a first semiconductor layer having a first conductive type, the first semiconductor layer being in contact with the cathode electrode, a second semiconductor layer having a second conductive type different from the first conductive type, the second semiconductor layer being joined to the first semiconductor layer, and an anode electrode in contact with the second semiconductor layer. The second semiconductor layer has a greater extinction coefficient as closer to the anode electrode.

Abstract: A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions includes a TFT, a patch electrode electrically connected to a drain electrode of the TFT, and a patch drain connection section electrically connecting the drain electrode to the patch electrode, and the patch drain connection section includes a conductive portion included in a conductive layer, the conductive layer being closer to the dielectric substrate than a conductive layer including the patch electrode and being either one of a conductive layer including a gate electrode of the TFT or a conductive layer including a source electrode of TFT, the either one being closer to the dielectric substrate than the other.

Abstract: A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate, each of the antenna unit regions including a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a gate metal layer supported by the dielectric substrate and including a gate electrode of the TFT, a source metal layer supported by the dielectric substrate and including a source electrode of the TFT, a semiconductor layer, supported by the dielectric substrate, of the TFT, a gate insulating layer formed between the gate metal layer and the semiconductor layer, and a flattened layer formed over the gate insulating layer and formed from an organic insulating material.

Abstract: A scanning antenna provided with an array of a plurality of antenna units includes a transmission and/or reception region including the plurality of antenna units, and a non-transmission and/or reception region other than the transmission and/or reception region. The scanning antenna includes a TFT substrate including a first dielectric substrate, a slot substrate including a second dielectric substrate and a slot electrode supported by a first main surface of the second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate disposed facing a second main surface of the second dielectric substrate opposite to the first main surface with a dielectric layer interposed between the reflective conductive plate and the second main surface.

Abstract: A photoelectric conversion device includes: a substrate; a photoelectric conversion element provided on the substrate; a first protective layer provided on the photoelectric conversion element; and a second protective layer provided above the substrate and surrounding the photoelectric conversion element and the first protective layer, the second protective layer being lower in water vapor transmittance than the first protective layer. The second protective layer has an upper end positioned above an upper end of the first protective layer.

Abstract: A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a source metal layer including a source electrode of the TFT, the drain electrode, a source bus line connected to the source electrode, and the patch electrode, a gate metal layer formed on the source metal layer and including a gate electrode of the TFT and a gate bus line connected to the gate electrode, a gate insulating layer formed between the source metal layer and the gate metal layer, and a conductive layer formed on the gate metal layer, and the TFT substrate does not include an insulating layer between the gate metal layer and the conductive layer.

Abstract: An active matrix substrate having a pixel region includes a terminal part, a guard ring, and a connection part that connects the terminal part and the guard ring to each other. The pixel region, the terminal part, and the guard ring each include a first conductive layer in which a first metal film and second metal films that are lower in resistance than the first metal film are stacked, a first protective layer disposed to overlap at least a part of the first conductive layer, and a second protective layer disposed over the first protective layer. The pixel region includes a second conductive layer provided at a higher level than the first protective layer. The connection part includes the first metal film and the second protective layer disposed over the first metal film. Ends of the first conductive layer in the terminal part and the guard ring that face the connection part are located on the inside of ends of the first protective layer that face the connection part.

Abstract: An active matrix substrate includes a first electrode, a photoelectric conversion element, and a second electrode on a substrate. The first electrode, the photoelectric conversion element, and the second electrode are covered with a first inorganic insulating film including a first opening on the second electrode. The first organic insulating film including a second opening is provided on the first inorganic insulating film, and a surface of the first organic insulating film inside the second opening is covered with a second inorganic insulating film including a third opening overlapping the first opening in a plan view. A conductive film in contact with the second electrode in the first opening is provided on the second inorganic insulating film.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region located in a region other than the transmission and/or reception region. Each of the antenna unit regions U includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a gate metal layer including a gate electrode of the TFT, a gate insulating layer, a source metal layer including a source electrode of the TFT and the drain electrode, a first insulating layer, a patch metal layer including the patch electrode, a second insulating layer, and an upper conductive layer. The upper conductive layer includes a patch drain connection section electrically connected to the patch electrode and the drain electrode.