Abstract: A TFT substrate includes TFTs, patch electrodes formed in a patch metal layer, and gate connection wiring lines formed in a gate metal layer. The patch metal layer includes: a first portion having a layered structure including a lower metal layer containing a refractory metal and an upper metal layer containing Cu, Al, or Ag; and a second portion including the lower metal layer and not including the upper metal layer. The first portion includes the patch electrode, and the second portion includes a first patch connection section electrically connecting a source bus line to the gate connection wiring line. The first patch connection section is in contact with the source bus line in a first opening provided in a first insulating layer, and is in contact with the gate connection wiring line in a second opening provided in a gate insulating layer and the first insulating layer.

Abstract: A source terminal section of a TFT substrate includes a source terminal lower connection section included in a gate metal layer, and a source terminal upper connection section included in a conductive layer. A source gate connection section includes a source lower connection wiring line included in the gate metal layer and connected to the source terminal lower connection section, a source bus connection section included in a source metal layer and connected to a source bus line, and a source upper connection section included in a conductive layer, and the source upper connection section is in contact with the source lower connection wiring line within a third opening formed in a gate insulating layer and in contact with the source bus connection section within a fifth opening formed in an interlayer insulating layer.

Abstract: Provided is a TFT substrate including a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. The TFT substrate further includes a transmission and/or reception region including the plurality of antenna unit regions, and a non-transmission and/or reception region positioned in a region other than the transmission and/or reception region. Each of the plurality of antenna unit regions is provided with a TFT that is supported by the dielectric substrate and that includes a gate electrode, a semiconductor layer, a gate insulating layer formed between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode-electrically connected to the semiconductor layer; and a patch electrode electrically connected to the drain electrode of the TFT. The patch electrode is formed from the same conductive film as the gate electrode.

Abstract: An active matrix substrate 1 has a plurality of detection circuitry. The detection circuitry includes a photoelectric conversion layer 15, a first electrode 14a and a second electrode 14b which interpose the photoelectric conversion layer 15 therebetween, a first insulating film 105, and a second insulating film 106. The first insulating film 105 covers a part of the photoelectric conversion layer 15, and has an opening 105a on the photoelectric conversion layer 15. The second insulating film 106 is provided on the first insulating film 105, and has an opening 106a having a width greater than that of the first insulating film 105. The second electrode 14b is in contact with the photoelectric conversion layer 15 in the first opening 105a, and is in contact with the first insulating film 105 and the second insulating film 106.

Abstract: An active matrix substrate 1 includes a plurality of detection circuitry. The detection circuitry includes a photoelectric conversion layer 15, a pair of a first electrode 14a and a second electrode 14b, a protection film 106, and a bias line 16. The protection film 106 covers a side end part of the photoelectric conversion layer 15, and overlaps with at least a part of the second electrode 14b. The bias line 16 is provided on an outer side of the photoelectric conversion layer 15. An electrode portion of the second electrode 14b that overlaps with the bias line 16 has at least one electrode opening 141h. The bias line 16 is in contact with the electrode portion of the second electrode 14b on an outer side of the photoelectric conversion layer 15, and is in contact with the protection film 106 in the electrode opening 141h.

Abstract: Provided is a technique with which detection defects due to a higher resistance of bias lines can be suppressed. An active matrix substrate 1 has a plurality of detection circuitry arranged in matrix. Each of the detection circuitry includes a photoelectric conversion layer 15; a pair of a first electrode 14a and a second electrode 14b between which the photoelectric conversion layer 15 is interposed; an insulating film 106 covering a side end portion of the photoelectric conversion layer 15; a bias line 16 that is provided on the insulating film 106, and applies a bias voltage to the second electrode 14b; and a protection film 17 that is provided on the insulating film 106, covers a surface of the bias line 16, and contains a conductive material having resistance against acid. At least at a part of the second electrode 14b covers the protection film 17.

Abstract: Provided is an X-ray imaging panel in which off-leakage current can be decreased, and a method for producing the same. An imaging panel includes a photodiode that includes a lower electrode, a photoelectric conversion layer 15 provided on the lower electrode, and an upper electrode 14b provided on the photoelectric conversion layer 15. The photoelectric conversion layer 15 includes a first amorphous semiconductor layer 151, an intrinsic amorphous semiconductor layer 152, and a second amorphous semiconductor layer 153. In the photoelectric conversion layer 15, an upper end portion 1531 of the second amorphous semiconductor layer 153 has a protrusion portion 15a that protrudes toward an outer side of the photoelectric conversion layer 15 with respect to an upper end portion 1521 of the intrinsic amorphous semiconductor layer 152.

Abstract: A TFT substrate has a semiconductor layer, a gate metal layer including a gate electrode, a gate insulating layer, a source metal layer including a source electrode and a drain electrode, and a contact layer including a source contact portion and a drain contact portion. The source metal layer has a laminated structure including a lower source metal layer and an upper source metal layer, and an edge of the lower source metal layer is positioned inside an edge of the upper source metal layer. At least a portion, which does not overlap the source contact portion or the drain contact portion in the edge of the lower source metal layer and the edge of the upper source metal layer in the plurality of antenna unit regions when viewed in a direction normal to the dielectric substrate, is covered with at least two inorganic layers.

Abstract: The present invention provides a thin film transistor substrate capable of stabilizing TFT characteristics, a liquid crystal display device including the thin film transistor substrate, and a method for producing a thin film transistor substrate. The thin film transistor substrate of the present invention is a thin film transistor substrate including a bottom gate thin film transistor. The thin film transistor includes a semiconductor layer which includes an In—Ga—Zn—O first oxide semiconductor layer and an In—Ga—Zn—O second oxide semiconductor layer covering the first oxide semiconductor layer. In the first oxide semiconductor layer, indium has a higher proportion than gallium and than zinc. In the second oxide semiconductor layer, gallium has a higher proportion than indium and than zinc.

Abstract: An active matrix substrate 1 has a plurality of pixels, which each of pixels has a switching element. Each of the pixels includes a pair of electrodes 14a, 14b connected with the switching element; a photoelectric conversion element including a semiconductor layer 15 provided between the pair of electrodes; an inorganic film covering a surface of the photoelectric conversion element; and an organic resin film 106b covering the inorganic film. The inorganic film includes a first inorganic film 105a, and a second inorganic film 105b provided in a layer different from that of the first inorganic film 105a. The first inorganic film 105a is provided in contact with at least a side surface of the photoelectric conversion element, and the second inorganic film 105b is in contact with at least a part of the first inorganic film 105a and covers the side surface of the photoelectric conversion element.

Abstract: Provided is an X-ray imaging panel in which off-leakage current can be suppressed, and a method for producing the same. An imaging panel generates an image based on scintillation light obtained from X-rays transmitted through an object. The imaging panel includes, on the substrate, a thin film transistor, an insulating resin film provided on the thin film transistor, an insulating protection film and a lower electrode provided on the insulating resin film, a photoelectric conversion layer provided on the lower electrode, and an upper electrode provided on the photoelectric conversion layer. The insulating resin film has an opening CH1 on the drain electrode, and the insulating protection film is arranged on an outer side with respect to the opening CH1 so as to be separated from the opening CH1. The lower electrode overlaps with a part of the insulating protection film, and is connected with the drain electrode at the opening CH1.

Abstract: This TFT substrate includes a TFT provided with a gate electrode, a source electrode, and a drain electrode; a gate metal layer including the gate electrode; a gate insulating layer formed on the gate metal layer; and a source metal layer that is formed on the gate insulating layer and includes the source electrode, the drain electrode, and a patch electrode. The source metal layer includes a first metal layer that contains one of Ti, Mo, Ta, W and Nb, and a second metal layer that is formed on the first metal layer and contains one of Cu, Al, Ag and Au. The source electrode and the drain electrode each include the first metal layer and the second metal layer. A distance from the first metal layer of the source electrode to the first metal layer of the drain electrode in a channel direction is less than a distance from the second metal layer of the source electrode to the second metal layer of the drain electrode in the channel direction.

Abstract: Provided is an X-ray imaging panel in which leakage current in a photoelectric conversion layer can be suppressed, and a method for producing the same. An imaging panel 1 generates an image based on scintillation light obtained from X-rays transmitted through an object. The imaging panel 1 includes, on a substrate 101, a thin film transistor 13, an insulating film 103 covering the thin film transistor 13, a photoelectric conversion layer 15 that converts the scintillation light into charges, an upper electrode 14b, a lower electrode 14a connected with the thin film transistor 13, and an upper electrode protection film 18 covering the upper electrode 14b. Ends of the upper electrode 14b are arranged in such a manner that each end thereof is arranged on an inner side of the photoelectric conversion layer 15 with respect to a corresponding end of the photoelectric conversion layer 15.

Abstract: A scanning antenna includes a TFT substrate, a slot substrate, and a liquid crystal layer. The TFT substrate includes a transfer terminal section including a patch connection section formed of the same low-resistance metal film as that of a patch electrode, a first protection metal layer formed on the patch connection section, and a first insulating layer including an opening partially exposing an upper face of the first protection metal layer. The slot substrate includes a terminal section including a slot connection section formed of the same low-resistance metal film as that of the slot electrode, a second protection metal layer formed on the slot connection section, and a second insulating layer including an opening partially exposing an upper face of the second protection metal layer.

Abstract: A TFT substrate includes a dielectric substrate, a plurality of antenna element regions provided on the dielectric substrate, each antenna element region including a TFT and a patch electrode electrically connected to a drain electrode of the TFT, and a flattening layer provided on the dielectric substrate, located above a layer including the patch electrode, and formed of a resin.

Abstract: A TFT substrate includes a plurality of antenna element regions each including a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate further includes a source metal layer including a source electrode of the TFT, a gate metal layer formed on the source metal layer and including a gate electrode of the TFT, a semiconductor layer of the TFT, a gate insulating layer formed between the semiconductor layer and the gate metal layer, wherein the source metal layer further includes the patch electrode. The TFT substrate further includes a source terminal portion arranged in a non-transmitting/receiving region, and the gate metal layer further includes a source terminal upper connection portion of the source terminal portion.

Abstract: The objective of the present invention is to achieve a manufacturing method that, in a capacitive touch panel, prevents the occurrence of residue in an electrode film caused by an etching defect for a touch panel in which electrode patterns are difficult to recognize. The manufacturing method for the touch panel includes: an electrode formation step for forming, upon an insulating substrate (10), first electrodes (11) and second electrodes (12) that extend in mutually intersecting directions; an insulating film formation step for forming insulating films (16) which cover portions of the insulating substrate (10), the first electrodes (11), and the second electrodes (12); and a bridge formation step for forming bridges (17) that connect neighboring second electrodes (12) together over the insulating films (16). In addition, before the bridge formation step, a surface treatment step for etching the surface of the first electrodes (11) and the second electrodes (12) is performed one or more times.

Abstract: An arrangement of a cover-integrated touch panel is provided that ensures that sensor electrodes are properly connected with wiring lines. The touch panel includes: a transparent substrate; a light-shielding film on a portion of the substrate; a planarizing film over the substrate and the light-shielding film; a barrier film over the planarizing film; a sensor electrode on the barrier film; a terminal in a region that overlaps the light-shielding film; and a wiring line to electrically connect the sensor electrode with the terminal. The barrier film includes a first inorganic film adjacent to the planarizing film and a second inorganic film on the first inorganic film with a smaller refractive index than the first inorganic film.

Abstract: A configuration of a touch panel having a terminal structure that enables stable connection between lines and terminals is obtained. A touch panel includes: an insulating substrate (10); a first electrode that is formed on the substrate (10) and extends in a first direction; a second electrode that is formed on the substrate (10) and extends in a second direction that crosses the first direction; a first insulating film (15) that insulates the first electrode and the second electrode from each other; a terminal (18) formed on the substrate (10); and a line (14) that electrically connects a respective one of the first and second electrodes with the terminal (18).

Abstract: An arrangement of a touch panel is provided that prevents corrosion of the lines and improves reliability. A touch panel includes: a substrate (10); a sensor electrode located on the substrate (10) and formed of an oxide conductive film; a line (161) electrically connected with the sensor electrode; and a protection film (14) provided over the line (161). The protection film (14) includes: a first protection sub-film (141) formed of silicon nitride; a second protection sub-film (142) located on the first protection sub-film (141), formed of silicon nitride and having a lower refractive index than the first protection sub-film (141); and a third protection sub-film (143) located on the second protection sub-film (142), formed of silicon nitride and having a higher refractive index than the second protection sub-film (142), wherein the second protection sub-film (142) has a thickness that is no smaller than the total thickness of the first protection sub-film (141) and the third protection sub-film (143).