Abstract: A TFT substrate includes a plurality of antenna element regions each including a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate further includes a source metal layer including a source electrode of the TFT, a gate metal layer formed on the source metal layer and including a gate electrode of the TFT, a semiconductor layer of the TFT, a gate insulating layer formed between the semiconductor layer and the gate metal layer, wherein the source metal layer further includes the patch electrode. The TFT substrate further includes a source terminal portion arranged in a non-transmitting/receiving region, and the gate metal layer further includes a source terminal upper connection portion of the source terminal portion.

Abstract: An active matrix substrate includes a TFT. The TFT includes a gate electrode, a semiconductor layer overlapping the gate electrode with a gate insulating film interposed therebetween, and a source electrode and a drain electrode disposed on the semiconductor layer. The source electrode, the drain electrode, and the semiconductor layer are covered with a first insulating film. The gate insulating film includes a first stepped portion in a portion covering a peripheral portion of the gate electrode. The first insulating film includes a first opening at a position overlapping a portion of the first stepped portion that is not covered with the source electrode and the drain electrode in a plan view.

Abstract: A TFT substrate includes a dielectric substrate, a plurality of antenna element regions provided on the dielectric substrate, each antenna element region including a TFT and a patch electrode electrically connected to a drain electrode of the TFT, and a flattening layer provided on the dielectric substrate, located above a layer including the patch electrode, and formed of a resin.

Abstract: Provided is an X-ray imaging panel in which off-leakage current can be suppressed, and a method for producing the same. The imaging panel includes a photoelectric conversion layer (15), a first electrode (14b), and first protection layers (105, 106). The first protection layers (105, 106) cover side surfaces of the photoelectric conversion layer (15), and have openings (105a, 106a) on an inner side with respect to an end of the photoelectric conversion layer (15), above the photoelectric conversion layer (15). The first electrode (14b) is arranged on the first protection layer (106) so as to be in contact with the photoelectric conversion layer (15) in the openings (105a, 106a).

Abstract: A method for manufacturing a scanning antenna with a plurality of antenna units arrayed therein, the scanning antenna including a TFT substrate including a first dielectric substrate, a TFT, gate bus lines, source bus lines, and a plurality of patch electrodes, a slot substrate including a second dielectric substrate and a slot electrode including a plurality of slots disposed corresponding to the plurality of patch electrodes, a liquid crystal layer, and a reflective conductive plate, includes a step (a) of depositing a first conductive film containing copper on a first main surface of the second dielectric substrate, a step (b) of, after step (a), bringing the first conductive film into contact with an atmosphere to form an oxide film on a surface of the first conductive film, and a step (c) of, after step (b), depositing a second conductive film containing copper on the oxide film.

Abstract: An imaging panel includes a photoelectric conversion layer on a side of one of surfaces of a substrate. Further, the imaging panel includes an electrode connected to one of surfaces of the photoelectric conversion layer, a bias line connected with the electrode, and a protection film that is made of a material resistant against an etching agent containing hydrofluoric acid, and covers side surfaces of the bias line.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region located in a region other than the transmission and/or reception region. Each of the plurality of antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a source metal layer including a source electrode of the TFT, the drain electrode, and a source bus line, a gate metal layer formed on the source metal layer and including a gate electrode of the TFT and a gate bus line, a gate insulating layer formed between the source metal layer and the gate metal layer, an interlayer insulating layer formed on the gate metal layer, and a conductive layer formed on the interlayer insulating layer. The patch electrode is included in the gate metal layer.

Abstract: Provided is an X-ray imaging panel in which leakage current can be reduced, and a method for producing the same. An imaging panel 1 generates an image based on scintillation light that is obtained from X-rays transmitted through an object. The imaging panel 1 includes a photoelectric conversion layer 15 that converts scintillation light into charges, on a substrate. The photoelectric conversion layer 15 has a polygonal shape having a plurality of corner portions 15p when viewed in a plan view. Each of the corner portions 15p has a plurality of corners each of which has an interior angle of greater than 90°.

Abstract: The present invention provides a thin-film transistor substrate with which the yield can be improved and which can reduce the resistances of electrodes, a liquid crystal display device including the thin-film transistor substrate, and a method for producing the thin-film transistor substrate. The thin-film transistor substrate of the present invention includes a base substrate, a thin-film transistor including a source electrode and a drain electrode, and a protective insulating film containing silicon oxide covering the thin-film transistor, wherein the source electrode and the drain electrode each include a laminate of an aluminum layer and a molybdenum nitride layer stacked in the stated order, and a titanium nitride/titanium layer covering the laminate.

Abstract: A scanning antenna provided with an array of a plurality of antenna units includes a TFT substrate, a slot substrate, and a liquid crystal layer disposed between the TFT substrate and the slot substrate. The slot substrate includes a second dielectric substrate, a slot electrode supported on a first main surface of the second dielectric substrate, and a first dielectric layer disposed between the second dielectric substrate and the slot electrode. The slot electrode has tensile stress. The first dielectric layer has compressive stress.

Abstract: An imaging panel includes a photoelectric conversion element disposed on a substrate. The photoelectric conversion element includes a cathode electrode, a first semiconductor layer having a first conductive type, the first semiconductor layer being in contact with the cathode electrode, a second semiconductor layer having a second conductive type different from the first conductive type, the second semiconductor layer being joined to the first semiconductor layer, and an anode electrode in contact with the second semiconductor layer. The second semiconductor layer has a greater extinction coefficient as closer to the anode electrode.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region located in a region other than the transmission and/or reception region. Each of the plurality of antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate includes a source metal layer including: a source electrode of the TFT, the drain electrode, and a source bus line; a gate metal layer formed on the source metal layer and including a gate electrode of the TFT, a gate bus line, and a patch electrode; a gate insulating layer formed between the source metal layer and the gate metal layer; and a conductive layer formed on the gate metal layer, and the TFT substrate does not include an insulating layer between the gate metal layer and the conductive layer.

Abstract: An active matrix substrate 1 includes a plurality of detection circuitry. The detection circuitry includes a photoelectric conversion layer 15, a pair of a first electrode 14a and a second electrode 14b, a protection film 106, and a bias line 16. The protection film 106 covers a side end part of the photoelectric conversion layer 15, and overlaps with at least a part of the second electrode 14b. The bias line 16 is provided on an outer side of the photoelectric conversion layer 15. An electrode portion of the second electrode 14b that overlaps with the bias line 16 has at least one electrode opening 141h. The bias line 16 is in contact with the electrode portion of the second electrode 14b on an outer side of the photoelectric conversion layer 15, and is in contact with the protection film 106 in the electrode opening 141h.

Abstract: An imaging panel generates an image based on scintillation light that is obtained from X-rays transmitted through an object. The imaging panel includes, in a terminal area, a terminal-first insulating film that is made of the same material as that of a first insulating film on a TFT, and is separated on a part of a first conductive layer so as to have an opening; a terminal-semiconductor layer is provided above the terminal-first insulating film, and is made of the same material as that of at least a part of semiconductor layers of a photoelectric conversion layer; and a second conductive layer made of the same material as that of a conductive film connected with a photoelectric conversion element, is provided on the terminal-semiconductor layer so as to be in contact with the first conductive layer in the opening.

Abstract: A TFT substrate includes a transmission and/or reception region including a plurality of antenna unit regions, and a non-transmission and/or reception region other than the transmission and/or reception region. The TFT substrate includes a dielectric substrate, and the plurality of antenna unit regions, a plurality of gate bus lines, and a plurality of source bus lines supported on the dielectric substrate. Each of the antenna unit regions includes a TFT and a patch electrode electrically connected to a drain electrode of the TFT. The TFT substrate further includes a first conductive layer including one of a gate electrode or a source electrode of the TFT, a first insulating layer on the first conductive layer, and a plurality of terminal sections provided in the non-transmission and/or reception region.

Abstract: A TFT substrate includes TFTs, patch electrodes formed in a patch metal layer, and gate connection wiring lines formed in a gate metal layer. The patch metal layer includes: a first portion having a layered structure including a lower metal layer containing a refractory metal and an upper metal layer containing Cu, Al, or Ag; and a second portion including the lower metal layer and not including the upper metal layer. The first portion includes the patch electrode, and the second portion includes a first patch connection section electrically connecting a source bus line to the gate connection wiring line. The first patch connection section is in contact with the source bus line in a first opening provided in a first insulating layer, and is in contact with the gate connection wiring line in a second opening provided in a gate insulating layer and the first insulating layer.

Abstract: A TFT substrate includes a dielectric substrate, a plurality of antenna unit regions arranged on the dielectric substrate, each antenna unit region including a TFT, a patch electrode electrically connected to a drain electrode of the TFT, an auxiliary capacitance electrode electrically connected to the drain electrode, and auxiliary capacitance counter electrodes opposite the auxiliary capacitance electrode with an insulating layer interposed therebetween, and a plurality of CS bus lines, each CS bus line being connected to any of the auxiliary capacitance counter electrodes. Each of the plurality of CS bus lines includes at least two conductive layers disposed with an insulating layer disposed therebetween.

Abstract: An active matrix substrate includes a thin film transistor that includes a gate electrode, a first inorganic insulating film that covers the gate electrode, a second inorganic insulating film that is disposed on the first inorganic insulating film and that has an opening overlapping the gate electrode, a source electrode and a drain electrode disposed on the second inorganic insulating film, and a semiconductor layer that overlaps the gate electrode in an opening of the first inorganic insulating film and that covers the source electrode and the drain electrode. Regarding a surface of the first inorganic insulating film in a first region overlapping the opening of the first inorganic insulating film and a surface in a second region other than the first region, the surfaces being arranged nearer to the second inorganic insulating film, the surface in the first region is lower than the surface in the second region.

Abstract: A TFT substrate has a semiconductor layer, a gate metal layer including a gate electrode, a gate insulating layer, a source metal layer including a source electrode and a drain electrode, and a contact layer including a source contact portion and a drain contact portion. The source metal layer has a laminated structure including a lower source metal layer and an upper source metal layer, and an edge of the lower source metal layer is positioned inside an edge of the upper source metal layer. At least a portion, which does not overlap the source contact portion or the drain contact portion in the edge of the lower source metal layer and the edge of the upper source metal layer in the plurality of antenna unit regions when viewed in a direction normal to the dielectric substrate, is covered with at least two inorganic layers.

Abstract: The TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions includes a TFT, an patch electrode electrically connected to a drain electrode of the TFT, an auxiliary capacitance electrode electrically connected to the drain electrode, a first auxiliary capacitance counter electrode opposite to the auxiliary capacitance electrode with a dielectric layer interposed therebetween, and a second auxiliary capacitance counter electrode on a side of the auxiliary capacitance electrode farther from the first auxiliary capacitance counter electrode and opposite to the auxiliary capacitance electrode with another dielectric layer interposed therebetween.