Patents by Inventor Kazuhiro Matsuo

Kazuhiro Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230328957
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.
    Type: Application
    Filed: September 2, 2022
    Publication date: October 12, 2023
    Applicant: Kioxia Corporation
    Inventors: Masaya TODA, Tomoki ISHIMARU, Ha HOANG, Kota TAKAHASHI, Kazuhiro MATSUO, Takafumi OCHIAI, Shoji HONDA, Kenichiro TORATANI, Kiwamu SAKUMA, Taro SHIOKAWA, Mutsumi OKAJIMA
  • Patent number: 11785774
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: October 10, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Hiroyuki Yamashita, Yuta Saito, Shinji Mori, Masayuki Tanaka, Kenichiro Toratani, Atsushi Takahashi, Shouji Honda
  • Publication number: 20230309301
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a first film including oxygen. The method further includes forming a second film including nitrogen. The method further includes etching surfaces of the first film and the second film using a substance including a halogen. The method further includes forming a third film including nitrogen on the surfaces of the first film and the second film. The third film is formed by alternately performing first processes and second processes, wherein each of the first processes forms a portion of the third film, and each of the second processes etches a portion of the third film using a substance including a halogen.
    Type: Application
    Filed: June 20, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Yuta KAMIYA, Kenichiro TORATANI, Kazuhiro MATSUO, Shoji HONDA, Takuya HIROHASHI, Borong CHEN, Kota TAKAHASHI
  • Publication number: 20230309310
    Abstract: A semiconductor device of embodiments includes: a semiconductor layer containing silicon (Si); a first insulating layer provided in a first direction of the semiconductor layer; a second insulating layer surrounded by the semiconductor layer in a first cross section perpendicular to the first direction and containing silicon (Si) and oxygen (O); a third insulating layer surrounded by the second insulating layer in the first cross section and containing a metal element and oxygen (O); and a conductive layer surrounded by the first insulating layer in a second cross section perpendicular to the first direction, provided in the first direction of the third insulating layer, and spaced from the semiconductor layer.
    Type: Application
    Filed: September 9, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Yuta SAITO, Shinji MORI, Hiroyuki YAMASHITA, Satoshi NAGASHIMA, Kazuhiro MATSUO, Kota TAKAHASHI, Shota KASHIYAMA, Keiichi SAWA, Junichi KANEYAMA
  • Publication number: 20230290882
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and an oxide semiconductor layer provided between the first electrode and the second electrode and including a first region, a second region between the first region and the second electrode, and a third region between the first region and the second region. A gate electrode surrounds the third region, and a gate insulating layer is between the gate electrode and the third region. A first resistivity of the first region is higher than a second resistivity of the second region. A first distance between the first electrode and the gate electrode in a first direction from the first electrode toward the second electrode is shorter than a second distance between the gate electrode and the second electrode in the first direction.
    Type: Application
    Filed: August 26, 2022
    Publication date: September 14, 2023
    Inventors: Ha HOANG, Kazuhiro MATSUO, Tomoki ISHIMARU, Kenichiro TORATANI
  • Patent number: 11751397
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: September 5, 2023
    Assignee: Kioxia Corporation
    Inventors: Yuta Saito, Shinji Mori, Atsushi Takahashi, Toshiaki Yanase, Keiichi Sawa, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Publication number: 20230200050
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; a gate insulating layer between the gate electrode and the oxide semiconductor layer; a first insulating layer provided between the first electrode and the gate electrode; and a second insulating layer provided between the second electrode and the gate electrode. In a cross section parallel to a first direction from the first electrode to the second electrode, a first portion of the oxide semiconductor layer is provided between the gate insulating layer and the first electrode. In the cross section, a second portion of the oxide semiconductor layer is provided between the gate insulating layer and the second electrode.
    Type: Application
    Filed: June 15, 2022
    Publication date: June 22, 2023
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Ha HOANG, Atsuko SAKATA, Yuta KAMIYA, Kazuhiro MATSUO, Keiichi SAWA, Kota TAKAHASHI, Kenichiro TORATANI, Yimin LIU
  • Publication number: 20230197857
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode and including a first region surrounded by the first electrode in a plane perpendicular to a first direction from the first electrode toward the second electrode; a gate electrode facing the oxide semiconductor layer; a gate insulating layer; a first insulating layer between the gate electrode and the first electrode; and a second insulating layer between the gate electrode and the second electrode. A first maximum distance between a first portion of the first electrode and a second portion of the first electrode in a second direction in a cross section parallel to the first direction is larger than a minimum distance between a third portion of the first insulating layer and a fourth portion of the first insulating layer in the second direction.
    Type: Application
    Filed: June 16, 2022
    Publication date: June 22, 2023
    Applicant: Kioxia Corporation
    Inventors: Taro SHIOKAWA, Kiwamu SAKUMA, Keiko SAKUMA, Mutsumi OKAJIMA, Kazuhiro MATSUO, Masaya TODA
  • Publication number: 20230088864
    Abstract: A semiconductor memory device according to an embodiment includes: a first oxide semiconductor layer between a first conductive layer and a second conductive layer; a first gate electrode; a first electrode; a second electrode; a first capacitor insulating film between the first electrode and the second electrode including a first region and a second region between the first region and the second electrode, concentration of the Ti is higher in the second region than the first region; a third conductive layer; a second oxide semiconductor layer between the third conductive layer and a fourth conductive layer; a second gate electrode; a third electrode; a fourth electrode; and a second capacitor insulating film between the third electrode and the fourth electrode, and including a third region and a fourth region between the third region and the fourth electrode, concentration of Ti is higher in the fourth region than the third region.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Yuta KAMIYA, Kazuhiro MATSUO, Kota TAKAHASHI, Masaya TODA, Tomoki ISHIMARU
  • Publication number: 20230090044
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first oxide semiconductor layer between the first electrode and the second electrode, the first oxide semiconductor layer containing in, Zn, and a first metal element, and the first metal element being at least one metal of Ga, Mg, or Mn, a second oxide semiconductor layer between the first oxide semiconductor layer and the second electrode, the second oxide semiconductor layer containing In, Zn, and the first metal element, a third oxide semiconductor layer between the first oxide semiconductor layer and the second oxide semiconductor layer, the third oxide semiconductor layer containing in, Zn, and a second metal element, the second metal element being at least one metal of Al, Hf, La, Sn, Ta, Ti, W, Y, or Zr, a gate electrode facing the third oxide semiconductor layer, and a gate insulating.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Kenichiro TORATANI
  • Patent number: 11576032
    Abstract: A policy and charging rules function (PCRF) stores a policy rule management table in which a policy rule corresponding to a combination of contract information and a device type is registered and a hierarchical management table in which user information including contract information of a user and information on the device are managed in association with each other, acquires the device type serving as an application target of the policy rule, and a device ID assigned to the device, determines the policy rule according to the acquired device type and the contract information of the user, and instructs a deep packet inspection (DPI) to apply the determined policy rule to the device corresponding to the acquired device ID. The DPI acquires the device ID, and applies the policy rule to communication from the device corresponding to a device ID assigned to the device, and performs control.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: February 7, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hidetaka Nishihara, Hiroki Iwahashi, Kaori Kurita, Kazuhiro Matsuo
  • Patent number: 11515929
    Abstract: A PCRF (4) stores a policy rule management table in which a policy rule is associated with a device type, acquires the device type serving as an application target of the policy rule, and a device ID assigned to the device, determines the policy rule corresponding to the acquired type of the device (2), and instructs the DPI to apply the determined policy rule to the device corresponding to the acquired device ID. The DPI (5) acquires the device ID assigned to the device serving as the application target of the policy rule, applies the policy rule provided through the instruction to communication from the device (2) corresponding to the device ID assigned to the device to which the PCRF (4) instructs to apply the determined rule, and performs control.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: November 29, 2022
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Iwahashi, Hidetaka Nishihara, Kaori Kurita, Kazuhiro Matsuo
  • Publication number: 20220336493
    Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: Kioxia Corporation
    Inventors: Yuta SAITO, Shinji MORI, Keiichi SAWA, Kazuhisa MATSUDA, Kazuhiro MATSUO, Hiroyuki YAMASHITA
  • Publication number: 20220336492
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Application
    Filed: June 27, 2022
    Publication date: October 20, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Yuta SAITO, Shinji MORI, Atsushi TAKAHASHI, Toshiaki YANASE, Keiichi SAWA, Kazuhiro MATSUO, Hiroyuki YAMASHITA
  • Publication number: 20220310640
    Abstract: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: September 29, 2022
    Applicant: Kioxia Corporation
    Inventors: Natsuki FUKUDA, Ryota NARASAKI, Takashi KURUSU, Yuta KAMIYA, Kazuhiro MATSUO, Shinji MORI, Shoji HONDA, Takafumi OCHIAI, Hiroyuki YAMASHITA, Junichi KANEYAMA, Ha HOANG, Yuta SAITO, Kota TAKAHASHI, Tomoki ISHIMARU, Kenichiro TORATANI
  • Publication number: 20220302169
    Abstract: A semiconductor storage device includes a channel layer extending along a first direction and including titanium oxide, an electrode layer extending along a second direction crossing the first direction, and a ferroelectric layer between the channel layer and the electrode layer and including titanium.
    Type: Application
    Filed: August 25, 2021
    Publication date: September 22, 2022
    Inventors: Keisuke TAKAGI, Kazuhiro MATSUO, Kunifumi SUZUKI, Yuuichi KAMIMUTA, Taro SHIOKAWA, Masumi SAITOH, Yuta KAMIYA, Kota TAKAHASHI
  • Publication number: 20220302162
    Abstract: According to one embodiment, a semiconductor storage device includes a plurality of electrode films on a substrate, spaced from one another in a first direction. A charge storage film is provided on a side face the electrode films via a first insulating film. A semiconductor film is provided on a side face of the charge storage film via a second insulating film. The charge storage film includes a plurality of insulator regions contacting the first insulating film, a plurality of semiconductor or conductor regions provided between the insulator regions and another insulator region.
    Type: Application
    Filed: August 26, 2021
    Publication date: September 22, 2022
    Inventors: Hiroyuki Yamashita, Yuta Saito, Keiichi Sawa, Kazuhiro Matsuo, Yuta Kamiya, Shinji Mori, Kota Takahashi, Junichi Kaneyama, Tomoki Ishimaru, Kenichiro Toratani, Ha Hoang, Shouji Honda, Takafumi Ochiai
  • Publication number: 20220262954
    Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: Kioxia Corporation
    Inventors: Tomoki ISHIMARU, Shinji MORI, Kazuhiro MATSUO, Keiichi SAWA, Akifumi GAWASE
  • Publication number: 20220246640
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Keiichi SAWA, Kazuhiro MATSUO, Kazuhisa MATSUDA, Hiroyuki YAMASHITA, Yuta SAITO, Shinji MORI, Masayuki TANAKA, Kenichiro TORATANI, Atsushi TAKAHASHI, Shouji HONDA
  • Patent number: 11404437
    Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: August 2, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuta Saito, Shinji Mori, Keiichi Sawa, Kazuhisa Matsuda, Kazuhiro Matsuo, Hiroyuki Yamashita