Abstract: A PCRF (4) stores a policy rule management table in which a policy rule is associated with a device type, acquires the device type serving as an application target of the policy rule, and a device ID assigned to the device, determines the policy rule corresponding to the acquired type of the device (2), and instructs the DPI to apply the determined policy rule to the device corresponding to the acquired device ID. The DPI (5) acquires the device ID assigned to the device serving as the application target of the policy rule, applies the policy rule provided through the instruction to communication from the device (2) corresponding to the device ID assigned to the device to which the PCRF (4) instructs to apply the determined rule, and performs control.

Abstract: A PCRF (204) stores a policy rule management table in which a policy rule corresponding to a combination of contract information and a device type is registered and a hierarchical management table in which user information including contract information of a user and information on the device are managed in association with each other, acquires the device type serving as an application target of the policy rule, and a device ID assigned to the device, determines the policy rule according to the acquired type of the device (2) and the contract information of the user, and instructs a DPI to apply the determined policy rule to the device corresponding to the acquired device ID.

Abstract: A memory device of an embodiment includes a stacked body including a plurality of insulating layers and a plurality of gate electrode layers alternately stacked in a first direction, a semiconductor layer provided in the stacked body and extending in the first direction, and a gate insulating layer provided between the semiconductor layer and the gate electrode layer, the gate insulating layer including a first region including a first oxide containing at least one of hafnium oxide or zirconium oxide, the first region including an orthorhombic crystal, and the first region including at least one first element selected from the group consisting of carbon (C), nitrogen (N), chlorine (Cl), boron (B), hydrogen (H), fluorine (F), helium (He), and argon (Ar).

Abstract: A policy control device (20) includes an acquisition unit (231) configured to acquire an amount of communication of an accommodated user terminal from a relay device that notifies the amount of communication when the amount of communication exceeds a communication amount threshold value, a calculation unit (232) configured to calculate a communication speed by using an amount of communication in a past fixed period of time including at least the amount of communication currently acquired by the acquisition unit (231), and calculate the communication amount threshold value based on the calculated communication speed, and a notification unit (233) configured to notify the relay device of the communication amount threshold value calculated by the calculation unit (232).

Abstract: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.

Abstract: A semiconductor device comprises a substrate. A plurality of electrode layers and a plurality of insulating layers are formed in an alternating stack above the substrate. A semiconductor column extends through the plurality of electrode layers and the plurality of insulating layers. The semiconductor column comprises a single-crystal semiconductor material on an outer peripheral surface facing the electrode and insulating layers. First insulating films are formed between the semiconductor column and the electrode layers. The first insulating films are spaced from each other along the column length. Each first insulating film corresponds to one electrode layer. A charge storage layer is between each of the first insulating films and the electrode layers. A second insulating film is between the charge storage layer and each of the electrode layers.

Abstract: A policy conflict detection system includes a determination unit configured to determine, in response to an instruction to apply to a first network operator which performs policy control based on a set of first policies, a second policy from a second network operator, whether a third policy, which matches the second policy in terms of a priority, an application period, a control target, and a control condition and which has a control content exclusive of that of the second policy is present among the first policies, thereby enabling detection of conflict of the policies.

Abstract: A semiconductor manufacturing apparatus in this embodiment includes a reactor, a pump, an exhaust pipe and a mesh member. The reactor houses a semiconductor substrate to treat the semiconductor substrate. The pump exhausts a gas inside the reactor. The exhaust pipe connects between the reactor and the pump. The mesh member is located at a flow inlet of the pump for the gas or in the exhaust pipe and has a main plane having a plurality of meshes arranged thereon. The mesh member has a protrusion and/or protruding shape projecting upstream of the gas.

Abstract: A semiconductor memory device includes a channel layer and a gate electrode. A first insulating layer is between the semiconductor layer and the gate electrode. A second insulating layer is between the first insulating layer and the gate electrode. A storage region is between the first insulating layer and the second insulating layer. The storage region comprises metal or semiconductor material. A coating layer comprises silicon and nitrogen and surrounds the storage region. The coating layer is between the storage region and the second insulating layer and between the storage region and the first insulating layer.

Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.

Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.

Abstract: A policy conflict system includes a determining unit that determines, according to an instruction for application of a second polity from a second network provider to a first network provider that performs policy control based on a set of first policies, presence or absence of a third policy conflicting with the second policy, a calculating unit that, when the determining unit determines that the third policy is present, concerning each of the second policy and the third policy, calculates priority levels different from each other referring to a storing unit storing information indicating a target that should be prioritized concerning an item relating to a policy, and an imparting unit that imparts the priority levels calculated by the calculating unit to each of the second policy and the third policy. Consequently, the policy conflict resolution system enables a conflict between policies to be resolved.

Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.

Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.

Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.

Abstract: A semiconductor device comprises a substrate. A plurality of electrode layers and a plurality of insulating layers are formed in an alternating stack above the substrate. A semiconductor column extends through the plurality of electrode layers and the plurality of insulating layers. The semiconductor column comprises a single-crystal semiconductor material on an outer peripheral surface facing the electrode and insulating layers. First insulating films are formed between the semiconductor column and the electrode layers. The first insulating films are spaced from each other along the column length. Each first insulating film corresponds to one electrode layer. A charge storage layer is between each of the first insulating films and the electrode layers. A second insulating film is between the charge storage layer and each of the electrode layers.

Abstract: A semiconductor memory device includes a channel layer and a gate electrode. A first insulating layer is between the semiconductor layer and the gate electrode. A second insulating layer is between the first insulating layer and the gate electrode. A storage region is between the first insulating layer and the second insulating layer. The storage region comprises metal or semiconductor material. A coating layer comprises silicon and nitrogen and surrounds the storage region. The coating layer is between the storage region and the second insulating layer and between the storage region and the first insulating layer.

Abstract: In one embodiment, a semiconductor storage device includes a first interconnect extending in a first direction, a plurality of second interconnects extending in a second direction different from the first direction, and a plurality of first insulators provided alternately with the second interconnects. The device further includes a resistance change film provided between the first interconnect and at least one of the second interconnects and including a first metal layer or a first semiconductor layer that includes a first face provided on a first interconnect side and a second face provided on a second interconnect side, at least any of the first face and the second face having a curved plane shape.

Abstract: A semiconductor device includes a semiconductor layer containing metal atoms, a charge storage layer provided on a surface of the semiconductor layer via a first insulating film, and an electrode layer provided on a surface of the charge storage layer via a second insulating film. The thickness of the first insulating film is 5 nm or more and 10 nm or less. The concentration of the metal atoms in the semiconductor layer is 5.0×1017 [EA/cm3] or higher and 1.3×1020 [EA/cm3] or lower.