Patents by Inventor Kazuhisa Fujimoto

Kazuhisa Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7260613
    Abstract: In a storage system in which: LSW 110 is a local switch, GSW 115 is a global switch, and 21 is a global shared memory unit; when a host computer 3 makes a data read request to a disk control cluster 1-1, a channel interface unit 11 accesses to a local shared memory unit 22 via the LSW 110, and if the data exists in the disk control cluster 1-1, the channel interface unit 11 read the data from the local shared memory unit 22 or the disk drive 2 so as to transfer to the host computer 3. If the data is not in the disk control cluster 1-1, the channel interface unit 11 accesses to the global shared memory unit 21, check a disk control cluster with the requested data stored therein, obtains the requested data from the disk control cluster where the requested data is stored, and transfer the data to the host computer 3.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: August 21, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Kazuhisa Fujimoto
  • Patent number: 7249220
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units and data caching control units are connected to each other through an interconnection, the data caching control units are divided into plural control clusters, each of the control clusters including at least two or more data caching control units, control of a cache memory is conducted independently for each of the control clusters, and one of the plural data caching control units manages, as a single system, protocol transformation units and the plural control clusters based on management information stored in a system management information memory unit.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: July 24, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Publication number: 20070168598
    Abstract: A first storage system is connected to a second storage system, and an external device within the first storage system is provided to a host as a device of the second storage system. The second storage system includes a cache control section having cache adaptors, each controlling a disk and a cache, a protocol conversion section including protocol adaptors that switch requests from the host to appropriate ones of the cache adaptors, a management adaptor, and an internal network that mutually connects the cache adaptors, the protocol adaptors and the management adaptor. The first storage system being connected to any of the protocol adaptors is connected to the second storage system. The second storage system executes a processing for the external device by the cache control section, or connects to the first storage system through the protocol conversion section without the cache control section executing processing for the external device.
    Type: Application
    Filed: March 23, 2007
    Publication date: July 19, 2007
    Inventors: Yasutomo Yamamoto, Kazuhisa Fujimoto, Akira Yamamoto
  • Patent number: 7243223
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: July 10, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Patent number: 7240139
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: July 3, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Patent number: 7231469
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: June 12, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto
  • Publication number: 20070130385
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.
    Type: Application
    Filed: January 12, 2007
    Publication date: June 7, 2007
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto
  • Patent number: 7228380
    Abstract: A first storage system is connected to a second storage system, and an external device within the first storage system is provided to a host as a device of the second storage system. The second storage system includes a cache control section having a cache adaptors, each controlling a disk and a cache, a protocol conversion section including protocol adaptors that switch requests from the host to appropriate ones of the cache adaptors, a management adaptor, and an internal network that mutually connects the cache adaptors, the protocol adaptors and the management adaptor. The first storage system being connected to any of the protocol adaptors is connected to the second storage system. The second storage system executes a processing for the external device by the cache control section, or connects to the first storage system through the protocol conversion section without the cache control section executing processing for the external device.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: June 5, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Yasutomo Yamamoto, Kazuhisa Fujimoto, Akira Yamamoto
  • Publication number: 20070118694
    Abstract: A storage system having a cluster configuration that prevents a load from concentrating on a certain storage node and enhances access performance is disclosed. The storage system is provided with plural storage adaptors having a cache memory for storing data read/written according to an I/O request from a host and a device for holding the data stored in the cache memory, means for connecting an external storage having a logical device that handles the read/written data and a cache memory to the storage adaptor, means for monitoring and grasping a usage situation of each cache memory of the plural storage adaptors and means for referring to information of the usage situation of each cache memory acquired by the grasping means and selecting any of the storage adaptors so that usage of each cache memory is equalized, and the logical device of the external storage is controlled by the storage adaptor selected by the selection means via connection means.
    Type: Application
    Filed: January 16, 2007
    Publication date: May 24, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Yasuo Watanabe, Yasutomo Yamamoto, Kazuhisa Fujimoto
  • Patent number: 7213104
    Abstract: A disk array controller which includes a channel interface unit for connecting a host computer through a first type channel, a channel interface unit for connecting a host computer through a second type channel, a plurality of disk interface units provided with an interface with a magnetic disk unit respectively, a cache memory unit, and a shared memory unit. The number of access paths connected to said cache memory unit is less than the number of access paths connected to the shared memory unit.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: May 1, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi
  • Publication number: 20070079156
    Abstract: To provide a storage system capable of minimizing a performance deterioration, saving power consumption, and realizing a high reliability. A storage system according to the present invention includes a computer, a storage apparatus 1 connected with the computer, and a storage management apparatus connected to the storage apparatus, the storage apparatus including a hard disk unit to control a data write operation and a data read operation between the computer and the hard disk unit, and control on/off states of power supply of the hard disk unit on a group basis, and the system management apparatus collecting running information about the computer and computer execution job information for each computer, and determining an on/off time of the power supply of the hard disk unit on the group basis to record the collected information and the on/off time of the power supply on the group basis.
    Type: Application
    Filed: December 7, 2005
    Publication date: April 5, 2007
    Inventor: Kazuhisa Fujimoto
  • Publication number: 20070067559
    Abstract: A storage control apparatus according to the present invention includes a plurality of connecting units connected to one or more host computers and one or more hard disk drives as storage media for storing data, one or more non-volatile storage media which are of a different type from the hard disk drives and which store data WRITE requested from the host computer, a plurality of processing units for processing WRITE and READ requests from the host computer by using the hard disk drives or the non-volatile storage media and, a plurality of memory units for storing control information to be by the processing units.
    Type: Application
    Filed: October 26, 2005
    Publication date: March 22, 2007
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Shuji Nakamura
  • Patent number: 7191264
    Abstract: Disclosed is a disk control apparatus with excellent scalability realized on the same architecture, in high quality and reliability, regardless of its scale. Each of a plurality of channel interface units and a cache memory unit as well as each of a plurality of disk interface units and the cache memory unit are connected through a switch and a data path network (solid line) in each disk control cluster. Each switch provided outside each disk control cluster is connected to the switch in each disk control cluster through the data path network. A resource management unit is provided outside each disk control cluster and the resource management unit is connected to each of the plurality of channel interface units/disk interface units, as well as to the cache memory unit in each disk control cluster. The resource management unit is also connected to each switch provided outside each disk control cluster through a resource management network (dotted line).
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: March 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Hosoya, Kazuhisa Fujimoto
  • Publication number: 20070050571
    Abstract: A storage system including a storage device 1 which includes: media 50 for storing data from a host computer 2; a medium controller 14 for controlling the media; a plurality of channel controllers 11 for connecting to the host computer 2 through a channel; and a cache memory 13 for temporarily storing data from the host computer 2, wherein the media 50 have a restriction on a number of writing times. The storage device 1 includes a bus 123 for directly transferring data from the medium controller 14 to the channel controller 11.
    Type: Application
    Filed: October 12, 2005
    Publication date: March 1, 2007
    Inventors: Shuji Nakamura, Kazuhisa Fujimoto, Akira Fujibayashi
  • Patent number: 7171522
    Abstract: A storage system having a cluster configuration that prevents a load from concentrating on a certain storage node and enhances access performance is disclosed. The storage system is provided with plural storage adaptors having a cache memory for storing data read/written according to an I/O request from a host and a device for holding the data stored in the cache memory, means for connecting an external storage having a logical device that handles the read/written data and a cache memory to the storage adaptor, means for monitoring and grasping a usage situation of each cache memory of the plural storage adaptors and means for referring to information of the usage situation of each cache memory acquired by the grasping means and selecting any of the storage adaptors so that usage of each cache memory is equalized, and the logical device of the external storage is controlled by the storage adaptor selected by the selection means via connection means.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: January 30, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Watanabe, Yasutomo Yamamoto, Kazuhisa Fujimoto
  • Publication number: 20070022247
    Abstract: A disk array controller which includes a channel interface unit for connecting a host computer through a first type channel, a channel interface unit for connecting a host computer through a second type channel, a plurality of disk interface units provided with an interface with a magnetic disk unit respectively, a cache memory unit, and a shared memory unit. The number of access paths connected to said cache memory unit is less than the number of access paths connected to the shared memory unit.
    Type: Application
    Filed: October 2, 2006
    Publication date: January 25, 2007
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi
  • Patent number: 7167949
    Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: January 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Yamagami, Kazuhisa Fujimoto, Yasuo Kurosu, Hisao Honma
  • Publication number: 20070016667
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units and data caching control units are connected to each other through an interconnection, the data caching control units are divided into plural control clusters, each of the control clusters including at least two or more data caching control units, control of a cache memory is conducted independently for each of the control clusters, and one of the plural data caching control units manages, as a single system, protocol transformation units and the plural control clusters based on management information stored in a system management information memory unit.
    Type: Application
    Filed: August 25, 2006
    Publication date: January 18, 2007
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Patent number: 7149886
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: December 12, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai
  • Publication number: 20060277403
    Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.
    Type: Application
    Filed: August 17, 2006
    Publication date: December 7, 2006
    Inventors: Akira Fujibayashi, Kazuhisa Fujimoto, Hiroki Kanai