Patents by Inventor Kazuhisa Fujimoto

Kazuhisa Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060259786
    Abstract: A storage system encrypts a plain text received from an external device and stores the cryptogram into a disk unit and, thereafter, decrypts the stored data in the disk unit and transmits the decrypted text to the external device. The storage system includes an encryption unit for encrypting first data received from the external device, a decryption unit for decrypting the encrypted data into second data, and a comparison unit for comparing the first and second data. When the first data and the second data are in disagreement, the first data is encrypted by an encryption unit different from the encryption unit encrypted the first data and the encrypted data is decrypted by the decryption unit into third data, whereupon the first data and the third data are compared. When the first data and the third data are also in disagreement, a failure report is sent to the external device.
    Type: Application
    Filed: June 23, 2005
    Publication date: November 16, 2006
    Inventors: Makio Mizuno, Kazuhisa Fujimoto
  • Patent number: 7130961
    Abstract: To execute cache data identity control between disk controllers in plural disk controllers provided with each cache. To prevent a trouble from being propagated to another disk controller even if the trouble occurs in a specific disk controller. The identity control of data is executed via a communication means between disk controllers. In case update access from a host is received, data in a cache memory of a disk controller that controls at least a data storage drive is updated. It is desirable that a cache area is divided into an area for a drive controlled by the disk controller and an area for a drive controlled by another disk controller and is used.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 31, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Kazuhisa Fujimoto, Akira Fujibayashi
  • Publication number: 20060242361
    Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.
    Type: Application
    Filed: June 26, 2006
    Publication date: October 26, 2006
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
  • Patent number: 7120740
    Abstract: Disclosed herewith is a disk array system configured by a plurality of disk array controllers and another disk array apparatus that are operated as an integrated storage system while the system is prevented from degradation of the performance. The disk array controller is provided with a channel interface unit, a disk interface unit, a cache memory unit, a shared memory unit, a shared memory interconnection network for connecting a plurality of disk array control units to each another, and an inter-unit CM-SW for connecting a plurality of disk array control units to each another. The shared memory unit includes another disk array apparatus volume information collection unit for retaining volume information of another disk array apparatus while the inter-unit CM-SW includes a protocol translation interface.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: October 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Takase, Kazuhisa Fujimoto
  • Patent number: 7120739
    Abstract: To provide a storage system with a cost/performance meeting the system scale, from a small-scale to a large-scale configuration. In the storage system, protocol transformation units (10) and data caching control units (21) are connected to each other through an interconnection (31), the data caching control units (21) are divided into plural control clusters (70), each of the control clusters including at least two or more data caching control units (21), control of a cache memory (111) is conducted independently for each of the control clusters (70), and one of the plural data caching control units (21) manages, as a single system, protocol transformation units (10) and the plural control clusters (70) based on management information stored in a system management information memory unit (160).
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Naoki Watanabe, Kentaro Shimada
  • Patent number: 7111120
    Abstract: This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed. Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: September 19, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Akira Fujibayashi, Nobuyuki Minowa
  • Patent number: 7103710
    Abstract: A disk array controller having a first interface unit to a host computer, a second interface unit to a plurality of disk drives, a cache memory unit for temporarily storing data to be transferred to and from the disk drives, and a selector unit provided between the first and second interface units and the cache memory unit, wherein a plurality of connection requests from the first and second interface units are queued to preferentially process a connection request for a vacant access port to the cache memory unit.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: September 5, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Akira Fujibayashi
  • Patent number: 7069385
    Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: June 27, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
  • Publication number: 20060128323
    Abstract: In a multi-carrier communication apparatus, it is an object of the invention to increase the amount of data per unit time greatly with the band width kept unchanged. A modulator (102) sequentially performs primary modulation of data (101) which are first transmitted data on the basis of, for example, QPSK modulation. A pattern generating unit (104) generates a pattern of particular signals which is to be allocated to sub-carriers of a matrix formed by arranging a plurality of sub-carriers arranged in the direction of a frequency axis into a plurality of symbols in the direction of a time axis. The pattern is determined based on data (103) which are second transmitted data. A mapping unit (105) allocates the sub-carriers modulated by the data (101) at the modulator (102) and the pattern of the particular signals to the sub-carriers of the matrix.
    Type: Application
    Filed: December 16, 2003
    Publication date: June 15, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kazuhisa Fujimoto
  • Patent number: 7058761
    Abstract: A clustering disk subsystem comprising a switch holding a table which can modify a destination of a request from a host computer, wherein the switch transfers an access request to another channel according to a destination channel status such as heavy load or fault, and the channel which received the request processes the request by proxy for load balancing between internal disk controllers in a clustering disk subsystem. The subsystem has an effect in which load balancing or fail-over between channels or disk controllers can be performed without any special hardware or software in the host. As a result, good performance can be obtained even when access requests from the host computer are concentrated in a specific channel or disk controller.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: June 6, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Kazuhisa Fujimoto, Hiroki Kanai, Akira Yoshida
  • Publication number: 20060090027
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Application
    Filed: December 12, 2005
    Publication date: April 27, 2006
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Publication number: 20060085570
    Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability. A storage system includes an interface unit having an interface with a server or hard drives, a memory unit, a processor unit, and an interconnection.
    Type: Application
    Filed: October 11, 2005
    Publication date: April 20, 2006
    Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto, Kentaro Shimada
  • Patent number: 7020731
    Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: March 28, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
  • Patent number: 7000070
    Abstract: Disclosed herewith is a scalable disk array controller inter-connection network to be employed for a disk array system in which a plurality of disk array controllers connected to each another are expected to be operated as one disk array controller. The inter-connection network enables such disk array controllers to be added/removed without service interruption while the system reliability is kept as is. Each of the plurality of disk array controllers comprises a channel IF unit; a disk IF unit; a cache memory unit; a shared memory unit; means for connecting the channel IF unit/disk IF unit and the cache memory unit; and means for connecting the channel IF unit/disk IF unit and the shared memory unit. The inter-connection network comprises a plurality of switches to be increased in a scalable manner. Each of the switches is inter-connected with other switches with use of a redundant path having a separated physical route.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: February 14, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Norihiko Moriwaki, Kazuhisa Fujimoto
  • Publication number: 20060031389
    Abstract: A storage system is provided with a plurality of interface units each for connection with a server; an interface unit for connection with hard disk drives; a plurality of microprocessor units each for processing commands; and a switch unit for interconnecting the interface units and microprocessor units. A management console is also connected to the storage system. The storage system forces the management console to select an unused interface unit from among the plurality of interface units for use in a data input/output process between the server and the storage system, select a microprocessor unit which meets required performance of the server from among the plurality of microprocessor units for use in the data input/output process, and notify the administrator of the selected interface unit and microprocessor unit.
    Type: Application
    Filed: July 7, 2004
    Publication date: February 9, 2006
    Inventors: Norio Shimozono, Kazuhisa Fujimoto, Kiyoshi Honda, Naoko Iwami
  • Patent number: 6988087
    Abstract: The present invention provides a service method of rental storage, which, when a rental storage service provider provides a rental storage for rental storage service users, allows ideal use of storages in correspondence with the billing charge to the users by proposing the most optimum contract options to the users, and which allows suppressing the management cost of the users. The service method of rental storage through network connection, the storage provider will estimate the future usage of storage based on the history of usage of storage by the rental storage service user to report the estimation to the user. The rental storage service user will update the contract by expanding or reducing the amount of data usage so as to receive the most optimum contract conditions of rental storage service.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: January 17, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Tatsumi Uchigiri, Kazuhisa Fujimoto
  • Patent number: 6985989
    Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: January 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Hiroki Kanai, Akira Fujibayashi, Wataru Sakurai
  • Publication number: 20050283576
    Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
    Type: Application
    Filed: August 29, 2005
    Publication date: December 22, 2005
    Inventors: Kenji Yamagami, Kazuhisa Fujimoto, Yasuo Kurosu, Hisao Honma
  • Patent number: 6968426
    Abstract: This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed. Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: November 22, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Fujimoto, Akira Fujibayashi, Nobuyuki Minowa
  • Publication number: 20050257004
    Abstract: This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed. Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 17, 2005
    Inventors: Kazuhisa Fujimoto, Akira Fujibayashi, Nobuyuki Minowa