Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cache memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.

Abstract: A clustering disk subsystem comprising a switch holding a table which can modify a destination of a request from a host computer, wherein the switch transfers an access request to another channel according to a destination channel status such as heavy load or fault, and the channel which received the request processes the request by proxy for load balancing between internal disk controllers in a clustering disk subsystem. The subsystem has an effect in which load balancing or fail-over between channels or disk controllers can be performed without any special hardware or software in the host. As a result, good performance can be obtained even when access requests from the host computer are concentrated in a specific channel or disk controller.

Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.

Abstract: A disk array controller installed with a plurality of interfaces with the host computer or disk device, duplicated shared memories connected in a ratio of one to one between each interface and respective access path, a selector connected to the plurality of interfaces, and a cache memory connected to said selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor for the plurality of interfaces performs dual writing in the duplicated shared memories.

Abstract: A disk array controller, comprising a channel interface unit for connecting a host computer through a first type channel; a channel interface unit for connecting a host computer through a second type channel; a plurality of disk interface units provided with an interface with a magnetic disk unit respectively; a cache memory unit; and a shared memory unit; wherein the number of access paths connected to said cache memory unit is less than the number of access paths connected to said shared memory unit.

Abstract: In a storage system in which: LSW 110 is a local switch, GSW 115 is a global switch, and 21 is a global shared memory unit; when a host computer 3 makes a data read request to a disk control cluster 1-1, a channel interface unit 11 accesses to a local shared memory unit 22 via the LSW 110, and if the data exists in the disk control cluster 1-1, the channel interface unit 11 read the data from the local shared memory unit 22 or the disk drive 2 so as to transfer to the host computer 3. If the data is not in the disk control cluster 1-1, the channel interface unit 11 accesses to the global shared memory unit 21, check a disk control cluster with the requested data stored therein, obtains the requested data from the disk control cluster where the requested data is stored, and transfer the data to the host computer 3.

Abstract: In a disk array system of the present invention, each host or disk interface unit is connected to each shared memory unit through a switch unit. The switch unit includes the number of packet buffers greater than the number of the host or disk interface units connected thereto, and can always hold the number of access requests greater than the number of the host or disk interface units. The disk array system uses the packet buffers to compensate for a transfer rate difference between the host interface units and the shared memory units, thereby allowing connection of the host interface units having different performance. The disk array system improves the efficiency of usage of internal paths without increasing the number of I/O ports of the switch unit. The system throughput is thereby improved, and the support for host I/Fs having different performance is thereby facilitated.

Abstract: A disk array controller having a first interface unit to a host computer, a second interface unit to a plurality of disk drives, a cache memory unit for temporarily storing data to be transferred to and from the disk drives, and a selector unit provided between the first and second interface units and the cache memory unit, wherein a plurality of connection requests from the first and second interface units are queued to preferentially process a connection request for a vacant access port the cache memory unit.

Abstract: A disk array controller having a first interface unit to a host computer, a second interface unit to a plurality of disk drives, a cache memory unit for temporarily storing data to be transferred to and from the disk drives, and a selector unit provided between the first and second interface units and the cache memory unit, wherein a plurality of connection requests from the first and second interface units are queued to preferentially process a connection request for a vacant access port to the cache memory unit.

Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.

Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.

Abstract: The disk array controller includes a plurality of interfaces with respective processors for connecting with a host computer or disk devices, duplicated shared memories connected in a one to one ratio between each interface and respective access paths, a selector connected to the plurality of interfaces, and a cache memory connected to the selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor performs dual writing in the duplicated shared memories.

Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.

Abstract: A disk array controller having a first interface unit to a host computer, a second interface unit to a plurality of disk drives, a cache memory unit for temporarily storing data to be transferred to and from the disk drives, and a selector unit provided between the first and second interface units and the cache memory unit, wherein a plurality of connection requests from the first and second interface units are queued to preferentially process a connection request for a vacant access port to the cache memory unit.

Abstract: A storage system effectively manages the total capacity of hard disk drives to store block-basis data and file-basis data with a shared storage medium and a managing means for managing all the storage areas in the storage medium. When block data and address are input through a fiber channel port, a block data input/output means converts its data format to a data format that is internally applied by the storage system. When file data and address are input through an Ethernet port, a file system converts its data format to the data format internally applied by the storage system, such as the block data format. The file system derives the address of a logical volume from the received address information and translates file data to block data. The managing means derives the address of a logical volume to which to write block data from the address information delivered from the block data input/output means.

Abstract: A disk array controller having a first interface unit to a host computer, a second interface unit to a plurality of disk drives, a cache memory unit for temporarily storing data to be transferred to and from the disk drives, and a selector unit provided between the first and second interface units and the cache memory unit, wherein a plurality of connection requests from the first and second interface units are queued to preferentially process a connection request for a vacant access port to the cache memory unit.

Abstract: When there is an access passing between unit disk controllers, the band of a mutual connecting network must be very large in order to exhibit the performance sufficiently, so that the cost is increased. In the present invention, the access number of a logical volume is monitored, the change of an access path is suggested to an upper class device, and the logical volume is moved or copied to each unit disk controller, so that the mutual connecting network is used mainly for copy of the logical volume, thereby reducing the necessary band.

Abstract: A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes interconnections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.

Abstract: The present invention provides a service method of rental storage, which, when a rental storage service provider provides a rental storage for rental storage service users, allows ideal use of storages in correspondence with the billing charge to the users by proposing the most optimum contract options to the users, and which allows suppressing the management cost of the users.

Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.