Patents by Inventor Kazunari Suzuki

Kazunari Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040164428
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 26, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI System Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20040159922
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 19, 2004
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Publication number: 20040126932
    Abstract: A method of manufacturing a semiconductor device is provided including preparing a lead frame having a plurality of leads, wherein the lead widths of the lead tips are smaller than the lead thickness of the tips. A plate is also prepared having a first portion and second portion on a main surface thereof, the second portion being located at the outer periphery of said first portion. A semiconductor chip having a semiconductor element and a plurality of electrodes is fastened to the first portion of the plate and the lead tips are fastened on the second portion of the plate. Bonding wires are then formed to electrically connect the lead tips and the electrodes of the semiconductor chip, and then the lead tips, the plate, the semiconductor chip and the bonding wires are sealed with a molding member.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 1, 2004
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Patent number: 6723583
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: April 20, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co. Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6723020
    Abstract: A planetary carrier supports pinion gears of a planetary gear set via pinion shafts. Each hole in which a pinion shaft is mounted has a shallow hardened wall surface that is hardened by very-high-frequency induction heating and quenching. Therefore, the durability of the pinion shaft-supporting holes of a cold-forged piece or a pressed piece can be improved without thermal strain.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: April 20, 2004
    Assignee: Aisin AW Co., Ltd.
    Inventors: Kouji Ohbayashi, Kazunari Suzuki, Yoshihisa Yamamoto, Kengo Nomura
  • Patent number: 6692989
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: February 17, 2004
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems, Co., Ltd.
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Patent number: 6673655
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: January 6, 2004
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Publication number: 20030205797
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: June 4, 2003
    Publication date: November 6, 2003
    Applicants: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20030204010
    Abstract: An adhesive, comprising (A) a polymeric MDI, (B) modified polyvinyl acetate emulsion, (C) aqueous polyvinyl alcohol solution, and (D) a filler.
    Type: Application
    Filed: May 15, 2003
    Publication date: October 30, 2003
    Inventors: Ritsuo Iwata, Hironao Nagashima, Tomohide Ogata, Kazunari Suzuki, Koji Nakajima
  • Publication number: 20030153127
    Abstract: Techniques are provided for preventing occurrence of damage to the top surface of a semiconductor chip at the time of die bonding the semiconductor chip by use of a contact collet. A protection tape is pasted to the top surface of the semiconductor chip before die bonding of the semiconductor chip is executed by pressing the back surface (underside) of the semiconductor chip sucked and securely held by the contact collect against respective chip-mounting regions of a multi-wiring board. The contact collect is, for example, substantially cylindrical in outside shape, and a bottom part (suction head) thereof is made of a soft synthetic rubber, and so forth. The protection tape pasted to pasted to the top surface of the semiconductor chip can prevent the top surface of the semiconductor chip from coming in direct contact with the contact collet even at the time of vacuum suction by pressing the suction head of the contact collect against the top surface of the semiconductor chip.
    Type: Application
    Filed: January 15, 2003
    Publication date: August 14, 2003
    Applicant: Hitachi, Ltd. Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Wada, Kazunari Suzuki, Chuichi Miyazaki, Toshihiro Shiotsuki, Tomoko Higashino
  • Patent number: 6596561
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: July 22, 2003
    Assignees: Hitachi, Ltd., Hitachi USLI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20030124770
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Application
    Filed: February 24, 2003
    Publication date: July 3, 2003
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Patent number: 6558980
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: May 6, 2003
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Publication number: 20030052419
    Abstract: In the manufacture of a semiconductor device by adopting a block molding method wherein a semiconductor chip is fixed onto a wiring substrate through an adhesive, the occurrence of a defect caused by flowing-out of the adhesive is to be prevented. The semiconductor device according to the present invention comprises a wiring substrate, the wiring substrate having a main surface, an insulating film formed on the main surface, and electrodes formed on the main surface so as to be exposed from the insulating film, a semiconductor chip fixed through an adhesive onto the insulating film formed on the main surface of the wiring substrate, conductive wires for connecting the electrodes on the main surface of the wiring substrate and electrodes on the semiconductor chip with each other, and a seal member, i.e.
    Type: Application
    Filed: August 22, 2002
    Publication date: March 20, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Mikako Ujiie, Michiaki Sugiyama, Kazunari Suzuki, Masachika Masuda, Tamaki Wada
  • Publication number: 20030017652
    Abstract: A semiconductor device comprising a semiconductor chip having an electrode on a circuit formation surface thereof, a flexible film having a lead attached thereto and electrically connected to said electrode of said semiconductor chip through a bump, a resin for covering said circuit formation surface of said semiconductor chip and a resin film for covering a back surface facing said circuit formation surface of said semiconductor chip.
    Type: Application
    Filed: September 24, 2002
    Publication date: January 23, 2003
    Inventors: Masako Sakaki, Kazunari Suzuki, Seiichi Ichihara, Tomoaki Kudaishi, Hisao Nakamura, Kunihiko Nishi, Hideki Tanaka, Yutaka Nakajima
  • Publication number: 20020192871
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≧1.2 t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads.
    Type: Application
    Filed: July 26, 2002
    Publication date: December 19, 2002
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Publication number: 20020179205
    Abstract: A planetary carrier supports pinion gears of a planetary gear set via pinion shafts. Each hole in which a pinion shaft is mounted has a shallow hardened wall surface that is hardened by very-high-frequency induction heating and quenching. Therefore, the durability of the pinion shaft-supporting holes of a cold-forged piece or a pressed piece can be improved without thermal strain.
    Type: Application
    Filed: May 22, 2002
    Publication date: December 5, 2002
    Inventors: Kouji Ohbayashi, Kazunari Suzuki, Yoshihisa Yamamoto, Kengo Nomura
  • Patent number: 6476479
    Abstract: A semiconductor device includes a semiconductor chip having a plurality of electrodes formed on a first major surface thereof, a resin package sealing the semiconductor chip therein, a plurality of leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: November 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Miyaki, Kazunari Suzuki, Daisuke Omoda
  • Publication number: 20020146864
    Abstract: To improve a reflow characteristic and realize leadlessness. A semiconductor device comprises a cross die pad which supports a semiconductor chip and in which an area of the region joined to the semiconductor chip is smaller than that of the outer size thereof being smaller than the rear surface of the semiconductor chip; wires connected to pads of the semiconductor chip; a plurality of inner leads which are arranged around the semiconductor chip and in which a silver plating layer is formed at a wire bonding area; molding resin for resin sealing the semiconductor chip; a plurality of outer leads exposed from the molding resin and in which a lead-free metallic layer is formed on a contact surface, wherein the flat surface size of the molding resin is formed to be equal to or less than 28 mm×28 mm and the thickness thereof is formed to be 1.4 mm or less, and thereby it is possible to improve a reflow characteristic and realize leadlessness.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 10, 2002
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Kunihiko Nishi
  • Publication number: 20020137262
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka