Patents by Inventor Kazunari Suzuki

Kazunari Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020137262
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Publication number: 20020137261
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads. In a molding member-sealed semiconductor device wherein the semiconductor chip is fixed to the heat radiation plate, the tip thickness t′ of the inner leads is made less than the thickness t of the other portions of the inner leads secured to the heat radiation plate.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Patent number: 6445076
    Abstract: An insulating adhesive for electronic parts, which is to be used for bonding a semiconductor chip to a lead frame and comprises a resin and a solvent, the resin having (A) a weight average molecular weight (Mw) of 30,000 to 300,000 based on conversion into polystyrene and (B) a ratio of weight average molecular weight (Mw)/number average molecular weight (Mn) of 5 or less, and (C) the insulating adhesive for electronic parts having a viscosity of 5,000 to 100,000 mPa.s at a rotation number of 10 rpm and a viscosity ratio (&eegr;1 rpm/&eegr;10 rpm) of 1.0 to 6.0 as measured at 25° C. with an E-type viscometer.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: September 3, 2002
    Assignees: Hitachi Chemical Company, Ltd., Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Takehiro Shimizu, Takafumi Dohdoh, Kazumi Tameshige, Hidekazu Matsuura, Yoshihiro Nomura, Kunihiro Tsubosaki, Toshihiro Shiotsuki, Kazunari Suzuki, Tomoko Higashino
  • Patent number: 6441400
    Abstract: A semiconductor device includes a semiconductor chip having a plurality of electrodes formed on a first major surface thereof, a resin package sealing the semiconductor chip therein, a plurality of leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: August 27, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Miyaki, Kazunari Suzuki, Daisuke Omoda
  • Publication number: 20020074650
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: November 15, 2001
    Publication date: June 20, 2002
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6396142
    Abstract: In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: May 28, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Fujio Ito, Hiroaki Tanaka, Hiromichi Suzuki, Tokuji Toida, Takafumi Konno, Kunihiro Tsubosaki, Shigeki Tanaka, Kazunari Suzuki, Akihiko Kameoka
  • Publication number: 20020056904
    Abstract: A semiconductor device comprises a semiconductor chip having a plurality of electrodes formed in a first major surface thereof, a resin package sealing the semiconductor chip therein, a plurality leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.
    Type: Application
    Filed: January 22, 2002
    Publication date: May 16, 2002
    Inventors: Yoshinori Miyaki, Kazunari Suzuki, Daisuke Omoda
  • Publication number: 20020056905
    Abstract: A semiconductor device comprises a semiconductor chip having a plurality of electrodes formed in a first major surface thereof, a resin package sealing the semiconductor chip therein, a plurality leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.
    Type: Application
    Filed: January 22, 2002
    Publication date: May 16, 2002
    Inventors: Yoshinori Miyaki, Kazunari Suzuki, Daisuke Omoda
  • Publication number: 20020043717
    Abstract: The cost of a semiconductor device is to be reduced. An electrical connection between a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip is made through an inner lead portion of a lead disposed at a position around the first semiconductor chip and two bonding wires.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 18, 2002
    Inventors: Toru Ishida, Tetsuharu Urawa, Fujio Ito, Tomoo Matsuzawa, Kazunari Suzuki, Akihiko Kameoka, Hiromichi Suzuki, Takuji Ide
  • Patent number: 6372554
    Abstract: A pattern of more than one conductive layer overlying a fuse formed in a TEG region is subject to OR processing; further, a combined or “synthetic” pattern with an opening pattern of one or more testing pads connected to said fuse added thereto is copied by transfer printing techniques to a photosensitive resin layer that is coated on the surface of a semiconductor wafer, thereby forcing the resin layer to reside only in a selected area of a scribe region, to which area the synthetic pattern has been transferred.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: April 16, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Keizo Kawakita, Kazuhiko Kajigaya, Seiji Narui, Kiyoshi Nakai, Kazunari Suzuki, Hideaki Tsugane, Fumiyoshi Sato
  • Patent number: 6340837
    Abstract: A semiconductor device includes a semiconductor chip having a plurality of electrodes formed on a first major surface thereof, a resin package sealing the semiconductor chip therein, of leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: January 22, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yoshinori Miyaki, Kazunari Suzuki, Daisuke Omoda
  • Publication number: 20010031819
    Abstract: An adhesive, comprising (A) a polymeric MDI, (B) modified polyvinyl acetate emulsion, (C) aqueous polyvinyl alcohol solution, and (D) a filler. Preferably, amass ratio of A:B:C:D is 30:(60-160):(50-160):(10-140) provided that the aqueous polyvinyl alcohol solution (C) is in a concentration of 10% by mass.
    Type: Application
    Filed: March 16, 2001
    Publication date: October 18, 2001
    Inventors: Ritsuo Iwata, Hironao Nagashima, Tomohide Ogata, Kazunari Suzuki, Koji Nakajima
  • Patent number: 6291273
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: September 18, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Publication number: 20010010949
    Abstract: A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold.
    Type: Application
    Filed: April 11, 2001
    Publication date: August 2, 2001
    Inventors: Yoshinori Miyaki, Hiromichi Suzuki, Kazunari Suzuki, Takafumi Nishita, Fujio Ito, Kunihiro Tsubosaki, Akihiko Kameoka, Kunihiko Nishi
  • Patent number: 6221322
    Abstract: Low-cost, high-purity strontium nitrate that is low in Ba, Na, Ca, Cr, and other impurities and that is suitable for use in airbags or the like is provided. High-purity strontium nitrate having a Ba content of 0.01 wt % or lower, an Na content of 0.005 wt % or lower, a Ca content of 0.01 wt % or lower, a Cr content of less than 0.001 wt %, and a purity of 99.5 wt % or higher is produced by a manufacturing method comprising a first step for performing crystallization by adding nitric acid to an aqueous solution obtained by dissolving a strontium compound as a starting material, a second step for separating the resulting crystals, a third step for crystallizing the resulting separated solution, and a fourth step for separating the resulting crystals.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: April 24, 2001
    Assignees: Dowa Mining Co., LTD, Dowa Hightech Co., LTD
    Inventors: Tatsumi Inamura, Atsushi Tsukada, Kazunari Suzuki, Choju Nagata
  • Patent number: 5874773
    Abstract: The resin-sealed package includes a lead frame having a supporting and heat spreading pad and inner and outer leads arranged to surround the supporting and head spreading pad. A tape automated bonding (TAB) structure is provided having a semiconductor chip having bonding pads formed on a periphery of a main surface of the semiconductor chip. A rear surface of the semiconductor chip is fixed to the supporting and head spreading pad. TAB leads are provided on the main surface of the semiconductor chip. One end of each TAB lead is connected with said bonding pads and the other end of each TAB lead is connected with one end of each inner lead of the lead frame. A resin molding is used for sealing the TAB structure and the supporting and head spreading pad and inner leads of the lead frame. An area of the supporting and head spreading pad is larger than that of the semiconductor chip of said TAB structure.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: February 23, 1999
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Kazuhiro Terada, Kunihiro Tsubosaki, Hiroshi Watanabe, Kazunari Suzuki
  • Patent number: 5869888
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 9, 1999
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita
  • Patent number: 5714405
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 3, 1998
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Systems, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita
  • Patent number: 5637913
    Abstract: In order to improve the package body cracking resistance of an LSI package at the reflow soldering and to provide both a leadframe suitable for fabricating the LSI package according to the flexible manufacturing system and an LSI using the leadframe, the adhered area between a semiconductor chip 2 and a resin is enlarged by making the external size of a die pad 3 smaller than that of the semiconductor chip to be mounted thereon. Moreover, a variety of semiconductor chips 2 having different external sizes can be mounted on the die pad 3 by cutting the leading ends of leads 5 to a suitable length in accordance with the external sizes of the semiconductor chips 2.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: June 10, 1997
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Yujiro Kajihara, Kazunari Suzuki, Kunihiro Tsubosaki, Hiromichi Suzuki, Yoshinori Miyaki, Takahiro Naito, Sueo Kawai
  • Patent number: 5583375
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: December 10, 1996
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita