Patents by Inventor Kazuo Yamazaki

Kazuo Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12142629
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: November 12, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20240284066
    Abstract: A photoelectric conversion device can execute a first driving for outputting a signal based on a sum of charges generated in photoelectric conversion units and a second driving for outputting a signal based on charges generated in one photoelectric conversion unit. A first operation mode in which a signal is read from a pixel of one row by the first driving and a second operation mode in which a signal is read from a pixel of one row by continuously performing the first driving and the second driving are switchable for each row. An output signal of a first pixel row is corrected based on a first correction value based on an output signal of a second pixel row read in the first operation mode and a second correction value based on an output signal of the second pixel row read in the second operation mode.
    Type: Application
    Filed: February 9, 2024
    Publication date: August 22, 2024
    Inventors: TAKASHI FUKUHARA, KAZUO YAMAZAKI
  • Publication number: 20240194715
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: February 26, 2024
    Publication date: June 13, 2024
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20240165744
    Abstract: There is provided an additive processing device that models a workpiece by melting a supplied powder material and forming layers of the melted powder material. The additive processing device includes a laser head configured to supply the powder material to the workpiece and irradiate the workpiece with a laser beam, a drive unit configured to drive the laser head, a recognition unit configured to recognize a height of the workpiece in a laminating direction at a plurality of locations while the laser head is forming a predetermined N-th layer (N being a natural number) of the workpiece, an estimation unit configured to estimate a surface shape of the N-th layer of the workpiece based on the recognized heights at the plurality of locations, and a control unit configured to control the laser head and the drive unit.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 23, 2024
    Applicants: INTELLIGENT MANUFACTURING SYSTEMS INTERNATIONAL, DMG MORI CO., LTD.
    Inventors: Hideki AOYAMA, Kazuo YAMAZAKI, Erika OKAMOTO, Masahiro UEDA
  • Patent number: 11948952
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: April 2, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 11942501
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: March 26, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20240088196
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20240080588
    Abstract: The photoelectric conversion device includes a plurality of pixels arranged to form a plurality of columns, a plurality of AD conversion circuits provided corresponding to the plurality of columns, and a control circuit configured to control the AD conversion circuits. The plurality of pixels includes an OB pixel arranged in a first column and an effective pixel arranged in a second column. The plurality of AD conversion circuits each include a first AD conversion circuit including a first comparator receiving a signal of the OB pixel, and a second AD conversion circuit including a second comparator receiving a signal of the effective pixel. The control circuit controls the first and second comparators such that the result of the AD conversion by the first AD conversion circuit is determined earlier than the result of the AD conversion by the second AD conversion circuit for signals of the same level.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 7, 2024
    Inventor: Kazuo Yamazaki
  • Patent number: 11846542
    Abstract: A photoelectric conversion apparatus includes a pixel and a counter circuit. The pixel includes a first avalanche photodiode and a second avalanche photodiode having different sensitivity to light. The counter circuit is configured to count a first signal based on charges generated in the first avalanche photodiode, and a second signal based on charges generated in the second avalanche photodiode. Processing on the count value is different between a case where a count value output from the counter circuit is larger than a threshold value and a case where the count value output from the counter circuit is smaller than the threshold value.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 19, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Yukihiro Kuroda
  • Patent number: 11849239
    Abstract: The photoelectric conversion device includes a plurality of pixels arranged to form a plurality of columns, a plurality of AD conversion circuits provided corresponding to the plurality of columns, and a control circuit configured to control the AD conversion circuits. The plurality of pixels includes an OB pixel arranged in a first column and an effective pixel arranged in a second column. The plurality of AD conversion circuits each include a first AD conversion circuit including a first comparator receiving a signal of the OB pixel, and a second AD conversion circuit including a second comparator receiving a signal of the effective pixel. The control circuit controls the first and second comparators such that the result of the AD conversion by the first AD conversion circuit is determined earlier than the result of the AD conversion by the second AD conversion circuit for signals of the same level.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: December 19, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazuo Yamazaki
  • Patent number: 11843023
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20230347412
    Abstract: There is provided an additive processing device that models a workpiece by melting a supplied powder material and forming layers of the melted powder material. The additive processing device is provided with a laser head configured to supply the powder material to the workpiece and irradiate the workpiece with a laser beam, a drive unit configured to drive the laser head, a recognition unit configured to recognize a height of the workpiece in a laminating direction while the laser head is forming an N-th layer (N being a natural number) of the workpiece, a generation unit configured to generate a drive path for the laser head for formation of an N+1-th layer of the workpiece, based on the recognized height, and a control unit configured to control the drive unit based on the drive path.
    Type: Application
    Filed: August 17, 2022
    Publication date: November 2, 2023
    Applicants: INTELLIGENT MANUFACTURING SYSTEMS INTERNATIONAL, DMG MORI CO., LTD.
    Inventors: Hideki AOYAMA, Kazuo YAMAZAKI, Erika OKAMOTO, Kengo AIZAWA, Masahiro UEDA
  • Publication number: 20230215894
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: March 15, 2023
    Publication date: July 6, 2023
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20230216459
    Abstract: A photoelectric conversion apparatus includes a pixel which includes a photoelectric conversion element; a signal line connected with the pixel; a voltage-current conversion unit configured to convert a voltage signal of the signal line into current; and a conversion unit that includes an oversampling type analog-to-digital conversion circuit that converts the current outputted from the voltage-current conversion unit into digital signals. The voltage-current conversion unit converts the voltage signal of the signal line into the current without sampling and holding and outputs the converted current to the conversion unit.
    Type: Application
    Filed: December 20, 2022
    Publication date: July 6, 2023
    Inventors: HIDEO KOBAYASHI, KAZUO YAMAZAKI
  • Publication number: 20230178580
    Abstract: A photoelectric conversion device includes a first substrate and a second substrate laminated one on another. The first substrate has a pixel region having a photoelectric conversion element for acquiring a pixel signal, the second substrate has a processing circuit for processing the pixel signal, a first wire, which includes a plurality of wire layers and which is a common wire to be connected in common with a plurality of pixels in the pixel region, is arranged, and a second wire, which includes a plurality of wire layers and which is a wire for supplying a power supply voltage to the processing circuit, is arranged. At least a part of a shield wire, which is not to be electrically connected with any of the first wire and the second wire, is arranged between the first wire and the second wire.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 8, 2023
    Inventors: Kazuo Yamazaki, Hideo Kobayashi
  • Publication number: 20230179893
    Abstract: A photoelectric conversion device includes a plurality of pixels, a plurality of output lines, to which signals from corresponding pixels are output, respectively, an amplification unit arranged corresponding to each of the plurality of output lines and configured to amplify a signal output to a corresponding output line, a comparison unit arranged corresponding to each of the plurality of output lines and having a first input terminal and a second input terminal, a signal corresponding to an output of the amplification unit being input to the first input terminal, a reference signal being input to the second input terminal, and a switch connecting nodes of the plurality of output lines. During a period before an offset clamping operation is completed, the switch is turned on.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 8, 2023
    Inventors: KAZUKI OHSHITANAI, KAZUO YAMAZAKI
  • Patent number: 11653114
    Abstract: An embodiment includes: a semiconductor substrate including a pixel well region and a peripheral well region; a pixel ground line arranged above the pixel well region; a pixel well contact between the pixel ground line and the pixel well region; pixels arranged to form columns in the pixel well region; a reference signal generation circuit arranged in the peripheral well region; and comparator units arranged in the peripheral well region, provided to respective columns, and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor unit between the reference signal generation circuit and the second input node, and a second capacitor unit between the second input node and the pixel ground line.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: May 16, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Keigo Nakazawa, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi
  • Patent number: 11641530
    Abstract: A photoelectric conversion device comprising: a plurality of effective pixels and a plurality of light shielded pixels which are arranged respectively in a plurality of rows and a plurality of columns; and a signal processing circuit, wherein in a period during which pixel signals are output from first light shielded pixels which are first-row light shielded pixels to a first vertical output line, pixel signals are output from second light shielded pixels which are second-row light shielded pixels to a second vertical output line, and the signal processing circuit corrects effective pixel signals output from the effective pixels by using a correction signal obtained by performing filtering processing on pixel signals from the first light shielded pixels and on the pixel signals from the second light shielded pixels.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: May 2, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hotaka Kusano, Kazuo Yamazaki
  • Patent number: 11637141
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: April 25, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20230075728
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 9, 2023
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata