Patents by Inventor Kazuo Yamazaki

Kazuo Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11496704
    Abstract: A photoelectric conversion device includes: pixels forming columns and each configured to output a pixel signal; and comparator units provided to respective columns and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor that connects a reference signal line and the second input node, a second capacitor whose one electrode is connected to the second input node, and a select unit that connects the other electrode of the second capacitor to either the reference signal line or a reference voltage line. The other electrode of the second capacitor is connected to the reference signal line during first mode AD conversion and connected to the reference voltage line during second mode AD conversion.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: November 8, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masaki Sato, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi, Keigo Nakazawa
  • Publication number: 20220303491
    Abstract: The photoelectric conversion device includes a plurality of pixels arranged to form a plurality of columns, a plurality of AD conversion circuits provided corresponding to the plurality of columns, and a control circuit configured to control the AD conversion circuits. The plurality of pixels includes an OB pixel arranged in a first column and an effective pixel arranged in a second column. The plurality of AD conversion circuits each include a first AD conversion circuit including a first comparator receiving a signal of the OB pixel, and a second AD conversion circuit including a second comparator receiving a signal of the effective pixel. The control circuit controls the first and second comparators such that the result of the AD conversion by the first AD conversion circuit is determined earlier than the result of the AD conversion by the second AD conversion circuit for signals of the same level.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 22, 2022
    Inventor: Kazuo Yamazaki
  • Publication number: 20220201233
    Abstract: A photoelectric conversion device includes a pixel that outputs a pixel signal in accordance with an incident light, a plurality of signal holding units each configured to hold the pixel signal, an AD conversion unit that converts the pixel signal from analog signal to digital signal, a first switch circuit provided between the pixel and the plurality of signal holding units, and a second switch circuit provided between the plurality of signal holding units and the AD conversion unit. The first switch circuit is configured to connect the pixels to the plurality of signal holding units individually to hold one pixel signal in the plurality of signal holding units, respectively, in different sampling periods, the second switch circuit is configured to switch connection between the plurality of signal holding units and the AD conversion unit, and pixel signals held in the plurality of signal holding units are averaged and output.
    Type: Application
    Filed: March 11, 2022
    Publication date: June 23, 2022
    Inventors: Hideaki Takada, Kazuo Yamazaki
  • Publication number: 20220190011
    Abstract: A photoelectric conversion apparatus includes a plurality of pixels each including a first avalanche photodiode and a second avalanche photodiode having a light-receiving surface area size different from a light-receiving surface area size of the first avalanche photodiode. The first avalanche photodiode is connected between a first waveform shaping circuit and a first switch. The second avalanche photodiode is connected between a second waveform shaping circuit and a second switch. An inverter circuit is connected between a control node of the first switch and a control node of the second switch.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 16, 2022
    Inventor: Kazuo Yamazaki
  • Publication number: 20220140838
    Abstract: A ramp signal output circuit includes a first reference current source transistor to which a current is supplied from a current source, a first line connecting a gate of the first reference current source transistor and a gate of a first current source transistor, a branch point where a second line branches from the first line, a first ramp signal generation unit connected to the first current source transistor, and a second ramp signal generation unit connected to a second current source transistor, wherein the second line is connected to a gate of the second current source transistor.
    Type: Application
    Filed: October 26, 2021
    Publication date: May 5, 2022
    Inventors: Seiichirou Sakai, Kazuo Yamazaki, Hiroaki Kameyama
  • Patent number: 11310453
    Abstract: A photoelectric conversion device includes a pixel that outputs a pixel signal in accordance with an incident light, a plurality of signal holding units each configured to hold the pixel signal, an AD conversion unit that converts the pixel signal from analog signal to digital signal, a first switch circuit provided between the pixel and the plurality of signal holding units, and a second switch circuit provided between the plurality of signal holding units and the AD conversion unit. The first switch circuit is configured to connect the pixels to the plurality of signal holding units individually to hold one pixel signal in the plurality of signal holding units, respectively, in different sampling periods, the second switch circuit is configured to switch connection between the plurality of signal holding units and the AD conversion unit, and pixel signals held in the plurality of signal holding units are averaged and output.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: April 19, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideaki Takada, Kazuo Yamazaki
  • Publication number: 20210389176
    Abstract: A photoelectric conversion apparatus includes a pixel and a counter circuit. The pixel includes a first avalanche photodiode and a second avalanche photodiode having different sensitivity to light. The counter circuit is configured to count a first signal based on charges generated in the first avalanche photodiode, and a second signal based on charges generated in the second avalanche photodiode. Processing on the count value is different between a case where a count value output from the counter circuit is larger than a threshold value and a case where the count value output from the counter circuit is smaller than the threshold value.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 16, 2021
    Inventors: Kazuo Yamazaki, Yukihiro Kuroda
  • Publication number: 20210314508
    Abstract: A photoelectric conversion device comprising: a plurality of effective pixels and a plurality of light shielded pixels which are arranged respectively in a plurality of rows and a plurality of columns; and a signal processing circuit, wherein in a period during which pixel signals are output from first light shielded pixels which are first-row light shielded pixels to a first vertical output line, pixel signals are output from second light shielded pixels which are second-row light shielded pixels to a second vertical output line, and the signal processing circuit corrects effective pixel signals output from the effective pixels by using a correction signal obtained by performing filtering processing on pixel signals from the first light shielded pixels and on the pixel signals from the second light shielded pixels.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 7, 2021
    Inventors: Hotaka Kusano, Kazuo Yamazaki
  • Patent number: 11115608
    Abstract: According to the present disclosure, column circuits operate selectively in a first drive mode to output a comparison signal or a second drive mode to acquire a correction value of a first reference signal and a second reference signal, and a selector circuit of a second column circuit selects the same reference signal out of the first reference signal and the second reference signal in the first drive mode and the second drive mode.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: September 7, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiichirou Sakai, Hiroaki Kameyama, Kazuo Yamazaki, Koichiro Iwata, Kohichi Nakamura
  • Patent number: 11094733
    Abstract: A semiconductor device has a first transistor of a first conductivity type and a second transistor of a second conductivity type, the first transistor is arranged in an active region of a semiconductor substrate, and a gate electrode and the active region overlap with each other in a plan view and also have a portion located between the source and the drain of the first transistor of the semiconductor substrate. In the channel width direction, an impurity concentration of the second conductivity type is higher at the end than on the center side of the portion.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: August 17, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Akira Oseto, Tatsunori Kato, Ryunosuke Ishii, Takanori Watanabe, Atsushi Suzuki, Koichiro Iwata, Kazuo Yamazaki, Hideaki Takada, Akira Ohtani
  • Publication number: 20210242266
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 5, 2021
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 11064140
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 13, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 11011565
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: May 18, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 10992886
    Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: April 27, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Shinichiro Shimizu, Yasuhiro Oguro, Yu Arishima, Hideaki Takada
  • Publication number: 20210021770
    Abstract: An embodiment includes: a semiconductor substrate including a pixel well region and a peripheral well region; a pixel ground line arranged above the pixel well region; a pixel well contact between the pixel ground line and the pixel well region; pixels arranged to form columns in the pixel well region; a reference signal generation circuit arranged in the peripheral well region; and comparator units arranged in the peripheral well region, provided to respective columns, and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor unit between the reference signal generation circuit and the second input node, and a second capacitor unit between the second input node and the pixel ground line.
    Type: Application
    Filed: July 10, 2020
    Publication date: January 21, 2021
    Inventors: Keigo Nakazawa, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi
  • Publication number: 20210021782
    Abstract: A photoelectric conversion device includes: pixels forming columns and each configured to output a pixel signal; and comparator units provided to respective columns and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor that connects a reference signal line and the second input node, a second capacitor whose one electrode is connected to the second input node, and a select unit that connects the other electrode of the second capacitor to either the reference signal line or a reference voltage line. The other electrode of the second capacitor is connected to the reference signal line during first mode AD conversion and connected to the reference voltage line during second mode AD conversion.
    Type: Application
    Filed: June 30, 2020
    Publication date: January 21, 2021
    Inventors: Masaki Sato, Kazuhiro Saito, Tetsuya Itano, Kazuo Yamazaki, Hideo Kobayashi, Keigo Nakazawa
  • Patent number: 10889098
    Abstract: A method for generating control data is a method for generating control data for manufacturing a product having a designated shape using an additive manufacturing technology. The control data includes a path of a nozzle for supplying a material. The method for generating the control data includes: determining a cutting path for cutting the designated shape by a tool; and determining the path of the nozzle by reproducing the cutting path temporally reversely.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: January 12, 2021
    Assignees: MACHINE TOOL TECHNOLOGIES RESEARCH FOUNDATION, DMG MORI CO., LTD.
    Inventors: Kazuo Yamazaki, David Carter, Makoto Fujishima, Yohei Oda
  • Publication number: 20200411577
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Application
    Filed: September 16, 2020
    Publication date: December 31, 2020
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20200389638
    Abstract: A photoelectric conversion apparatus includes a control unit configured to change a voltage of an input node from a first voltage toward a predetermined voltage during a predetermined time period after the voltage of the input node changes to the first voltage and before the voltage of the input node changes to a second voltage. A method of driving the photoelectric conversion apparatus includes controlling changing of the voltage of the input node from the first voltage toward the predetermined voltage during the predetermined time period.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 10, 2020
    Inventors: Hiroaki Kameyama, Seiichirou Sakai, Kazuo Yamazaki
  • Patent number: 10834354
    Abstract: An imaging device includes: a plurality of pixels arranged to form rows and columns and each configured to output a signal in accordance with an incident light, a plurality of column signal processing units provided in association with the columns and each having an A/D conversion unit that performs A/D conversion on a signal output from the pixels arranged on a corresponding column, a plurality of memory units provided in association with the columns and each having a memory that holds digital data output from the column signal processing unit of a corresponding column, a transfer unit that sequentially outputs the digital data held in each of the plurality of memory units to a common output line, and a bit value inversion unit that inverts a value of a bit of one of first and second digital data sequentially output to the common output line.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: November 10, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Daisuke Kobayashi, Yoshikazu Yamazaki, Kazuo Yamazaki, Wataru Endo