Patents by Inventor Kazuo Yamazaki

Kazuo Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10504831
    Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: December 10, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Kazuo Yamazaki, Hiroki Hiyama
  • Patent number: 10403658
    Abstract: An image sensing device includes pixels forming rows and columns, sets of control lines respectively assigned to the rows such that one set of control lines is connected to one of the rows, a row drive circuit configured to drive the sets of control lines, and an assist circuit. Each set includes a first control line and a second control line. The row drive circuit includes a first drive circuit connected to a first end of the first control line and a second drive circuit connected to first end of the second control line. The assist circuit includes an assist drive circuit connected to a second end of the first control line so as to drive the first control line in accordance with a control signal supplied to the second control line.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: September 3, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiaki Takada, Kazuo Yamazaki
  • Patent number: 10323303
    Abstract: An electrode material is composed of at least 0.2 mass % and at most 1.0 mass % of Y, at least 0 mass % and at most 0.2 mass % of Al, at least 0.2 mass % and at most 1.6 mass % of Si, at least 0.05 mass % and at most 1.0 mass % of Cr, at least 0.05 mass % and at most 0.5 mass % of Ti, at least 0.1 mass % and at most 0.5 mass in total of one or more elements selected from among Yb, Sb, Ir, Zr, Hf, Pt, Re, Pd, Rh, Ru, Nb, V, W, Mo, and Ta, and a remainder composed of Ni and an inevitable impurity.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: June 18, 2019
    Assignees: Sumitomo Electric Industries, Ltd., DENSO CORPORATION
    Inventors: Hajime Ota, Kazuo Yamazaki, Naoki Sugihara, Nobuo Abe
  • Patent number: 10274927
    Abstract: A machine tool includes a bed supported on a ground by supporting jigs, a table movable in an X-axis direction, a spindle head movable in a Y-axis direction, a quill provided to be movable in a Z-axis direction, a spindle supported by the quill to be rotatable about its axis, feed mechanisms for moving the table and the like in the axis directions, and a numerical controller controlling operation of the feed mechanisms, and the numerical controller is configured to calculate motion errors based on load values acting on the supporting jigs by a motion locus estimator, an influence coefficient storage, a motion error calculator, and a motion locus storage, generate a correction signal for compensating for the motion errors by a position corrector, and add the generated correction signals to a position control signal transmitted from a position generator to a position controller.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: April 30, 2019
    Assignee: DMG MORI CO., LTD.
    Inventors: Hidenori Saraie, Kinji Hashimoto, Keiichiro Matsuo, Kazuo Yamazaki, Toshiya Sato
  • Patent number: 10263034
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: April 16, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190096931
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190028663
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Application
    Filed: September 20, 2018
    Publication date: January 24, 2019
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20190017152
    Abstract: There is provided a wire for a reed switch used for a material of a reed piece comprised by a reed switch, the wire being composed of an iron-group alloy containing Fe and 0 mass % or more and less than 10 mass % of Ni, with a total content of the Fe and the Ni satisfying 10 mass % or more and less than 20 mass %, with a balance of Co and an impurity, the iron-group alloy having a cubic crystal structure, the wire having a Curie temperature of 900° C. or higher and a specific resistance of 15 ??·cm or less at normal temperature, a ratio of a thermal expansion coefficient of a glass tube comprised by the reed switch to a thermal expansion coefficient of the wire for the reed switch being 90% or more, the wire having a diameter of 1 mm or less.
    Type: Application
    Filed: June 24, 2016
    Publication date: January 17, 2019
    Applicants: Sumitomo Electric Industries, Ltd., STANDEX ELECTRONICS JAPAN CORPORATION
    Inventors: Hajime OTA, Tetsuya KUWABARA, Kazuo YAMAZAKI, Naoki SUGIHARA, Norimasa KAWANO, Hiroyasu TORAZAWA
  • Publication number: 20180363102
    Abstract: An electrode material is composed of at least 0.2 mass % and at most 1.0 mass % of Y, at least 0 mass % and at most 0.2 mass % of Al, at least 0.2 mass % and at most 1.6 mass % of Si, at least 0.05 mass % and at most 1.0 mass % of Cr, at least 0.05 mass % and at most 0.5 mass % of Ti, at least 0.1 mass % and at most 0.5 mass in total of one or more elements selected from among Yb, Sb, Ir, Zr, Hf, Pt, Re, Pd, Rh, Ru, Nb, V, W, Mo, and Ta, and a remainder composed of Ni and an inevitable impurity.
    Type: Application
    Filed: October 31, 2016
    Publication date: December 20, 2018
    Applicants: Sumitomo Electric Industries, Ltd., DENSO CORPORATION
    Inventors: Hajime OTA, Kazuo YAMAZAKI, Naoki SUGIHARA, Nobuo ABE
  • Patent number: 10104320
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: October 16, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20180277578
    Abstract: An image sensing device includes pixels forming rows and columns, sets of control lines respectively assigned to the rows such that one set of control lines is connected to one of the rows, a row drive circuit configured to drive the sets of control lines, and an assist circuit. Each set includes a first control line and a second control line. The row drive circuit includes a first drive circuit connected to a first end of the first control line and a second drive circuit connected to first end of the second control line. The assist circuit includes an assist drive circuit connected to a second end of the first control line so as to drive the first control line in accordance with a control signal supplied to the second control line.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 27, 2018
    Inventors: Yoshiaki Takada, Kazuo Yamazaki
  • Patent number: 10044964
    Abstract: First processing of causing a hold unit to hold a first signal from an amplification unit based on reset of the amplification unit, second processing of performing AD conversion of the held first signal and outputting a second signal obtained by superposing a signal based on charges generated in a photoelectric conversion unit of a first-row pixel on the first signal, third processing of performing an operation of performing AD conversion of the held second signal and an operation of resetting the amplification unit at least partly in parallel, and fourth processing of causing the hold unit to hold a fourth signal obtained by superposing a signal based on charges generated in the photoelectric conversion unit of a second-row pixel on a third signal from the amplification unit based on resetting of the amplification unit and is output from the amplification unit are performed.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: August 7, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Kohichi Nakamura, Koichiro Iwata
  • Patent number: 10029318
    Abstract: A milling cutter is composed of a tool body having an approximately cylindrical or disk-like shape and a plurality of edge portions provided on at least an outer peripheral portion of one end of the tool body at predetermined intervals along a circumferential direction. The edge portion has a major cutting edge and a minor cutting edge that perform an operation of cutting a workpiece, the major cutting edge is positioned outside the minor cutting edge in a radial direction, and the minor cutting edge has a cutting edge angle that is an angle with respect to a plane orthogonal to a center axis of the tool body and set so as to be an elevation angle open outward in the radial direction. When surface machining is performed on a workpiece with the milling cutter, a high degree of machined surface accuracy equivalent to that obtained by grinding is obtained.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: July 24, 2018
    Assignees: DMG MORI CO., LTD., Intelligent Manufacturing Systems International, Advanced Research for Manufacturing Systems, LLC
    Inventors: Hidenori Saraie, Eisaku Ueda, Masaya Nishimoto, Kazuo Yamazaki, Masakazu Soshi
  • Publication number: 20180197814
    Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.
    Type: Application
    Filed: March 9, 2018
    Publication date: July 12, 2018
    Inventors: Hideo Kobayashi, Kazuo Yamazaki, Hiroki Hiyama
  • Patent number: 10021333
    Abstract: An image sensor comprises a pixel portion formed by arraying pixels including photoelectric conversion portions in a matrix, a plurality of A/D converters which are provided in a one-to-one correspondence to pixel columns of the pixel portion, an adding unit which adds pixel signals from a plurality of pixel columns to each other, and a connecting portion capable of inputting, to an arbitrary A/D converter, a sum signal obtained by adding the pixel signals by the adding unit.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: July 10, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusaku Motonaga, Kazuo Yamazaki, Tetsuya Itano
  • Patent number: 9961282
    Abstract: For each of the signal corresponding to a signal of a photoelectric converting unit being only a part of an effective pixel and the signal corresponding to a signal obtained by adding signals of a plurality of photoelectric converting units, the difference corresponding to the signal corresponding to the signal obtained by adding the signals of the plurality of photoelectric converting units of a light-shielded pixel.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: May 1, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Kazuo Yamazaki
  • Publication number: 20180114808
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: December 21, 2017
    Publication date: April 26, 2018
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9947615
    Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: April 17, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Kazuo Yamazaki, Hiroki Hiyama
  • Patent number: 9912866
    Abstract: An image pickup apparatus includes a pixel array including a plurality of pixels arranged in a plurality of rows and a plurality of columns, and a plurality of column signal processing circuits provided respectively for the columns of the pixel array, each being configured to receive output signals from the pixels and an analog signal varying with time. The plurality of column signal processing circuits include a first column signal processing circuit and a second column signal processing circuit configured such that each of the first column signal processing circuit and the second column signal processing circuit is configured to be independently switched between a driving state and a power saving state. A signal line for supplying the analog signal to the first column signal processing circuit and a signal line for supplying the analog signal to the second column signal processing circuit are electrically isolated from each other.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: March 6, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Seiichirou Sakai, Yasuhiro Oguro
  • Patent number: 9906750
    Abstract: A photoelectric convertor of a pixel is reset in a second row, which is different from a first row, among plural rows during a period in which the pixel in the first row among the plural rows is being selected as a pixel to output an optical signal. The reset of the photoelectric convertor of the pixel in the second row is canceled in a period other than a period in which an A/D converting unit converts the optical signal of the pixel in the first row into a digital signal.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: February 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kei Ochiai, Hideo Kobayashi, Kazuo Yamazaki, Yasuhiro Oguro, Masaki Sato, Mineo Uchida