Patents by Inventor Kazuo Yamazaki

Kazuo Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10811451
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: October 20, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20200314360
    Abstract: According to the present disclosure, column circuits operate selectively in a first drive mode to output a comparison signal or a second drive mode to acquire a correction value of a first reference signal and a second reference signal, and a selector circuit of a second column circuit selects the same reference signal out of the first reference signal and the second reference signal in the first drive mode and the second drive mode.
    Type: Application
    Filed: March 23, 2020
    Publication date: October 1, 2020
    Inventors: Seiichirou Sakai, Hiroaki Kameyama, Kazuo Yamazaki, Koichiro Iwata, Kohichi Nakamura
  • Patent number: 10731235
    Abstract: There is provided a wire for a reed switch used for a material of a reed piece comprised by a reed switch, the wire being composed of an iron-group alloy containing Fe and 0 mass % or more and less than 10 mass % of Ni, with a total content of the Fe and the Ni satisfying 10 mass % or more and less than 20 mass %, with a balance of Co and an impurity, the iron-group alloy having a cubic crystal structure, the wire having a Curie temperature of 900° C. or higher and a specific resistance of 15 ??·cm or less at normal temperature, a ratio of a thermal expansion coefficient of a glass tube comprised by the reed switch to a thermal expansion coefficient of the wire for the reed switch being 90% or more, the wire having a diameter of 1 mm or less.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: August 4, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hajime Ota, Tetsuya Kuwabara, Kazuo Yamazaki, Naoki Sugihara, Norimasa Kawano, Hiroyasu Torazawa
  • Publication number: 20200243584
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20200185446
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20200186738
    Abstract: A photoelectric conversion device includes a pixel that outputs a pixel signal in accordance with an incident light, a plurality of signal holding units each configured to hold the pixel signal, an AD conversion unit that converts the pixel signal from analog signal to digital signal, a first switch circuit provided between the pixel and the plurality of signal holding units, and a second switch circuit provided between the plurality of signal holding units and the AD conversion unit. The first switch circuit is configured to connect the pixels to the plurality of signal holding units individually to hold one pixel signal in the plurality of signal holding units, respectively, in different sampling periods, the second switch circuit is configured to switch connection between the plurality of signal holding units and the AD conversion unit, and pixel signals held in the plurality of signal holding units are averaged and output.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 11, 2020
    Inventors: Hideaki Takada, Kazuo Yamazaki
  • Patent number: 10651231
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: May 12, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20200127035
    Abstract: A semiconductor device has a first transistor of a first conductivity type and a second transistor of a second conductivity type, the first transistor is arranged in an active region of a semiconductor substrate, and a gate electrode and the active region overlap with each other in a plan view and also have a portion located between the source and the drain of the first transistor of the semiconductor substrate. In the channel width direction, an impurity concentration of the second conductivity type is higher at the end than on the center side of the portion.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 23, 2020
    Inventors: Akira Oseto, Tatsunori Kato, Ryunosuke Ishii, Takanori Watanabe, Atsushi Suzuki, Koichiro Iwata, Kazuo Yamazaki, Hideaki Takada, Akira Ohtani
  • Patent number: 10608034
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: March 31, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20200084397
    Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 12, 2020
    Inventors: Kazuo Yamazaki, Shinichiro Shimizu, Yasuhiro Oguro, Yu Arishima, Hideaki Takada
  • Publication number: 20190394416
    Abstract: An imaging device includes: a plurality of pixels arranged to form rows and columns and each configured to output a signal in accordance with an incident light, a plurality of column signal processing units provided in association with the columns and each having an A/D conversion unit that performs A/D conversion on a signal output from the pixels arranged on a corresponding column, a plurality of memory units provided in association with the columns and each having a memory that holds digital data output from the column signal processing unit of a corresponding column, a transfer unit that sequentially outputs the digital data held in each of the plurality of memory units to a common output line, and a bit value inversion unit that inverts a value of a bit of one of first and second digital data sequentially output to the common output line.
    Type: Application
    Filed: June 17, 2019
    Publication date: December 26, 2019
    Inventors: Daisuke Kobayashi, Yoshikazu Yamazaki, Kazuo Yamazaki, Wataru Endo
  • Patent number: 10504831
    Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: December 10, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Kazuo Yamazaki, Hiroki Hiyama
  • Patent number: 10403658
    Abstract: An image sensing device includes pixels forming rows and columns, sets of control lines respectively assigned to the rows such that one set of control lines is connected to one of the rows, a row drive circuit configured to drive the sets of control lines, and an assist circuit. Each set includes a first control line and a second control line. The row drive circuit includes a first drive circuit connected to a first end of the first control line and a second drive circuit connected to first end of the second control line. The assist circuit includes an assist drive circuit connected to a second end of the first control line so as to drive the first control line in accordance with a control signal supplied to the second control line.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: September 3, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiaki Takada, Kazuo Yamazaki
  • Patent number: 10323303
    Abstract: An electrode material is composed of at least 0.2 mass % and at most 1.0 mass % of Y, at least 0 mass % and at most 0.2 mass % of Al, at least 0.2 mass % and at most 1.6 mass % of Si, at least 0.05 mass % and at most 1.0 mass % of Cr, at least 0.05 mass % and at most 0.5 mass % of Ti, at least 0.1 mass % and at most 0.5 mass in total of one or more elements selected from among Yb, Sb, Ir, Zr, Hf, Pt, Re, Pd, Rh, Ru, Nb, V, W, Mo, and Ta, and a remainder composed of Ni and an inevitable impurity.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: June 18, 2019
    Assignees: Sumitomo Electric Industries, Ltd., DENSO CORPORATION
    Inventors: Hajime Ota, Kazuo Yamazaki, Naoki Sugihara, Nobuo Abe
  • Patent number: 10274927
    Abstract: A machine tool includes a bed supported on a ground by supporting jigs, a table movable in an X-axis direction, a spindle head movable in a Y-axis direction, a quill provided to be movable in a Z-axis direction, a spindle supported by the quill to be rotatable about its axis, feed mechanisms for moving the table and the like in the axis directions, and a numerical controller controlling operation of the feed mechanisms, and the numerical controller is configured to calculate motion errors based on load values acting on the supporting jigs by a motion locus estimator, an influence coefficient storage, a motion error calculator, and a motion locus storage, generate a correction signal for compensating for the motion errors by a position corrector, and add the generated correction signals to a position control signal transmitted from a position generator to a position controller.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: April 30, 2019
    Assignee: DMG MORI CO., LTD.
    Inventors: Hidenori Saraie, Kinji Hashimoto, Keiichiro Matsuo, Kazuo Yamazaki, Toshiya Sato
  • Patent number: 10263034
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: April 16, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190096931
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190028663
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Application
    Filed: September 20, 2018
    Publication date: January 24, 2019
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20190017152
    Abstract: There is provided a wire for a reed switch used for a material of a reed piece comprised by a reed switch, the wire being composed of an iron-group alloy containing Fe and 0 mass % or more and less than 10 mass % of Ni, with a total content of the Fe and the Ni satisfying 10 mass % or more and less than 20 mass %, with a balance of Co and an impurity, the iron-group alloy having a cubic crystal structure, the wire having a Curie temperature of 900° C. or higher and a specific resistance of 15 ??·cm or less at normal temperature, a ratio of a thermal expansion coefficient of a glass tube comprised by the reed switch to a thermal expansion coefficient of the wire for the reed switch being 90% or more, the wire having a diameter of 1 mm or less.
    Type: Application
    Filed: June 24, 2016
    Publication date: January 17, 2019
    Applicants: Sumitomo Electric Industries, Ltd., STANDEX ELECTRONICS JAPAN CORPORATION
    Inventors: Hajime OTA, Tetsuya KUWABARA, Kazuo YAMAZAKI, Naoki SUGIHARA, Norimasa KAWANO, Hiroyasu TORAZAWA
  • Publication number: 20180363102
    Abstract: An electrode material is composed of at least 0.2 mass % and at most 1.0 mass % of Y, at least 0 mass % and at most 0.2 mass % of Al, at least 0.2 mass % and at most 1.6 mass % of Si, at least 0.05 mass % and at most 1.0 mass % of Cr, at least 0.05 mass % and at most 0.5 mass % of Ti, at least 0.1 mass % and at most 0.5 mass in total of one or more elements selected from among Yb, Sb, Ir, Zr, Hf, Pt, Re, Pd, Rh, Ru, Nb, V, W, Mo, and Ta, and a remainder composed of Ni and an inevitable impurity.
    Type: Application
    Filed: October 31, 2016
    Publication date: December 20, 2018
    Applicants: Sumitomo Electric Industries, Ltd., DENSO CORPORATION
    Inventors: Hajime OTA, Kazuo YAMAZAKI, Naoki SUGIHARA, Nobuo ABE