Abstract: According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.

Abstract: A sheet conveying device to convey a sheet in a sheet path is provided. The sheet conveying device includes a separator roller, which is arranged to be rotatably in contact with the sheet to apply conveying force to the sheet, a pad assembly including a separator pad, which is arranged to be in contact with the sheet stack to apply convey resistance to the sheet stack, and a holder, which is swingably attached to a base member and holds the separator pad, the base member being in a fixed position with respect to the separator roller, a spring, which urges the pad assembly toward the separator roller, and a slidable member, which is attached to the pad assembly to be integrally movable with the pad assembly and to be slidably in contact with a first slidable section in the base member.

Abstract: According to one embodiment, a power semiconductor device includes first and second electrodes, first, second, third, and fourth semiconductor layers, a first control electrode, and a first insulating film. The first semiconductor layer is provided on the first electrode. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the first semiconductor layer to be separated from the second semiconductor layer. The fourth semiconductor layer is provided on the third semiconductor layer. The second electrode is provided on the fourth semiconductor layer. The first control electrode is provided between the second and third semiconductor layers to be shifted toward the third semiconductor layer. The first insulating film is provided between the first semiconductor layer and the first control electrode, between the second semiconductor layer and the first control electrode, and between the third semiconductor layer and the first control electrode.

Abstract: In general, according to one embodiment, a power semiconductor device includes a first, a second, a third, a fourth, and a fifth electrode, and a first, a second, a third, and a fourth semiconductor layer. The first electrode includes a first and a second face. The first semiconductor layer is provided on a side of the first face of the first electrode. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The fourth semiconductor layer is provided on the third semiconductor layer. The second electrode is electrically connected to the fourth semiconductor layer. The third and fourth electrode are provided at the second semiconductor layer and the third semiconductor layer with an insulating film interposed. The fifth electrode is provided between the third electrode and the fourth electrode with an insulating film interposed.

Abstract: According to one embodiment, an IGBT region includes: a collector layer of a first conductivity type, a drift layer of a second conductivity type, a body layer of the first conductivity type, and a second electrode extending to the drift layer and the body layer via a first insulating film in a stacking direction of a first electrode and the collector layer. A diode region includes: a cathode layer of the second conductivity type, the drift layer, an anode layer of the first conductivity type, and a conductive layer extending to the drift layer and the anode layer via a second insulating film in the stacking direction. The second electrode and the conductive layer are separated from one another at a predetermined distance.

Abstract: A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having first and second main surfaces, control electrodes disposed in trenches on the first main surface of the semiconductor substrate and extending in a first direction parallel to the first main surface, and control interconnects disposed on the first main surface of the semiconductor substrate and extending in a second direction perpendicular to the first direction. The semiconductor substrate includes a first semiconductor layer of a first conductivity type, second semiconductor layers of a second conductivity type on a surface of the first semiconductor layer on a first main surface side, third semiconductor layers of the first conductivity type disposed on surfaces of the second semiconductor layers on the first main surface side and extending in the second direction, and a fourth semiconductor layer of the second conductivity type on the second main surface of the semiconductor substrate.

Abstract: An upper part of the termination region of the semiconductor substrate, an upper surface of the first diffusion layers and an upper surface of the first oxide film is etched in such a manner that the level of the upper surface of the semiconductor substrate in the termination region including the first oxide film and the first diffusion layers is lower than the level of the upper surface of the semiconductor substrate in the cell region. Then, a second oxide film is formed on the semiconductor substrate. An electrode is formed on the second oxide film so as to extend from the first region toward the cell region to the first diffusion layers in such a manner that the level of an upper surface of the electrode is lower than the level of the upper surface of the semiconductor substrate in the cell region.

Abstract: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a pair of conductive bodies, a third semiconductor layer of the second conductivity type, and a fourth semiconductor layer of the first conductivity type. The second semiconductor layer is provided on the first semiconductor layer on the first surface side. The pair of conductive bodies are provided via an insulating film in a pair of first trenches extending across the second semiconductor layer from a surface of the second semiconductor layer to the first semiconductor layer. The third semiconductor layer is selectively formed on the surface of the second semiconductor layer between the pair of conductive bodies and has a higher second conductivity type impurity concentration in a surface of the third semiconductor layer than the second semiconductor layer.

Abstract: According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.

Abstract: An image forming apparatus including an image forming unit, a discharger, and a presser including a swingable member and a contact member is provided. The contact member is partially attached to the swingable member in a condition to create clearance between an unattached part and the swingable member. Weights of the contact member and the swingable member affect the sheet when the recording medium contacts the contact member and the contact member is moved to swing upward along with the swingable member by the recording medium. Resilient force is provided by the contact member to affect the recording medium when the recording medium contacts the contact member and the contact member is moved in a direction to narrow the clearance.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A sheet feeding device including a roller to apply conveying force to one of a plurality of stacked sheets, a separator piece to apply conveying resistance to the stacked sheets and to nip the one of the stacked sheets in cooperation with the roller, a movable member being movable with respect to the roller, a pair of spring arms configured to contact the stacked sheets at an upstream position along a conveying direction with respect to a nipping position between the roller and the separator piece, and a bridge to bridge between the pair of spring arms, is provided. The bridge and the movable member are slidably in contact with each other at least when the sheet feeding device is in a conveyable condition.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate of a first conductivity type, an element isolation insulator, a source layer of a second conductivity type, a drain layer of the second conductivity type, a contact layer of the first conductivity type and a gate electrode. The element isolation insulator is formed on the semiconductor substrate. The source layer is formed on the semiconductor substrate and is in contact with a side surface of the element isolation insulator. The drain layer is formed on the semiconductor substrate, is in contact with the side surface, and is spaced from the source layer. The contact layer is formed between the source layer and the drain layer. The gate electrode is provided on the element isolation insulator along the side surface.

Abstract: A semiconductor device comprises: a substrate having a first and second surface; trenches provided on the second surface; a gate electrode provided in each trench; a first-conductive-type emitter layer provided on the second surface and contacting with the trenches; and an emitter electrode provided on the second surface to extend in a longitudinal direction of the trenches, the emitter electrode having a non-contact portion partially provided in the first-conductive-type emitter layer.

Abstract: An image forming apparatus including an image forming unit, a discharger, and a presser including a swingable member and a contact member is provided. The contact member is partially attached to the swingable member in a condition to create clearance between an unattached part and the swingable member. Weights of the contact member and the swingable member affect the sheet when the recording medium contacts the contact member and the contact member is moved to swing upward along with the swingable member by the recording medium. Resilient force is provided by the contact member to affect the recording medium when the recording medium contacts the contact member and the contact member is moved in a direction to narrow the clearance.

Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.

Abstract: A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.