Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.

Abstract: The present invention comprises the steps of forming a bump metal film as a pattern having an opening portion on an area of a seed metal film that corresponds to a connecting pad of a semiconductor substrate, forming a through hole by etching the seed metal film, the connecting pad, and the semiconductor substrate located under the opening portion of the bump metal film while using the bump metal film as a mask, grinding a back surface of the semiconductor substrate, forming an insulating film on a side surface of the through hole, forming a through wiring in the through hole by an electroplating, and forming a metal bump by etching the seed metal film.

Abstract: There are provided the steps of forming a wiring pattern in an area except packaging area on a mounted body, the package area in which electronic parts is mounted, mounting the electronic parts in the packaging area of the mounted body to direct a surface of the electronic parts, of which a connection terminal is formed, upward, and forming an insulating film which covers the electronic parts and the wiring pattern.

Abstract: There are included a wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.

Abstract: An inspection apparatus for semiconductor devices, comprising: a light irradiation means for irradiating light to a surface of a semiconductor device, the surface having external connection terminals formed thereon; an image pickup means for picking up a plane image of the surface of the semiconductor device by using an optical system to provide an image data; an inspection means for inspecting misalignment of tips of the external connection terminals based on the image data; the external connection terminals standing on, and being bonded to, electrode pads of the semiconductor device and being bent to crank shapes having respective middle portions laterally extending out of positions of the electrode pads; and the irradiation means irradiating light from a side opposite to the laterally extending middle portions of the external connection terminals with respect to the electrode pads.

Abstract: A semiconductor device comprises a substantially flat interconnection substrate having an interconnection pattern formed on a surface thereof. A semiconductor element is mounted on the substantially flat interconnection substrate so that an electrode terminal of the semiconductor element is electrically connected to the interconnection pattern. A heat radiation plate is formed in a form of a sheet having a concave portion so as to cover the semiconductor element and is bonded on the surface of the substantially flat interconnection substrate. An external connection terminal is formed on the other surface of the substantially flat interconnection substrate so as to penetrate through the substantially flat interconnection substrate and be electrically connected to the interconnection pattern. The heat radiation plate is formed of a heat-resistant resin containing carbon fibers.

Abstract: A semiconductor package provided with an interconnection layer including an interconnection pattern and pad formed on an insulating substrate or insulating layer, a protective layer covering the interconnection layer except at the portion of the pad and the insulating substrate or insulating layer, and an external connection terminal bonded with the pad exposed from the protective layer, the pad to which the external connection terminal is bonded being comprised of a plurality of pad segments, sufficient space being opened for passing an interconnection between pad segments, and the pad segments being comprised of at least one pad segment connected to an interconnection and other pad segments not connected to interconnections.

Abstract: A semiconductor chip mounting apparatus able to raise the positional accuracy when mounting a semiconductor chip on a package including a stage on which the substrate is carried, a visible light source for directly illuminating the substrate from above the stage, a semiconductor chip conveying means for holding from one surface the semiconductor chip comprised of silicon formed to a thickness through which visible light can pass and conveying it on the substrate carried on the stage, a capturing means arranged at a position facing the stage and capturing visible light passing through the semiconductor chip held by the semiconductor chip conveying means so as to capture patterns formed on the substrate carried on the stage and the semiconductor chip, and a positioning means for positioning the semiconductor chip on the substrate based on the patterns of the substrate and the semiconductor chip captured by the capturing means.

Abstract: A heat radiation fin comprises a substrate having a high thermal conductivity and a plurality of heat radiation plates. The heat radiation plates are arranged upright on the substrate with predetermined intervals therebetween. Each of the heat radiation plates is formed of a heat-resistant resin containing carbon fibers.

Abstract: In a semiconductor device including an insulating core substrate, a plurality of layers of wiring patterns on the core substrate and insulating layers interposed between the wiring patterns, each adjacent pair of the wiring patterns being electrically connected through a conductor portion penetrating through the insulating layer interposed between them, each of the insulating layers is formed integrally, semiconductor chips thinner than one layer of the insulating layer are mounted into at least one of the insulating layers, and the semiconductor chips are electrically connected to one layer of the wiring pattern of one insulating layer adjacent on the side of the core substrate.

Abstract: A semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, and external connection terminals or other connection terminals bonded to the connection terminal pads, wherein the first and second electronic parts are disposed one upon the other with respective pad forming surfaces facing each other and are electrically connected to each other by flip-chip bonding; and springy wire form connection terminals stand on, and are bonded to, the connection terminal pads of the first electronic part other than those electrically connected to the connection terminal pads of the second electronic part.

Abstract: A semiconductor device thinner than the past and improved in reliability of electrical connection between semiconductor chips and an interconnection substrate including a polyimide film (insulating plastic film) formed with stud bump through holes, an interconnection pattern formed on one surface of the polyimide film and covering openings of the stud bump through holes at least at that one surface, a first semiconductor chip flip-chip bonded to the interconnection pattern, a second semiconductor chip flip-chip bonded to the other surface of the polyimide film so as to be electrically connected with the interconnection pattern through the stud bump through holes, and solder bumps (external connection terminals) and a method for production of the same by fewer steps than in the past.

Abstract: A semiconductor device thinner than the past and improved in reliability of electrical connection between semiconductor chips and an interconnection substrate including a polyimide film (insulating plastic film) formed with stud bump through holes, an interconnection pattern formed on one surface of the polyimide film and covering openings of the stud bump through holes at least at that one surface, a first semiconductor chip flip-chip bonded to the interconnection pattern, a second semiconductor chip flip-chip bonded to the other surface of the polyimide film so as to be electrically connected with the interconnection pattern through the stud bump through holes, and solder bumps (external connection terminals) and a method for production of the same by fewer steps than in the past.

Abstract: A method for measuring a height of a bump formed on a work of substrate, the method comprising: irradiating X-rays having a predetermined wavelength and an incident intensity toward a first work of substrate which is the same as the above-mentioned work of substrate, but no bump is formed thereon, and detecting a first X-ray transmitted intensity at a position on which the bump is to be formed; irradiating X-rays having the same wavelength and incident intensity toward a material constituting the bumps and detecting a linear absorption coefficient of the X-rays; memorizing the first X-ray transmitted intensity and the linear absorption coefficient as known data; and irradiating X-rays having the same wavelength and the same incident intensity toward a second work of substrate which is the same as the above-mentioned work of substrate, but bump is formed thereon, and detecting a second X-ray transmitted intensity at a position on which the bump is formed; and determining the height of the bump from the second

Abstract: A mounting structure for semiconductor devices wherein a plurality of semiconductor devices each comprised of a semiconductor chip carried on a substrate and provided with connection terminals formed in bump shapes on the substrate are stacked in multiple layers in the vertical direction and mounted on a mounting substrate by electrically connecting the adjoining semiconductor devices through the connection terminals, wherein the connection terminals of the adjoining semiconductor devices are arranged to overlap each other and the connection terminals of the adjoining semiconductor devices are arranged to be displaced from each other in planar arrangement, which thereby eases the stress acting on connection terminals when mounting semiconductor devices stacked on a mounting substrate and improves the reliability of connection between the semiconductor devices and mounting substrate.

Abstract: A semiconductor package provided with an interconnection layer including an interconnection pattern and pad formed on an insulating substrate or insulating layer, a protective layer covering the interconnection layer except at the portion of the pad and the insulating substrate or insulating layer, and an external connection terminal bonded with the pad exposed from the protective layer, the pad to which the external connection terminal is bonded being comprised of a plurality of pad segments, sufficient space being opened for passing an interconnection between pad segments, and the pad segments being comprised of at least one pad segment connected to an interconnection and other pad segments not connected to interconnections.

Abstract: A connection structure for a stacking semiconductor element capable of realizing a large capacity, a small size and thickness, and a high-speed response, is provided. Also, a semiconductor device formed by stacking the semiconductor elements is provided. In a semiconductor element having conductive bumps, a via-hole is formed to pass through the semiconductor element and reach the back surface of the conductive bump. On the inner surface of the via-hole, a conductive cover film (Au or Cu cover film) continuous to the conductive bump is formed via an insulation layer (SiO2 layer), wherein the conductive bump of one semiconductor element abuts to the via-hole of the other semiconductor element to establish a connection between the semiconductor elements.

Abstract: A mounting structure for semiconductor devices wherein a plurality of semiconductor devices each comprised of a semiconductor chip carried on a substrate and provided with connection terminals formed in bump shapes on the substrate are stacked in multiple layers in the vertical direction and mounted on a mounting substrate by electrically connecting the adjoining semiconductor devices through the connection terminals, wherein the connection terminals of the adjoining semiconductor devices are arranged to overlap each other and the connection terminals of the adjoining semiconductor devices are arranged to be displaced from each other in planar arrangement, which thereby eases the stress acting on connection terminals when mounting semiconductor devices stacked on a mounting substrate and improves the reliability of connection between the semiconductor devices and mounting substrate.

Abstract: A semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, and external connection terminals or other connection terminals bonded to the connection terminal pads, wherein the first and second electronic parts are disposed one upon the other with respective pad forming surfaces facing each other and are electrically connected to each other by flip-chip bonding; and springy wire form connection terminals stand on, and are bonded to, the connection terminal pads of the first electronic part other than those electrically connected to the connection terminal pads of the second electronic part.