Abstract: A semiconductor device comprises a substantially flat interconnection substrate having an interconnection pattern formed on a surface thereof. A semiconductor element is mounted on the substantially flat interconnection substrate so that an electrode terminal of the semiconductor element is electrically connected to the interconnection pattern. A heat radiation plate is formed in a form of a sheet having a concave portion so as to cover the semiconductor element and is bonded on the surface of the substantially flat interconnection substrate. An external connection terminal is formed on the other surface of the substantially flat interconnection substrate so as to penetrate through the substantially flat interconnection substrate and be electrically connected to the interconnection pattern. The heat radiation plate is formed of a heat-resistant resin containing carbon fibers.

Abstract: In a semiconductor device including an insulating core substrate, a plurality of layers of wiring patterns on the core substrate and insulating layers interposed between the wiring patterns, each adjacent pair of the wiring patterns being electrically connected through a conductor portion penetrating through the insulating layer interposed between them, each of the insulating layers is formed integrally, semiconductor chips thinner than one layer of the insulating layer are mounted into at least one of the insulating layers, and the semiconductor chips are electrically connected to one layer of the wiring pattern of one insulating layer adjacent on the side of the core substrate.

Abstract: There are provided the steps of forming a wiring pattern in an area except packaging area on a mounted body, the package area in which electronic parts is mounted, mounting the electronic parts in the packaging area of the mounted body to direct a surface of the electronic parts, of which a connection terminal is formed, upward, and forming an insulating film which covers the electronic parts and the wiring pattern.

Abstract: An inkjet printer which can be used for printing a resist pattern on a printed circuit board when wiring patterns are to be formed on the board. The inkjet printer has a liquid ejecting head which comprises: a liquid chamber filled with liquid and connected to a liquid storage tank; a capillary nozzle connected to the liquid chamber; a discharge unit for acting on the liquid filled in the liquid chamber to eject the liquid through an outlet of the capillary nozzle toward an object to be printed; and a negative pressure generating unit for applying a negative pressure in a direction in which the liquid is ejected from the outlet of the capillary nozzle. Due to the application of negative pressure, a liquid having a viscosity higher than that of a general ink can be ejected.

Abstract: In a semiconductor device including an insulating core substrate, a plurality of layers of wiring patterns on the core substrate and insulating layers interposed between the wiring patterns, each adjacent pair of the wiring patterns being electrically connected through a conductor portion penetrating through the insulating layer interposed between them, each of the insulating layers is formed integrally, semiconductor chips thinner than one layer of the insulating layer are mounted into at least one of the insulating layers, and the semiconductor chips are electrically connected to one layer of the wiring pattern of one insulating layer adjacent on the side of the core substrate.

Abstract: A semiconductor package provided with an interconnection layer including an interconnection pattern and pad formed on an insulating substrate or insulating layer, a protective layer covering the interconnection layer except at the portion of the pad and the insulating substrate or insulating layer, and an external connection terminal bonded with the pad exposed from the protective layer, the pad to which the external connection terminal is bonded being comprised of a plurality of pad segments, sufficient space being opened for passing an interconnection between pad segments, and the pad segments being comprised of at least one pad segment connected to an interconnection and other pad segments not connected to interconnections.

Abstract: A method for manufacturing a semiconductor package, the method including the steps of attaching a bottom surface of a semiconductor wafer to a first supporting member, forming a through hole in the semiconductor wafer, separating the semiconductor wafer from the first supporting member, forming an insulating layer on at least the bottom surface of the semiconductor wafer and the inner wall of the through hole, forming a conducting layer underneath the semiconductor wafer, the conducting layer spanning at least the bottom of the through hole; and forming a conductive member in the through hole and in electrical contact with the conducting layer.

Abstract: The present invention comprises the steps of forming a bump metal film as a pattern having an opening portion on an area of a seed metal film that corresponds to a connecting pad of a semiconductor substrate, forming a through hole by etching the seed metal film, the connecting pad, and the semiconductor substrate located under the opening portion of the bump metal film while using the bump metal film as a mask, grinding a back surface of the semiconductor substrate, forming an insulating film on a side surface of the through hole, forming a through wiring in the through hole by an electroplating, and forming a metal bump by etching the seed metal film.

Abstract: A method for thinning a wafer by placing a wafer having a protective tape attached to the front side thereof, on which chip circuits have been fabricated, on a working table in such a manner that the protective tape is intervened between the wafer and the working table, and grinding the back side of the wafer to thin it, the method comprising, prior to the thinning by grinding, adhering the beveled portion at the front side of the wafer to the protective tape. The adhesion is preferably effected by a material exhibiting a modulus of elasticity of 0.1 to 100 MPa at the state of the adhesion of the beveled portion to the protective tape. As the material for the adhesion, an acrylic resinous material of the UV-curing type can be used.

Abstract: An electroless plating method of the present invention includes the steps of preparing a substrate having an insulating body and a conductive pattern formed thereon, adhering a catalytic metal serving as a catalyst of an electroless plating onto the insulating body and the conductive pattern, forming selectively a protection film or an oxidizing agent used to oxidize the catalytic metal on the catalytic metal in a space portion between the conductive pattern, and forming selectively a metal layer on the conductive pattern by the electroless plating.

Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.

Abstract: A patterning apparatus of the present invention includes a stage on which a substrate is loaded, a coating means for coating a liquid that reacts with an ultraviolet ray to deposit metal on the substrate, and an ultraviolet irradiating means for irradiating the ultraviolet ray onto the liquid that is coated on the substrate.

Abstract: There are included a wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: A semiconductor package provided with an interconnection layer including an interconnection pattern and pad formed on an insulating substrate or insulating layer, a protective layer covering the interconnection layer except at the portion of the pad and the insulating substrate or insulating layer, and an external connection terminal bonded with the pad exposed from the protective layer, the pad to which the external connection terminal is bonded being comprised of a plurality of pad segments, sufficient space being opened for passing an interconnection between pad segments, and the pad segments being comprised of at least one pad segment connected to an interconnection and other pad segments not connected to interconnections.

Abstract: A method of production of a multilayer circuit board comprised of a multilayer structure circuit formed by a plurality of interconnect layers and insulation layers stacked together and a semiconductor chip included therein, including the steps of placing a semiconductor chip having a polished back surface, with its active surface facing downward, on an already formed lower interconnect layer and forming an insulation layer over the layer on which the semiconductor chip has been placed, the method further including the step of treating the polished back surface of the semiconductor chip to improve its bondability with the insulation layer before the step for formation of the insulation layer.

Abstract: A semiconductor device thinner than the past and improved in reliability of electrical connection between semiconductor chips and an interconnection substrate including a polyimide film (insulating plastic film) formed with stud bump through holes, an interconnection pattern formed on one surface of the polyimide film and covering openings of the stud bump through holes at least at that one surface, a first semiconductor chip flip-chip bonded to the interconnection pattern, a second semiconductor chip flip-chip bonded to the other surface of the polyimide film so as to be electrically connected with the interconnection pattern through the stud bump through holes, and solder bumps (external connection terminals) and a method for production of the same by fewer steps than in the past.

Abstract: An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.

Abstract: A semiconductor device includes a semiconductor chip, a substrate to which the semiconductor chip is connected, and an interposer provided between the semiconductor chip and the substrate so as to oppose a surface of the semiconductor chip on which a circuit is formed. The interposer connects the semiconductor chip and the substrate electrically, and is thermally connected to the semiconductor chip.

Abstract: A semiconductor device fabrication method is disclosed to reliably separate diced semiconductor chips from a dicing tape without damaging the diced semiconductor chip. The method includes the steps of: attaching a wafer on a dicing tape; dicing the wafer, thereby forming divided semiconductor chips; and separating the semiconductor chips from the dicing tape, wherein the step of separating includes the steps of: providing a hollow sheet having at least one aperture corresponding to the semiconductor chips between the semiconductor chips attached on the dicing tape and a porous plate coupled to a vacuum source; sucking the semiconductor chips to the porous plate via the hollow sheet by driving the vacuum source; and separating the dicing tape from the semiconductor chips under a condition where the semiconductor chips are being sucked to the porous plate.

Abstract: A semiconductor device comprises a substantially flat interconnection substrate having an interconnection pattern formed on a surface thereof. A semiconductor element is mounted on the substantially flat interconnection substrate so that an electrode terminal of the semiconductor element is electrically connected to the interconnection pattern. A heat radiation plate is formed in a form of a sheet having a concave portion so as to cover the semiconductor element and is bonded on the surface of the substantially flat interconnection substrate. An external connection terminal is formed on the other surface of the substantially flat interconnection substrate so as to penetrate through the substantially flat interconnection substrate and be electrically connected to the interconnection pattern. The heat radiation plate is formed of a heat-resistant resin containing carbon fibers.