Patents by Inventor Kei Murayama

Kei Murayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070181778
    Abstract: The optical device 10 includes a light source 13, a mirror element 12 including a mirror 36 for reflecting light emitted from the light source 13 in a predetermined direction, and a mirror element housing body 11 that accommodates the mirror element 12 as well as seals a space D where the mirror element 12 is accommodated, characterized in that the light source 13 is provided inside the mirror element housing body 11.
    Type: Application
    Filed: February 5, 2007
    Publication date: August 9, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Naoyuki Koizumi, Masahiro Sunohara, Akinori Shiraishi, Yuichi Taguchi, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20070177360
    Abstract: According to a sealed structure 60 constituted by anodically bonding a silicon board 20 and a glass plate 40, an upper opening of a recessed portion 22 is sealed in an airtight state by the glass plate 40 by bonding an upper face of a wall portion 26 to the glass plate 40. A voltage applying pattern 70 is formed to surround a light transmitting region to which an optical conversion element 24 is opposed. Further, the voltage applying pattern 70 functions as a cathode pattern applied with a voltage by being brought into contact with a lower face of the cathode plate 50.
    Type: Application
    Filed: January 18, 2007
    Publication date: August 2, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Hideaki Sakaguchi, Masahiro Sunohara, Yuichi Taguchi, Mitsutoshi Higashi
  • Publication number: 20070176197
    Abstract: A semiconductor device 10 has such a structure that a plurality of through electrodes 30 is formed on a substrate 20 and each of terminals of light emitting devices (LEDs) 40 is electrically connected to each of the through electrodes 30 via a bump 50 on a lower surface side. In the semiconductor device 10, moreover, a partition wall 80 for surrounding a mounting region of each of the light emitting devices 40 is formed on the substrate 20. The partition wall 80 is formed by laminating a metal film (Cu) using a thin film forming method such as a plating method. Furthermore, the partition wall 80 is formed to be opposed close to each of side surfaces of the light emitting devices 40 and is provided to surround each of the light emitting devices 40.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 2, 2007
    Inventors: Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Hideaki Sakaguchi, Masahiro Sunohara, Yuichi Taguchi, Mitsutoshi Higashi
  • Patent number: 7251391
    Abstract: An optical waveguide mounting member for mounting to a substrate is disclosed. The optical waveguide mounting member includes an optical waveguide for transmitting optical signals therethrough and an optical waveguide mounting base material having a through-hole to which the optical waveguide is mounted. The optical waveguide mounting base material is formed of silicon.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: July 31, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kei Murayama
  • Publication number: 20070173165
    Abstract: A method of producing a light emitting apparatus including a light emitting element, a light emitting element housing having a recess for housing the light emitting element, and a translucent substrate placed on the light emitting element housing is disclosed. The disclosed method includes a fluorescent-substance-containing resin forming step of forming a fluorescent-substance-containing resin on a first side of the translucent substrate which first side is opposite to a second side of the translucent substrate which second side faces the recess. In the fluorescent-substance-containing resin forming step, luminance and chromaticity of light that is emitted from the light emitting element and then transmitted by the fluorescent-substance-containing resin are measured and a thickness of the fluorescent-substance-containing resin is adjusted based on the measured luminance and chromaticity so that light emitted from the light emitting apparatus attains the specified luminance and chromaticity.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 26, 2007
    Inventors: Yuichi Taguchi, Masahiro Sunohara, Hideaki Sakaguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20070161211
    Abstract: A disclosed method for manufacturing a semiconductor device having a structure where a semiconductor element is mounted on a first substrate includes the steps of: bonding the first substrate on which the semiconductor element is mounted and a second substrate made of a material different from a material of the first substrate so as to encapsulate the semiconductor element; forming a first groove in the first substrate and a second groove in the second substrate; and cleaving a portion between the first groove and the second groove so as to individualize the semiconductor device.
    Type: Application
    Filed: December 19, 2006
    Publication date: July 12, 2007
    Inventors: Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20070161316
    Abstract: A method of manufacturing a light emitting apparatus including a light emitting device and a light emitting device installing body having a concave part for installing the light emitting device therein is disclosed. The method includes the steps of a) forming a coating of plural fluorophor particles covering the light emitting device installed in the concave part, and b) forming a transparent resin covering the plural fluorophor particle coating. Step b) includes a step of performing illumination with the light emitting device so that the light emitted from the light emitting apparatus has a predetermined luminance and chromaticity.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 12, 2007
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Masahiro Sunohara, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Publication number: 20070158674
    Abstract: A light emitting device is disclosed. The light emitting device includes a light emitting element (15), and a light emitting element container (11) having a concave section (20) for containing the light emitting element (15). The concave section (20) includes a side surface (20A) and a bottom surface (20B) almost orthogonal to the side surface (20A). The light emitting device further includes a conductive paste layer (17) formed of a conductive paste in which metal particles are dispersed in a solution, and the conductive paste layer (17) includes a slanting surface (17A) on the side surface (20A) and the bottom surface (20B).
    Type: Application
    Filed: December 27, 2006
    Publication date: July 12, 2007
    Inventors: Yuichi Taguchi, Hideaki Sakaguchi, Naoyuki Koizumi, Mitsutoshi Higashi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama
  • Publication number: 20070145400
    Abstract: There is provided a semiconductor device mounted with a light emitting element, which can be downsized easily, improve light emitting efficiency and be formed easily, and a method for manufacturing the semiconductor device effectively. The semiconductor device includes a substrate, a light emitting element mounted on the substrate by flip chip bonding, a sealing structure sealing the light emitting element and a phosphor film which is formed on an internal surface of the sealing structure. The sealing structure includes a blocking portion which is formed integrally with the substrate so as to surround the light emitting element on the substrate and functions as a reflector that reflects a light emitted from the light emitting element and a cover portion which is arranged on the top of the blocking portion and is bonded to the blocking portion.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventors: Masahiro Sunohara, Mitsutoshi Higashi, Yuichi Taguchi, Hideaki Sakaguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama
  • Publication number: 20070145404
    Abstract: A semiconductor device made by mounting a light emitting element on a substrate, where an optically-transparent cover with a flat plate shape is installed on the light emitting element and a groove part for suppressing reflection of light emission of the light emitting element is formed in the cover.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Naoyuki Koizumi, Hideaki Sakaguchi, Mitsutoshi Higashi, Yuichi Taguchi
  • Publication number: 20070114673
    Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.
    Type: Application
    Filed: January 19, 2007
    Publication date: May 24, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Masahiro Sunohara
  • Patent number: 7221816
    Abstract: A substrate for mounting an optical element having a light emission/reception part is disclosed. The substrate includes a base material and an optical waveguide penetrating through the base material. The optical waveguide is positioned opposite to the light emission/reception part. The base material is formed of silicon.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: May 22, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kei Murayama
  • Patent number: 7217888
    Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: May 15, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Naohiro Mashino, Mitsutoshi Higashi
  • Patent number: 7183647
    Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: February 27, 2007
    Assignee: Shinko Electric Industries, Co., Ltd.
    Inventors: Kei Murayama, Masahiro Sunohara
  • Publication number: 20070013048
    Abstract: An electronic parts packaging structure of the present invention includes a wiring substrate having a wiring pattern, a first insulating film which is formed on the wiring substrate and which has an opening portion in a packaging area where an electronic parts is mounted, the electronic parts having a connection terminal flip-chip mounted on the wiring pattern exposed in the opening portion of the first insulating film, a second insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the first and second insulating films on the wiring pattern, and an upper wiring pattern formed on the second insulating film and connected to the wiring pattern through the via hole.
    Type: Application
    Filed: September 22, 2006
    Publication date: January 18, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Masahiro Sunohara, Kei Murayama, Toshinori Koyama, Kazutaka Kobayashi, Mitsutoshi Higashi
  • Publication number: 20070013064
    Abstract: External connection terminals 27 which are electrically connected to semiconductor chips 11-1, 11-2, 12-1, 12-2 and also protrude beyond the semiconductor chips 11-1, 11-2, 12-1, 12-2 are disposed on a substrate 13 of the side to which the plural semiconductor chips 11-1, 11-2, 12-1, 12-2 are connected.
    Type: Application
    Filed: July 12, 2006
    Publication date: January 18, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20070001312
    Abstract: A semiconductor chip includes a semiconductor substrate 11, a through via 12 provided in a through hole 17 that passes through the semiconductor substrate 11, insulating layers 21-1 to 21-3 laminated on the semiconductor substrate 11, a multi-layered wiring structure 14 having a first wiring pattern 22 and a second wiring pattern 23, and an external connection terminal 15 provided on an uppermost layer of the multi-layered wiring structure 14, wherein the through via 12 and the external connection terminal 15 are connected electrically by the second wiring pattern 23.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 4, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7134195
    Abstract: A method of production of a multilayer circuit board comprised of a multilayer structure circuit formed by a plurality of interconnect layers and insulation layers stacked together and a semiconductor chip included therein, including the steps of placing a semiconductor chip having a polished back surface, with its active surface facing downward, on an already formed lower interconnect layer and forming an insulation layer over the layer on which the semiconductor chip has been placed, the method further including the step of treating the polished back surface of the semiconductor chip to improve its bondability with the insulation layer before the step for formation of the insulation layer.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: November 14, 2006
    Assignee: Shinko Electric Indutries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7084006
    Abstract: There are provided the steps of forming a wiring pattern in an area except packaging area on a mounted body, the package area in which electronic parts is mounted, mounting the electronic parts in the packaging area of the mounted body to direct a surface of the electronic parts, of which a connection terminal is formed, upward, and forming an insulating film which covers the electronic parts and the wiring pattern.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: August 1, 2006
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7084009
    Abstract: A wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: August 1, 2006
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Naohiro Mashino, Mitsutoshi Higashi