Patents by Inventor Kei Murayama

Kei Murayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080123337
    Abstract: It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 29, 2008
    Inventors: Mitsutoshi Higashi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Akinori Shiraishi
  • Publication number: 20080116566
    Abstract: A method of manufacturing an electronic component includes the steps of: a) forming via holes penetrating through a first semiconductor substrate and a second semiconductor substrate which are bonded together by way of a connection layer; b) pattern-etching the second semiconductor substrate using the connection layer as an etch-stop layer to form trenches communicated with the via holes; and c) integrally forming first via plugs buried in the via holes and pattern wirings buried in the trenches through plating.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 22, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20080117607
    Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 22, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20080099535
    Abstract: A method for mounting an electronic component on a substrate includes: forming an Au bump (24) on a surface of an electrode (20) of a substrate (10); placing an Sn-based solder sheet (26) on the Au bump; subjecting the Sn-based solder sheet and the Au bump to reflow soldering, to thus form an Au—Sn eutectic alloy (28); smoothing the eutectic alloy; and bonding an electronic component (30) on a surface of the smoothed eutectic alloy.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 1, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kei Murayama
  • Publication number: 20080073768
    Abstract: An electronic component device of the present invention includes: a silicon package unit having a structure in which a through electrode provided to a silicon substrate while an electrode post connected to the through electrode is provided upright on an upper side of the silicon substrate; an electronic component mounted on the electrode post and having a connection terminal connected to the top end of the electrode post; and a cap package unit joined onto a periphery of the silicon package unit, and constructing a housing portion in which the electronic component is housed to be hermetically sealed.
    Type: Application
    Filed: August 20, 2007
    Publication date: March 27, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20080061424
    Abstract: A semiconductor apparatus comprising a silicon substrate; an device housing space including a concave portion formed in the silicon substrate and a hole perforating through the bottom surface of the concave portion; a plurality of laminated semiconductor devices provided in the device housing space; a first lid which lids the concave portion and a second lid which lids the hole, for sealing the semiconductor devices; and via plugs which are connected to the semiconductor devices, penetrating the bottom surface of the concave portion.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 13, 2008
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Yuichi Taguchi, Mitsutoshi Higashi
  • Publication number: 20080054486
    Abstract: A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 6, 2008
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Yuichi Taguchi, Naoyuki Koizumi, Mitsutoshi Higashi
  • Patent number: 7330037
    Abstract: In an electrical characteristic measuring probe of the present invention constructed by assembling a plurality of probe parts, each comprising a base portion, a plurality of terminal portions extended outward from one end of the base portion, wiring patterns extended from a plurality of terminal portions onto the base portion respectively, and contact portions connected to the wiring patterns respectively, a plurality of thin plate-like probe parts are aligned such that respective thin-plate surfaces are placed in parallel with each other and the contact portions are directed in the same direction, and a plurality of probe parts and spacers are fixed by fixing means in a state that the spacer is arranged between a plurality of probe parts respectively.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: February 12, 2008
    Assignee: Shinko Electric Industries Co., Ltd
    Inventors: Naoyuki Koizumi, Akinori Shiraishi, Kei Murayama
  • Publication number: 20080030139
    Abstract: A light-emitting device includes a light-emitting element 12 and a wiring substrate 11 having a substrate body 17 having a protruding portion 25 at a position where the light-emitting device 12 is disposed and wiring patterns 21 and 22 disposed on the substrate body 17 and electrically connected to the light-emitting element 12.
    Type: Application
    Filed: August 6, 2007
    Publication date: February 7, 2008
    Inventors: Akinori Shiraishi, Yuichi Taguchi, Kei Murayama, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20080029852
    Abstract: A semiconductor device includes a laminated substrate formed by laminating a plurality of semiconductor substrates, a concave part formed in the laminated substrate, and a semiconductor element mounted in the concave part. A method of manufacturing a semiconductor device includes a first step of forming a laminated substrate by laminating a plurality of semiconductor substrates, a second step of forming a concave part by etching the laminated substrate, and a third step of mounting a semiconductor element in the concave part.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 7, 2008
    Inventors: Kei Murayama, Yuichi Taguchi, Naoyuki Koizumi, Masahiro Sunohara, Akinori Shiraishi, Mitsutoshi Higashi
  • Publication number: 20080011508
    Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.
    Type: Application
    Filed: September 13, 2007
    Publication date: January 17, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD
    Inventors: Masahiro Sunohara, Kei Murayama, Hiroyuki Kato, Syoji Watanabe
  • Publication number: 20070290329
    Abstract: In a semiconductor device 100, a light emitting element 120 has been mounted on an upper plane of a semiconductor substrate 102. In an impurity diffusion region of the semiconductor substrate 102, a P conducting type of a layer 104, and an N layer 106 have been formed, while an N conducting type impurity is implanted to the P layer 104, and then the implanted impurity is diffused to constitute the N layer 106. A zener diode 108 made of a semiconductor device has been formed by the P layer 104 and the N layer 106.
    Type: Application
    Filed: June 15, 2007
    Publication date: December 20, 2007
    Inventors: Kei Murayama, Mitsutoshi Higashi, Naoyuki Koizumi, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara
  • Patent number: 7285862
    Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: October 23, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshinori Koyama
  • Patent number: 7285728
    Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: October 23, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Hiroyuki Kato, Syoji Watanabe
  • Patent number: 7279771
    Abstract: In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via conductors formed to pierce the insulating layers in the direction of thickness. A decoupling capacitor is electrically connected to a wiring layer used as a power supply line or a ground line in the vicinity of the wiring layer, and mounted such that, when a current is passed through the capacitor, the direction of the current is reversed to that of the current flowing through the relevant wiring layer.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: October 9, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshio Gomyo, Yukiharu Takeuchi
  • Publication number: 20070224731
    Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.
    Type: Application
    Filed: May 17, 2007
    Publication date: September 27, 2007
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshinori Koyama
  • Publication number: 20070222062
    Abstract: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward, forming a second resin film for covering the electronic parts, obtaining an insulation film by curing the first and second resin films by heat treatment, forming a via hole in a predetermined portion of the insulation film on the wiring pattern and the connection terminal, and forming an upper wiring pattern connected to the wiring pattern and the connection terminal through the via hole, on the insulation film.
    Type: Application
    Filed: May 17, 2007
    Publication date: September 27, 2007
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi, Toshinori Koyama
  • Publication number: 20070194712
    Abstract: In a semiconductor device 100, a light emitting device 102 is mounted on a substrate 101. A light reflection preventing film 130 for preventing a reflection of a light is formed on an upper surface of the light emitting device 102. Moreover, a plate-shaped cover 103 formed of a glass having a light transparency is disposed above the light emitting device 102, and a light reflection preventing film 140 for preventing a reflection of a light is also formed on an upper surface of the cover 103.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 23, 2007
    Inventors: Akinori Shiraishi, Yuichi Taguchi, Masahiro Sunohara, Hideaki Sakaguchi, Naoyuki Koizumi, Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20070187706
    Abstract: The invention provides a light-emitting device 10 including an light-emitting element 12 and a substrate 11 where the light-emitting element 12 is arranged, characterized in that a housing part 28 housing the light-emitting element 12 and having a shape that is tapered upward from the substrate 11 and a metal frame 15 surrounding the light-emitting element 12 and including the side face 28A of the housing part 28 made into an almost mirror-polished surface are provided on the substrate 11.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 16, 2007
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Mitsutoshi Higashi, Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Hideaki Sakaguchi
  • Publication number: 20070182307
    Abstract: A light emitting apparatus, includes: a light emitting device accommodating body, which has a recessed portion wherein a light emitting device is accommodated; a wiring pattern, which is provided for the light emitting device accommodating body 11 and is electrically connected to the light emitting device; a light transmitting substrate, which is mounted on the light emitting device accommodating body and completely closes the recessed portion; and a phosphor-containing, ultraviolet curing resin, which is so deposited that, opposite to the light emitting device accommodating body, the face of the light transmitting member is covered.
    Type: Application
    Filed: December 27, 2006
    Publication date: August 9, 2007
    Inventors: Yuichi Taguchi, Masahiro Sunohara, Hideaki Sakaguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Mitsutoshi Higashi