Patents by Inventor Kei Murayama

Kei Murayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9425892
    Abstract: The present disclosure relates to an information processing apparatus, an information processing method, and a program which are capable of swiftly starting wireless data communication between a pair of electronic devices. An information processing apparatus as one aspect of the present disclosure includes an information management unit for categorizing setting information that is obtained as a result of a connection setting process for performing wireless data communication between electronic devices as preferred information that is not deleted at a time of an initialization process or as non-preferred information that is deleted at a time of the initialization process, and managing the setting information. The present disclosure may be applied to electronic devices provided with a bluetooth interface.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: August 23, 2016
    Assignee: SONY CORPORATION
    Inventors: Kei Murayama, Masataka Hasegawa, Masahiro Shimizu, Satoru Osugi
  • Patent number: 9374889
    Abstract: An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: June 21, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Mitsuhiro Aizawa, Koji Hara
  • Publication number: 20150327397
    Abstract: A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, and a heat dissipation component arranged on the wiring substrate. The heat dissipation component includes a cavity that accommodates the semiconductor element and includes an inner surface opposing the wiring substrate. The semiconductor element is located between the inner surface of the cavity and the wiring substrate. A heat conductor is bonded to the semiconductor element and to the inner surface of the cavity. The heat conductor includes linear heat conductive matters arranged between the semiconductor element and the heat dissipation component. A first alloy layer bonded to the semiconductor element covers lower ends of the heat conductive matters. The heat dissipation component includes a through hole extending through the heat dissipation component toward the heat conductor from a location outside of the heat conductor in a plan view.
    Type: Application
    Filed: April 23, 2015
    Publication date: November 12, 2015
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Kei Murayama, Yoshihiro Ihara
  • Patent number: 9179568
    Abstract: An electronic device includes: a housing having a concave portion in the first surface of the housing; a lid made of a semiconductor material containing an impurity material; a first metal film formed in a metal film formation region on the first surface of the housing, wherein the metal film formation region is defined as a region surrounding the concave portion on the first surface of the housing; a second metal film formed on the first surface of the lid to overlap with the metal film formation region in a top view of the electronic device; a third metal film formed on the second surface of the lid to overlap with the metal film formation region in the top view; and an electronic component disposed in the concave portion. The lid is bonded onto the housing via the first and second metal films to cover the electronic component.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: November 3, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kei Murayama
  • Publication number: 20150304022
    Abstract: The present disclosure relates to an information processing apparatus, an information processing method, and a program which are capable of swiftly starting wireless data communication between a pair of electronic devices. An information processing apparatus as one aspect of the present disclosure includes an information management unit for categorizing setting information that is obtained as a result of a connection setting process for performing wireless data communication between electronic devices as preferred information that is not deleted at a time of an initialization process or as non-preferred information that is deleted at a time of the initialization process, and managing the setting information. The present disclosure may be applied to electronic devices provided with a bluetooth interface.
    Type: Application
    Filed: October 7, 2013
    Publication date: October 22, 2015
    Inventors: Kei Murayama, Masataka Hasegawa, Masahiro Shimizu, Satoru Osugi
  • Patent number: 9129884
    Abstract: A semiconductor device is provided with a wiring substrate including a connection pad, a joining member joined with the connection pad, and a semiconductor chip including a connection terminal electrically connected to the connection pad via the joining member. The joining member consists of a first intermetallic compound layer formed at a boundary between the connection pad and the joining member, a second intermetallic compound layer formed at a boundary between the connection terminal and the joining member, a third intermetallic compound layer composed of an intermetallic compound of Cu6Sn5 or (Cu,Ni)6Sn5 and formed between the first intermetallic compound layer and the second intermetallic compound layer, and discrete metal grains, each being composed of a simple substance of Bi, in the third intermetallic compound layer. Surfaces of each of the metal grains are completely covered by the third intermetallic compound layer so that the metal grains do not form a layer.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: September 8, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kei Murayama
  • Patent number: 9112421
    Abstract: A converter circuit includes a transformer having primary windings and at least one secondary winding, a rectifier circuit connected to the secondary winding, and oscillating circuits connected to the primary windings. Each of the oscillating circuits has a switch element unit having no body diode.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: August 18, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kei Murayama, Satoru Inakagata
  • Patent number: 9105989
    Abstract: A connection structure includes a column electrode; a first connecting portion connected to one end of the column electrode; and a second connecting portion connected to another end of the column electrode via solder, wherein a height of the column electrode is a width of the first connecting portion or greater.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: August 11, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Shinji Nakazawa, Miki Suzuki
  • Publication number: 20150091162
    Abstract: A semiconductor device provided with a wiring substrate including a connection pad, a joining member joined with the connection pad, and a semiconductor chip including a connection terminal electrically connected to the connection pad via the joining member. The joining member includes a first intermetallic compound layer composed of an intermetallic compound of Cu3Sn or Ni3Sn4 and formed at a boundary between the connection pad and the joining member, a second intermetallic compound layer composed of an intermetallic compound of Cu3Sn or Ni3Sn4 and formed at a boundary between the connection terminal and the joining member, a third intermetallic compound layer composed of an intermetallic compound of Cu6Sn5 or (Cu,Ni)6Sn5 and formed between the first intermetallic compound layer and the second intermetallic compound layer, and a simple substance of Bi separated and dispersed in the third intermetallic compound layer.
    Type: Application
    Filed: September 18, 2014
    Publication date: April 2, 2015
    Inventor: Kei MURAYAMA
  • Publication number: 20140362552
    Abstract: There is provided an interposer for cooling an electronic component. The interposer includes: a substrate body having a hollow cooling channel therein, wherein a cooling medium flows through the cooling channel, the cooling channel including: a plurality of main cooling channels extending in a certain direction and separated from each other; an inflow channel which is communicated with one end of the respective main cooling channels; and an outflow channel which is communicated with the other end of the respective main cooling channels, and a plurality of through electrode groups each comprising a plurality of through electrodes arranged in a line. Each of the though electrodes is formed through the substrate body to reach the first and second surfaces of the substrate body. The respective through electrode groups are partitioned by at least corresponding one of the main cooling channels.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 11, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Mitsutoshi Higashi, Koji Nagai, Hideaki Sakaguchi
  • Publication number: 20140320062
    Abstract: A vehicle management system that manages a plurality of electric vehicles includes state detecting means for detecting deteriorated states of the plurality of electric vehicles and order-of-use deciding means for deciding an order of use of the electric vehicles so that the electric vehicles can be placed ahead more in the order of use as such detected deteriorated states of EV storage batteries of the electric vehicles are smaller.
    Type: Application
    Filed: November 19, 2012
    Publication date: October 30, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Kei Murayama
  • Publication number: 20140293564
    Abstract: An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.
    Type: Application
    Filed: March 10, 2014
    Publication date: October 2, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei MURAYAMA, Mitsuhiro AIZAWA, Koji HARA
  • Publication number: 20140285001
    Abstract: In order to manage power exchanged between an electric vehicle 1 and a house system 2 including an electric device 22, a power management device includes a vehicle detection portion 26 configured to detect a vehicle available for a resident of the house. A controller 24 determines power supplied from the electric vehicle 1 to the house system 2 in accordance with the presence of the vehicle detected by the vehicle detection portion 26. The power management device can thereby supply power from an electric vehicle to a house while securing the situation where the resident can move by vehicle in emergencies.
    Type: Application
    Filed: November 8, 2012
    Publication date: September 25, 2014
    Inventor: Kei Murayama
  • Patent number: 8841760
    Abstract: A stacked semiconductor device includes a unit component including a wiring portion formed by electrically connecting a die pad of and a lead of a lead frame, and a semiconductor package whose connection terminal is connected to the lead, wherein the unit component is stacked, and the leads located to upper and lower sides are connected mutually via an electrode.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 23, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kei Murayama
  • Patent number: 8836119
    Abstract: There is provided a semiconductor device. The semiconductor device includes: a silicon substrate; a copper post connected to one surface of the silicon substrate; a semiconductor element having a linear expansion coefficient different from that of the silicon substrate; a metal layer provided between the semiconductor element and the silicon substrate to cover the copper post; a first alloy layer provided between the copper post and the semiconductor element, wherein the first alloy layer includes alloy of gold and a metal of the metal layer; and a second alloy layer provided between the metal layer and the semiconductor element, wherein the second alloy layer includes alloy of gold and the metal of the metal layer.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: September 16, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Kenichi Mori
  • Patent number: 8674499
    Abstract: A heat radiation component configured to be provided through a thermal interface material on a semiconductor device mounted on a board includes a first layer to be positioned on a first side and a second layer stacked on the first layer to be positioned on a second side farther from the semiconductor device than the first side. The coefficient of thermal expansion of the second layer is lower than the coefficient of thermal expansion of the first layer.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: March 18, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Shigeaki Suganuma, Masakuni Kitajima, Ryuichi Matsuki, Hiroyuki Miyajima
  • Publication number: 20140042616
    Abstract: There is provided a semiconductor device. The semiconductor device includes: a silicon substrate; a copper post connected to one surface of the silicon substrate; a semiconductor element having a linear expansion coefficient different from that of the silicon substrate; a metal layer provided between the semiconductor element and the silicon substrate to cover the copper post; a first alloy layer provided between the copper post and the semiconductor element, wherein the first alloy layer includes alloy of gold and a metal of the metal layer; and a second alloy layer provided between the metal layer and the semiconductor element, wherein the second alloy layer includes alloy of gold and the metal of the metal layer.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 13, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei MURAYAMA, Akinori SHIRAISHI, Kenichi MORI
  • Patent number: 8622556
    Abstract: A frame-attached anti-reflection glass (a cap for optical device) includes a plate-shaped member including an anti-reflection film formed on at least one surface of a plate-shaped glass, and a frame-shaped member made of silicon joined to a peripheral portion on one surface side of the plate-shaped member. The anti-reflection film includes two partial films having different compositions, and one partial film is a light-absorbent film. The two partial films are continuously formed on the plate-shaped glass, and respective surfaces of each partial film are on a level with each other. The plate-shaped glass and the frame-shaped member (silicon) are joined together by anodic bonding.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: January 7, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi
  • Publication number: 20130329385
    Abstract: An electronic device includes: a housing having a concave portion in the first surface of the housing; a lid made of a semiconductor material containing an impurity material; a first metal film formed in a metal film formation region on the first surface of the housing, wherein the metal film formation region is defined as a region surrounding the concave portion on the first surface of the housing; a second metal film formed on the first surface of the lid to overlap with the metal film formation region in a top view of the electronic device; a third metal film formed on the second surface of the lid to overlap with the metal film formation region in the top view; and an electronic component disposed in the concave portion. The lid is bonded onto the housing via the first and second metal films to cover the electronic component.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 12, 2013
    Inventor: Kei MURAYAMA
  • Patent number: 8598684
    Abstract: A method of manufacturing a semiconductor device, comprising the steps of preparing a structure including a semiconductor substrate, an element formed therein, a through hole formed to penetrate the semiconductor substrate, and an insulating layer formed on both surface sides of the semiconductor substrate and an inner surface of the through hole, and covering the element, forming a penetrating electrode in the through hole, forming a first barrier metal pattern layer covering the penetrating electrode, forming a contact hole reaching a connection portion of the element in the insulating layer, removing a natural oxide film on the connection portion of the element in the contact hole, and forming a wiring layer connected to the first barrier metal pattern layer and connected to the element through the contact hole.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: December 3, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Kei Murayama