Patents by Inventor Kei Murayama

Kei Murayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7897510
    Abstract: A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 1, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Yuichi Taguchi, Naoyuki Koizumi, Mitsutoshi Higashi
  • Patent number: 7894201
    Abstract: A method of manufacturing an electronic component includes the steps of a) forming a plurality of wiring boards that include first through holes penetrating through a semiconductor substrate and conductive material buried in the first through holes; b) providing conductive projections on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 22, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7888953
    Abstract: A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: February 15, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Akinori Shiraishi, Masahiro Sunohara, Kei Murayama, Hideaki Sakaguchi
  • Publication number: 20110032710
    Abstract: A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate.
    Type: Application
    Filed: October 19, 2010
    Publication date: February 10, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Mitsutoshi Higashi, Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Hideaki Sakaguchi
  • Patent number: 7882626
    Abstract: A method of manufacturing a wiring board having a semiconductor chip mounting surface for mounting a semiconductor chip thereon which is manufactured by a process including a step of forming a wiring layer and an insulating layer on a support board and a step of removing the support board, including a peeling layer forming step of forming a peeling layer on the support board formed by a material having a coefficient of thermal expansion which is equal to that of a semiconductor substrate constituting the semiconductor chip, and a support board removing step of removing the support board by carrying out a predetermined treatment over the peeling layer.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: February 8, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi, Masahiro Sunohara
  • Patent number: 7884632
    Abstract: In a semiconductor inspecting device having a contact to be electrically connected to an electrode pad formed in a semiconductor device which is an object to be measured, and a substrate provided with the contact, the contact is provided obliquely to a main surface of the substrate.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: February 8, 2011
    Assignee: Shinko Electric Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Mitsutoshi Higashi, Kei Murayama, Katsunori Yamagishi, Mitsuhiro Aizawa
  • Publication number: 20110027990
    Abstract: A semiconductor chip includes a semiconductor substrate, a through via provided in a through hole that passes through the semiconductor substrate, insulating layers laminated on the semiconductor substrate, a multi-layered wiring structure having a first wiring pattern and a second wiring pattern, and an external connection terminal provided on an uppermost layer of the multi-layered wiring structure, wherein the through via and the external connection terminal are connected electrically by the second wiring pattern.
    Type: Application
    Filed: October 8, 2010
    Publication date: February 3, 2011
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7876036
    Abstract: A light emitting apparatus, includes: a light emitting device accommodating body, which has a recessed portion wherein a light emitting device is accommodated; a wiring pattern, which is provided for the light emitting device accommodating body 11 and is electrically connected to the light emitting device; a light transmitting substrate, which is mounted on the light emitting device accommodating body and completely closes the recessed portion; and a phosphor-containing, ultraviolet curing resin, which is so deposited that, opposite to the light emitting device accommodating body, the face of the light transmitting member is covered.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: January 25, 2011
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuichi Taguchi, Masahiro Sunohara, Hideaki Sakaguchi, Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20100320598
    Abstract: A semiconductor device includes a stacked chip structure provided on a board and made up of semiconductor chips that are stacked via insulators. Each semiconductor chip has an integrated circuit surface, pads provided on the integrated circuit surface, and conductive connecting members having a wave shape with first ends electrically connected to the pads, and second ends extending outwardly from the at least one edge part and electrically connected to the connection terminals on the board.
    Type: Application
    Filed: June 11, 2010
    Publication date: December 23, 2010
    Inventors: Kei Murayama, Mitsuhiro Aizawa
  • Publication number: 20100321936
    Abstract: It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.
    Type: Application
    Filed: August 6, 2010
    Publication date: December 23, 2010
    Applicant: SHINKO ELECTRICAL INDUSTRIES CO., LTD.
    Inventors: Mitsutoshi HIGASHI, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Akinori Shiraishi
  • Patent number: 7850344
    Abstract: A light emitting device housing having a concave part is provided therein for housing a light emitting device. Side surfaces of the concave part are each configured to be a perpendicular surface that is substantially perpendicular to a bottom surface of the concave part, and other side surfaces are each configured to be an inclined surface for reflecting light from the light emitting device toward above the light emitting device.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: December 14, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Yuichi Taguchi, Masahiro Sunohara, Mitsutoshi Higashi
  • Patent number: 7843068
    Abstract: A semiconductor chip includes a semiconductor substrate 11, a through via 12 provided in a through hole 17 that passes through the semiconductor substrate 11, insulating layers 21-1 to 21-3 laminated on the semiconductor substrate 11, a multi-layered wiring structure 14 having a first wiring pattern 22 and a second wiring pattern 23, and an external connection terminal 15 provided on an uppermost layer of the multi-layered wiring structure 14, wherein the through via 12 and the external connection terminal 15 are connected electrically by the second wiring pattern 23.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: November 30, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7838897
    Abstract: The invention provides a light-emitting device 10 including a light-emitting element 12 and a substrate 11 where the light-emitting element 12 is arranged, characterized in that a housing part 28 housing the light-emitting element 12 and having a shape that is tapered upward from the substrate 11 and a metal frame 15 surrounding the light-emitting element 12 and including the side face 28A of the housing part 28 made into a almost mirror-polished surface are provided on the substrate 11.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: November 23, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Mitsutoshi Higashi, Masahiro Sunohara, Yuichi Taguchi, Akinori Shiraishi, Kei Murayama, Naoyuki Koizumi, Hideaki Sakaguchi
  • Patent number: 7834438
    Abstract: According to a sealed structure 60 constituted by anodically bonding a silicon board 20 and a glass plate 40, an upper opening of a recessed portion 22 is sealed in an airtight state by the glass plate 40 by bonding an upper face of a wall portion 26 to the glass plate 40. A voltage applying pattern 70 is formed to surround a light transmitting region to which an optical conversion element 24 is opposed. Further, the voltage applying pattern 70 functions as a cathode pattern applied with a voltage by being brought into contact with a lower face of the cathode plate 50.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: November 16, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Naoyuki Koizumi, Kei Murayama, Hideaki Sakaguchi, Masahiro Sunohara, Yuichi Taguchi, Mitsutoshi Higashi
  • Patent number: 7829993
    Abstract: A semiconductor apparatus comprising a silicon substrate; an device housing space including a concave portion formed in the silicon substrate and a hole perforating through the bottom surface of the concave portion; a plurality of laminated semiconductor devices provided in the device housing space; a first lid which lids the concave portion and a second lid which lids the hole, for sealing the semiconductor devices; and via plugs which are connected to the semiconductor devices, penetrating the bottom surface of the concave portion.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: November 9, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Akinori Shiraishi, Masahiro Sunohara, Yuichi Taguchi, Mitsutoshi Higashi
  • Patent number: 7825423
    Abstract: In a semiconductor device 100, a light emitting device 102 is mounted on a substrate 101. A light reflection preventing film 130 for preventing a reflection of a light is formed on an upper surface of the light emitting device 102. Moreover, a plate-shaped cover 103 formed of a glass having a light transparency is disposed above the light emitting device 102, and a light reflection preventing film 140 for preventing a reflection of a light is also formed on an upper surface of the cover 103.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: November 2, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Yuichi Taguchi, Masahiro Sunohara, Hideaki Sakaguchi, Naoyuki Koizumi, Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7816690
    Abstract: A light-emitting device includes a light-emitting element 12 and a wiring substrate 11 having a substrate body 17 having a protruding portion 25 at a position where the light-emitting device 12 is disposed and wiring patterns 21 and 22 disposed on the substrate body 17 and electrically connected to the light-emitting element 12.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: October 19, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Yuichi Taguchi, Kei Murayama, Masahiro Sunohara, Mitsutoshi Higashi
  • Publication number: 20100252912
    Abstract: A method of manufacturing a semiconductor device, comprising the steps of preparing a structure including a semiconductor substrate, an element formed therein, a through hole formed to penetrate the semiconductor substrate, and an insulating layer formed on both surface sides of the semiconductor substrate and an inner surface of the through hole, and covering the element, forming a penetrating electrode in the through hole, forming a first barrier metal pattern layer covering the penetrating electrode, forming a contact hole reaching a connection portion of the element in the insulating layer, removing a natural oxide film on the connection portion of the element in the contact hole, and forming a wiring layer connected to the first barrier metal pattern layer and connected to the element through the contact hole.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 7, 2010
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Kei MURAYAMA
  • Patent number: 7807561
    Abstract: After plural semiconductor elements are stacked to form a stacked body P, side wirings are formed on the side surface of the stacked body P, thereby manufacturing a semiconductor apparatus in which the respective semiconductor elements are electrically connected to one another. In this case, as the semiconductor element, a semiconductor element 10 is employed in which a gold wire 16 with its one end connected to an electrode terminal of the semiconductor element is extended out to the side surface. A conductive paste 36 containing conductive particles applied over a predetermined length of a transferring wire 30 is transferred to the side surface of the stacked body P so that the gold wires 16 extended out to the side surfaces of the semiconductor elements 10, 10, 10 are connected, thereby forming the side wirings.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: October 5, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Shigeru Mizuno, Takashi Kurihara, Akinori Shiraishi, Kei Murayama, Mitsutoshi Higashi
  • Publication number: 20100248668
    Abstract: A positioning receiver and a positioning method for user equipment in which errors in the position when the position of the user equipment is calculated can be reduced even in an environment in which the user equipment moves at high speed to improve the accuracy of the position. User equipment (UE) (100) calculates the Doppler shift amount of the pseudo distance data and carrier wave between base stations (BS-1, BS-2, BS-3,& mldr;) on the basis of the communication between the base stations (BS-1, BS-2, BS-3, & mldr;) and calculates a position coordinate from the pseudo distance data between the base stations (BS-1, BS-2, BS-3, & mldr;), provided that the pseudo distance data obtained between the base stations in which the calculated Doppler shift amount is larger than a reference value is not used for the calculation of the position coordinate.
    Type: Application
    Filed: October 26, 2007
    Publication date: September 30, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroshi Katayama, Akifumi Miyano, Hirofumi Yoshida, Kei Murayama, Kazuhiro Nojima