Patents by Inventor Keiji Okumura

Keiji Okumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150108664
    Abstract: Provided is a semiconductor device which includes a bonding wire, one end of which is connected to a bipolar device, the other end of which is connected to a conductive member, and the center of which is connected to a unipolar device, said semiconductor device being capable of improving the reliability of wire bonding. A package (4) includes a die pad (61), a source lead (63), a first MOSFET (11), and a first Schottky barrier diode (21). A source electrode (11S) of the first MOSFET (11), an anode electrode (21A) of the first Schottky barrier diode (21), and the source lead (63) are electrically connected by the bonding wire (31), one end of which is bonded to the source electrode (11S) of the first MOSFET (11), the other end of which is bonded to the source lead (63), and the center of which is bonded to the anode electrode (21A) of the first Schottky barrier diode (21).
    Type: Application
    Filed: December 30, 2014
    Publication date: April 23, 2015
    Inventor: Keiji OKUMURA
  • Patent number: 8995030
    Abstract: An image forming apparatus according to one aspect of the present disclosure includes an apparatus body, a document sheet feed apparatus, a wiring cord, a guide portion, and a wiring cord cover. The apparatus body includes a document sheet reading portion therein. The document sheet feed apparatus is configured to be openable and closable relative to a document sheet placing surface of the apparatus body. The wiring cord is configured to electrically connect between the apparatus body and the document sheet feed apparatus. The guide portion is configured to surround the wiring cord. The wiring cord cover is mounted detachably to the apparatus body in a state where the wiring cord cover has the wiring cord disposed therein.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 31, 2015
    Assignee: KYOCERA Documant Solutions Inc.
    Inventors: Masayuki Kakuta, Keiji Okumura
  • Patent number: 8982204
    Abstract: An inspection management apparatus includes: a schedule generation unit that, based on a scheduled start date and time of examination, a scheduled start date and time of observation, a predictive transfer time of image data from a receiving device to an inspection management apparatus, and a predictive image processing time for each type of image processing, calculates an image transfer start date and time from the receiving device to the inspection management apparatus, and calculates an image processing start date and time of the transferred image data; and a control unit that starts acquisition of the image data transmitted from the receiving device when the image transfer start date and time comes, and causes, when the image processing start date and time comes, an image processing unit to perform specified image processing on the image data that the transfer has been started on the image transfer start date and time.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: March 17, 2015
    Assignee: Olympus Medical Systems Corp.
    Inventors: Takeshi Nishiyama, Isao Tateshita, Keiji Okumura, Takaharu Hosoi
  • Patent number: 8970020
    Abstract: Provided is a semiconductor device which includes a bonding wire, one end of which is connected to a bipolar device, the other end of which is connected to a conductive member, and the center of which is connected to a unipolar device, said semiconductor device being capable of improving the reliability of wire bonding. A package (4) includes a die pad (61), a source lead (63), a first MOSFET (11), and a first Schottky barrier diode (21). A source electrode (11S) of the first MOSFET (11), an anode electrode (21A) of the first Schottky barrier diode (21), and the source lead (63) are electrically connected by the bonding wire (31), one end of which is bonded to the source electrode (11S) of the first MOSFET (11), the other end of which is bonded to the source lead (63), and the center of which is bonded to the anode electrode (21A) of the first Schottky barrier diode (21).
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: March 3, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Keiji Okumura
  • Patent number: 8971044
    Abstract: A semiconductor device includes: a first output unit configured to output a first phase; a second output unit configured to output a second phase different from the first phase, the second output unit being disposed to be stacked on the first output unit; and a controller configured to control the output units.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: March 3, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Keiji Okumura, Takukazu Otsuka, Masao Saito
  • Publication number: 20150028352
    Abstract: [Object] To provide a semiconductor device with which an increase in on-resistance can be suppressed even if a voltage is continuously applied for a long period of time across a source and a drain in a gate-off state. [Solution Means] A semiconductor device 1 includes a substrate 7 made of an n+ type SiC and having a predetermined off-angle, a drift layer 8 made of an n? type SiC and formed on the substrate 7, a plurality of unit cells 10 demarcated in the drift layer 8 by n? type epitaxial lines 13 including first lines 11 parallel to an off-direction of the substrate 7 and second lines 12 intersecting the first lines 11, a gate insulating film 17 formed on the drift layer 8, a gate electrode 18 formed on the gate insulating film 17, and a p? type relaxation layer 24 formed in the first lines 11 in the drift layer 8 and relaxing an electric field generated in the gate insulating film 17.
    Type: Application
    Filed: February 15, 2013
    Publication date: January 29, 2015
    Inventor: Keiji Okumura
  • Publication number: 20140300719
    Abstract: An inspection management apparatus includes: a schedule generation unit that, based on a scheduled start date and time of examination, a scheduled start date and time of observation, a predictive transfer time of image data from a receiving device to an inspection management apparatus, and a predictive image processing time for each type of image processing, calculates an image transfer start date and time from the receiving device to the inspection management apparatus, and calculates an image processing start date and time of the transferred image data; and a control unit that starts acquisition of the image data transmitted from the receiving device when the image transfer start date and time comes, and causes, when the image processing start date and time comes, an image processing unit to perform specified image processing on the image data that the transfer has been started on the image transfer start date and time.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 9, 2014
    Applicant: OLYMPUS MEDICAL SYSTEMS CORP.
    Inventors: Takeshi NISHIYAMA, Isao TATESHITA, Keiji OKUMURA, Takaharu HOSOI
  • Publication number: 20140293378
    Abstract: An image forming apparatus according to one aspect of the present disclosure includes an apparatus body, a document sheet feed apparatus, a wiring cord, a guide portion, and a wiring cord cover. The apparatus body includes a document sheet reading portion therein. The document sheet feed apparatus is configured to be openable and closable relative to a document sheet placing surface of the apparatus body. The wiring cord is configured to electrically connect between the apparatus body and the document sheet feed apparatus. The guide portion is configured to surround the wiring cord. The wiring cord cover is mounted detachably to the apparatus body in a state where the wiring cord cover has the wiring cord disposed therein.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 2, 2014
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Masayuki Kakuta, Keiji Okumura
  • Patent number: 8844921
    Abstract: A sheet post-processing apparatus according to one aspect of the present disclosure includes a switching member, a stapler, and a movement driving portion. The switching member switches the conveying direction of a sheet introduced from an image forming apparatus. The stapler staples a bundle of sheets obtained by performing stacking processing for a plurality of the sheets introduced from the image forming apparatus. The movement driving portion moves the stapler. Further, the stapler operates the switching member by being moved by the movement driving portion, thereby switching the conveying direction of the sheet.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: September 30, 2014
    Assignee: KYOCERA Document Solutions, Inc.
    Inventor: Keiji Okumura
  • Publication number: 20140270837
    Abstract: An image forming system includes an image forming apparatus, a post-processing apparatus, a fixed member, a first connector, a connecting member, and a second connector. The mage forming apparatus includes the fixed member on which the first connector is mounted and the post-processing apparatus includes connecting member on which the second connector is mounted. The connecting member is movable in a front-back direction and configured so as to be displaced between an engaging position in which the connecting member is engaged with the fixed member and a disengaging position in which the connecting member is disengaged from the fixed member. The first connector and the second connector are disconnected from each other when the connecting member is set to the disengaging position, and connected to each other when the connecting member is set to the engaging position.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Keiji Okumura, Terumitsu Noso
  • Publication number: 20140231926
    Abstract: Provided is a semiconductor device which includes a bonding wire, one end of which is connected to a bipolar device, the other end of which is connected to a conductive member, and the center of which is connected to a unipolar device, said semiconductor device being capable of improving the reliability of wire bonding. A package (4) includes a die pad (61), a source lead (63), a first MOSFET (11), and a first Schottky barrier diode (21). A source electrode (11S) of the first MOSFET (11), an anode electrode (21A) of the first Schottky barrier diode (21), and the source lead (63) are electrically connected by the bonding wire (31), one end of which is bonded to the source electrode (11S) of the first MOSFET (11), the other end of which is bonded to the source lead (63), and the center of which is bonded to the anode electrode (21A) of the first Schottky barrier diode (21).
    Type: Application
    Filed: June 18, 2012
    Publication date: August 21, 2014
    Applicant: ROHM CO., LTD.
    Inventor: Keiji Okumura
  • Patent number: 8608150
    Abstract: A sheet post-processing apparatus is provided that includes a first delivery path that guides a sheet to a first post-processing portion, a delivery holding path having a first holding path which branches off from a branch point of the first delivery path and a second holding path which is formed to be continuous with the first holding path and joins together with the first delivery path; a second delivery path that branches off from a branch point of the first holding path and guides the sheet to the second post-processing portion; a first path switching portion that is provided at the branch point of the first delivery path; and a second path switching portion that is provided at the branch point of the first holding path.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: December 17, 2013
    Assignee: Kyocera Document Solutions Inc.
    Inventor: Keiji Okumura
  • Publication number: 20130313771
    Abstract: A sheet post-processing apparatus according to one aspect of the present disclosure includes a switching member, a stapler, and a movement driving portion. The switching member switches the conveying direction of a sheet introduced from an image forming apparatus. The stapler staples a bundle of sheets obtained by performing stacking processing for a plurality of the sheets introduced from the image forming apparatus. The movement driving portion moves the stapler. Further, the stapler operates the switching member by being moved by the movement driving portion, thereby switching the conveying direction of the sheet.
    Type: Application
    Filed: May 20, 2013
    Publication date: November 28, 2013
    Applicant: KYOCERA Document Solutions Inc.
    Inventor: Keiji Okumura
  • Patent number: 8592986
    Abstract: A high melting point soldering layer includes a low melting point metal layer, a first high melting point metal layer disposed on a surface of the low melting point metal layer, and a second high melting point metal layer disposed at a back side of the low melting point metal layer. The low melting point metal layer, the first high melting point metal layer, and the second high melting point metal layer are mutually alloyed by transient liquid phase bonding, by annealing not less than a melting temperature of the low melting point metal layer, diffusing the metal of the low melting point metal layer into an alloy of the first high melting point metal layer and the second high melting point metal layer. The high melting point soldering layer has a higher melting point temperature than that of the low melting point metal layer.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 26, 2013
    Assignees: Rohm Co., Ltd., The Board of Trustees of the University of Arkansas
    Inventors: Takukazu Otsuka, Keiji Okumura, Brian Lynn Rowden
  • Publication number: 20130248981
    Abstract: A semiconductor device includes a first conductive-type semiconductor layer, a second conductive-type body region formed in a surficial portion of the semiconductor layer, a first conductive-type source region formed in a surficial portion of the body region, a gate insulating film provided on the semiconductor layer and containing nitrogen atoms, the gate insulating film including a first portion in contact with the semiconductor layer outside the body region, a second portion in contact with the body region, and a third portion in contact with the source region, and a gate electrode provided on the gate insulating film in an area extending across the semiconductor layer outside the body region, the body region, and the source region. The third portion of the gate insulating film has a thickness greater than the thickness of the first portion and the thickness of the second portion.
    Type: Application
    Filed: September 15, 2011
    Publication date: September 26, 2013
    Applicant: ROHM CO., LTD.
    Inventors: Keiji Okumura, Mineo Miura, Katsuhisa Nagao, Shuhei Mitani
  • Patent number: 8513806
    Abstract: The laminated high melting point soldering layer includes: a laminated structure which laminated a plurality of three-layered structures, the respective three-layered structures including a low melting point metal thin film layer and a high melting point metal thin film layers disposed on a surface and a back side surface of the low melting point metal thin film layer; a first high melting point metal layer disposed on the surface of the laminated structure; and a second high melting point metal layer disposed on the back side surface of the laminated structure. The low melting point metal thin film layer and the high melting point metal thin film layer are mutually alloyed by TLP, and the laminated structure, and the first high melting point metal layer and the second high melting point metal layer are mutually alloyed by the TLP bonding.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: August 20, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Takukazu Otsuka, Keiji Okumura
  • Publication number: 20130175549
    Abstract: A semiconductor device (1) includes an n type epitaxial layer (8), body regions (12) formed in the surface layer part of the n type epitaxial layer (8), n type source regions (16) formed in the surface layer parts of the body regions (12), a gate insulating film (19) formed on the n type epitaxial layer (8), and a gate protection diode (30) and gate electrodes (20) formed on the gate insulating film (19). The gate protection diode (30) includes a first p type region (31), an n type region (32), and a second p type region (33). A first diode (30A) is formed of the first p type region (31) and the n type region (32). A second diode (30B) is formed of the n type region (32) and the second p type region (33). The first p type region (31) is connected to the gate electrode (20). The second p type region (33) is connected to a source electrode (27).
    Type: Application
    Filed: September 13, 2011
    Publication date: July 11, 2013
    Applicant: ROHM CO., LTD.
    Inventor: Keiji Okumura
  • Publication number: 20130082284
    Abstract: An electronic circuit includes a bipolar device, a unipolar device connected in parallel to the bipolar device, and an output line connected to the bipolar device and to the unipolar device. An inductance between the unipolar device and the output line is smaller than an inductance between the bipolar device and the output line.
    Type: Application
    Filed: May 27, 2011
    Publication date: April 4, 2013
    Applicant: ROHM CO., LTD.
    Inventor: Keiji Okumura
  • Publication number: 20130009256
    Abstract: The semiconductor device according to the present invention includes a semiconductor layer of a first conductivity type, body regions of a second conductivity type plurally formed on a surface layer portion of the semiconductor layer at an interval, a source region of the first conductivity type formed on a surface layer portion of each body region, a gate insulating film provided on the semiconductor layer to extend between the body regions adjacent to each other, a gate electrode provided on the gate insulating film and opposed to the body regions, and a field relaxation portion provided between the body regions adjacent to each other for relaxing an electric field generated in the gate insulating film.
    Type: Application
    Filed: March 30, 2011
    Publication date: January 10, 2013
    Applicant: ROHM CO LTD
    Inventors: Keiji Okumura, Mineo Miura, Yuki Nakano, Noriaki Kawamoto
  • Publication number: 20130001782
    Abstract: The laminated high melting point soldering layer includes: a laminated structure which laminated a plurality of three-layered structures, the respective three-layered structures including a low melting point metal thin film layer and a high melting point metal thin film layers disposed on a surface and a back side surface of the low melting point metal thin film layer; a first high melting point metal layer disposed on the surface of the laminated structure; and a second high melting point metal layer disposed on the back side surface of the laminated structure. The low melting point metal thin film layer and the high melting point metal thin film layer are mutually alloyed by TLP, and the laminated structure, and the first high melting point metal layer and the second high melting point metal layer are mutually alloyed by the TLP bonding.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: ROHM CO., LTD.
    Inventors: Takukazu Otsuka, Keiji Okumura