Patents by Inventor Kenichi Nakanishi

Kenichi Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100169556
    Abstract: A nonvolatile storage device includes a nonvolatile memory configured to store user data and management information used to manage the user data on a file system, and a medium controller configured to determine whether a command input from a host device is used for the user data or the management information, the command describing content of processing performed for the user data or the management information, and switch between control methods used for the nonvolatile memory on the basis of the determination result.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 1, 2010
    Applicant: Sony Corporation
    Inventors: Kenichi Nakanishi, Keiichi Tsutsui, Junichi Koshiyama
  • Publication number: 20100049993
    Abstract: A device and method is provided for commonly and securely allowing, as access control on a memory card, a plurality of information processing apparatuses to lock/unlock the memory. On the basis of a lock command input from an information processing apparatus serving as a host, such as a PC, an information storage device, such as a memory card, determines whether (a) a standard lock key set serving as a key set prohibiting output or (b) an export lock key set serving as a key set permitting output is detected and stores corresponding key set information. Only when the export lock key set is detected, output is permitted provided that predetermined verification succeeds.
    Type: Application
    Filed: November 5, 2009
    Publication date: February 25, 2010
    Applicant: Sony Corporation
    Inventors: Takumi Okaue, Kenichi Nakanishi, Jun Tashiro, Hideaki Okubo
  • Patent number: 7647470
    Abstract: A memory device and controlling method for nonvolatile memory are provided. The memory device and the controlling method for a nonvolatile memory are provided by which, where a file management system wherein there is a tendency that lower logic addresses are used frequently like the MS-DOS is adopted, physical blocks of a flash memory are used in an averaged fashion and the life of the flash memory can be elongated thereby.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: January 12, 2010
    Assignee: Sony Corporation
    Inventors: Junko Sasaki, Kenichi Nakanishi, Nobuhiro Kaneko
  • Patent number: 7636826
    Abstract: A device and method is provided for commonly and securely allowing, as access control on a memory card, a plurality of information processing apparatuses to lock/unlock the memory. On the basis of a lock command input from an information processing apparatus serving as a host, such as a PC, an information storage device, such as a memory card, determines whether (a) a standard lock key set serving as a key set prohibiting output or (b) an export lock key set serving as a key set permitting output is detected and stores corresponding key set information. Only when the export lock key set is detected, output is permitted provided that predetermined verification succeeds.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: December 22, 2009
    Assignee: Sony Corporation
    Inventors: Takumi Okaue, Kenichi Nakanishi, Jun Tashiro, Hideaki Okubo
  • Patent number: 7530005
    Abstract: The present invention has been made to realize a storage device capable of normally reading out data from the erase processing applied area. In a semiconductor storage device 1, when data read processing is performed for the erase-processing applied area in a memory section 2 to read out erase-state actual data Ddr and erase-state parity data Ddp each containing only “1s”, the erase-state actual data Ddr and erase-state parity data Ddp are inverted by a third data inverting circuit 13 to make all the values thereof “0”, followed by execution of the error detection processing. With the above configuration, it is possible to prevent an error from being detected in the error detection processing.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: May 5, 2009
    Assignee: Sony Corporation
    Inventors: Kenichi Satori, Kenichi Nakanishi, Hideaki Bando, Takahiro Fukushige
  • Publication number: 20090070517
    Abstract: Disclosed herein is a memory apparatus comprising: a nonvolatile memory configured to allow data to be written thereto and read therefrom in units of a cluster and to permit data to be deleted therefrom in units of a block made up of a plurality of sectors; a control circuit configured to control access operations to said nonvolatile memory; a management area; a user data area; and a cache area; said management area includes a logical/physical table, and the addresses of physical blocks in said cache area.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 12, 2009
    Applicant: SONY CORPORATION
    Inventors: Nobuhiro Kaneko, Kenichi Nakanishi
  • Patent number: 7490198
    Abstract: This invention provides a memory card (1) that is to be used as a storage medium in a host apparatus that can record and reproduce data. The memory card has a first memory (12-1), a second memory (12-2), a first switch (13) for changing over one memory to the other, and a second switch (14) for connecting and disconnecting an insertion/removal detecting terminal INS. The first and second switches work as a slide switch (6) provided on the housing is operated. The first switch has a contact for selecting the first memory, a contact for selecting the second memory, and a contact located between these two contacts, for selecting neither memory. The second switch connects the terminal INS to the ground while the first switch remains connected to the contact for selecting the first memory or the contact for selecting the second memory. The second switch opens the terminal INS while the first switch remains connected to the contact for selecting neither memory.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: February 10, 2009
    Assignee: Sony Corporation
    Inventors: Takumi Okaue, Shigeo Araki, Junko Sasaki, Kenichi Nakanishi
  • Patent number: 7444460
    Abstract: The invention provides a data storage device and a method of updating management information, capable of dealing with management information in a highly reliable manner so that information is not easily lost when an error occurs. File management information such as a FAT serving as address management information in a flash memory is stored in a management information area of the memory, a pair of blocks is assigned as blocks for use to store data of the FAT, and writing of updated FAT information is performed by alternately using the two blocks of the block pair such that previous FAT information is retained in one of the two blocks of the block pair, and updated FAT information is written in the other block of the block pair, whereby, even when an error occurs in the middle of the process of writing the updated management information, a process using the retained previous FAT information is possible.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: October 28, 2008
    Assignee: Sony Corporation
    Inventors: Kenichi Nakanishi, Junko Sasaki, Nobuhiro Kaneko, Osamu Nagata, Hideaki Okubo
  • Patent number: 7412160
    Abstract: An image pickup apparatus includes a lens barrel, a lens holding frame made movable in an optical axis direction inside the lens barrel, a movable lens held in the lens holding frame, a yoke inserted into the lens barrel and attached to the lens barrel, a magnet attached to the yoke, and a driving coil that is attached to the lens holding frame and located to be opposed to the magnet and gives propulsion to the lens holding frame. A pair of first fitting sections is provided in the lens barrel. A pair of second fitting sections is provided in the lens barrel. An interval between the first fitting sections is set larger than an interval between the second fitting sections. A distance from the optical axis to the respective first fitting sections is set larger than a distance from the optical axis to the respective second fitting sections.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: August 12, 2008
    Assignee: Sony Corporation
    Inventors: Kenichi Nakanishi, Ken Tanaka, Takumi Fukuda
  • Publication number: 20080098166
    Abstract: A data storage device detachably connected to a host device, the data storage device including: a memory having a logical space composed of at least one logical unit; a logical space managing table for managing the logical space; and a controlling section configured to control a managing operation of the logical space managing table, and when the host device makes a request to divide the logical space, searching the logical space for unused logical blocks, dividing a logical space composed of the unused logical blocks from the logical space, and performing control to manage a plurality of the obtained logical spaces as different logical units, respectively.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 24, 2008
    Applicant: Sony Corporation
    Inventors: Kenichi Nakanishi, Daisuke Nakajima, Hideaki Okubo
  • Patent number: 7325104
    Abstract: A storage device includes a plurality of memories storing data; and a controller controlling the memories, the controller performing in parallel in a number of the memories, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: January 29, 2008
    Assignee: Sony Corporation
    Inventors: Kenichi Satori, Keiichi Tsutsui, Kenichi Nakanishi, Hideaki Bando, Hideaki Okubo, Yoshitaka Aoki, Tamaki Konno
  • Publication number: 20080022018
    Abstract: A card type peripheral apparatus connected to a host apparatus for communication therewith according to a specific protocol. The card type peripheral apparatus includes a plurality of configuration registers configured to be accessible by the host apparatus and to be set with diverse set information. At least one of the plurality of configuration registers is a special register configured to be set with data arbitrarily selected and fixedly established by a vendor that either fabricates or markets the card type peripheral apparatus. The special register is set with protocol identification information for discriminating the specific protocol.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 24, 2008
    Applicant: Sony Corporation
    Inventors: Tamaki Konno, Kenichi Satori, Junko Nagata, Noriyuki Hosoe, Naohiro Adachi, Kenichi Nakanishi
  • Publication number: 20080016291
    Abstract: An information storage apparatus transmits or receives information to or from another information processing apparatus in one of a plurality of data transfer modes. The information storage apparatus includes first storage means for storing the information; information transmission/reception control means for controlling transmission or reception of the information between the first storage means and second storage means contained in the other information processing apparatus; command analysis means for analyzing a command supplied from the other information processing apparatus to determine which of the plurality of data transfer modes should be applied; and configuration means for configuring the information transmission/reception control means based on a result of determination of the data transfer mode by the command analysis means.
    Type: Application
    Filed: June 21, 2007
    Publication date: January 17, 2008
    Inventors: Naohiro Adachi, Kenichi Satori, Kenichi Nakanishi, Tamaki Konno, Junko Nagata
  • Publication number: 20070150693
    Abstract: A memory control method is disclosed which includes: a storing step of storing a logical to physical conversion table retaining relations of correspondence between addresses of logical blocks in a user data area on the one hand, and addresses of physical blocks assigned to the logical blocks on the other hand, along with addresses of physical blocks in a cache area, the physical block addresses corresponding to the physical block addresses in the logical to physical conversion table; a first writing step of writing, to a deleted new cache block in the cache area, data in excess of a designated logical boundary which defines a logical space size in units of a plurality of sectors within a user data block of the user data area; and a second writing step of writing the data starting from the beginning of the new cache block upon data write in the first writing step to the new cache block, regardless of the logical address space of the new cache block.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 28, 2007
    Applicant: SONY CORPORATION
    Inventors: Nobuhiro Kaneko, Kenichi Nakanishi
  • Publication number: 20070143534
    Abstract: A nonvolatile-memory-access control apparatus controls operations for accessing a nonvolatile memory, which include plural cycles by a processing device. The nonvolatile-memory-access control apparatus includes a nonvolatile-memory-access-operation control unit that is capable of setting information on a series of nonvolatile-memory-access operations of the plural cycles, and when a request for access to the nonvolatile memory is received from the processing device, the unit is capable of controlling a series of operations for accessing the nonvolatile memory on the basis of the information set.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 21, 2007
    Applicant: Sony Corporation
    Inventors: Takuya Hashimoto, Kunihiro Miura, Toshinori Nakamura, Hideo Nomura, Kenichi Satori, Kenichi Nakanishi, Naohiro Adachi, Tamaki Konno
  • Publication number: 20070058464
    Abstract: Disclosed herein is a semiconductor storage device operable in a plurality of operation modes each having a separate maximum current consumption. The device includes: a data communication section configured to be capable of performing data communication in a plurality of communication modes; an attribute information storage section configured to store attribute information indicating the operation and communication modes; and a mode setting section configured to set the device to one of the operation modes and one of the communication modes. The data communication section transmits, to an electronic apparatus to which the device is attached, the information and receives from the apparatus a mode setting command for directing that the device be set to a combination of an operation mode and a communication mode selected from among the information. In accordance therewith, the mode setting section sets the device to the selected combination of modes.
    Type: Application
    Filed: September 11, 2006
    Publication date: March 15, 2007
    Inventor: Kenichi Nakanishi
  • Publication number: 20060184758
    Abstract: A storage device includes a plurality of memories storing data; and a controller controlling the memories, the controller performing in parallel in a number of the memories, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.
    Type: Application
    Filed: January 11, 2006
    Publication date: August 17, 2006
    Applicant: Sony Corporation
    Inventors: Kenichi Satori, Keiichi Tsutsui, Kenichi Nakanishi, Hideaki Bando, Hideaki Okubo, Yoshitaka Aoki, Tamaki Konno
  • Publication number: 20060164515
    Abstract: An image pickup apparatus includes a lens barrel, a lens holding frame made movable in an optical axis direction inside the lens barrel, a movable lens held in the lens holding frame, a yoke inserted into the lens barrel and attached to the lens barrel, a magnet attached to the yoke, and a driving coil that is attached to the lens holding frame and located to be opposed to the magnet and gives propulsion to the lens holding frame. A pair of first fitting sections is provided in the lens barrel. A pair of second fitting sections is provided in the lens barrel. An interval between the first fitting sections is set larger than an interval between the second fitting sections. A distance from the optical axis to the respective first fitting sections is set larger than a distance from the optical axis to the respective second fitting sections.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 27, 2006
    Applicant: Sony Corporation
    Inventors: Kenichi Nakanishi, Ken Tanaka, Takumi Fukuda
  • Patent number: 7065608
    Abstract: The present invention provides an apparatus for recording data, including a storage unit (4) for reading out management information stored in the flash memory (2) to store read out management information, an updating unit (7) for updating management information stored in the storage unit (4), a management information writing unit (3) for writing management information updated by the updating unit (7) to the page being a unit in writing data to the flash memory (2), and a control unit (7) for controlling the management information writing unit (3) so that, when the management information writing unit (3) writes updated management information to a page of the flash memory (2), a block which is different from a block including a page in which management information just before updating is written is selected, and updated management information is written to a vacant page of thus selected block.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: June 20, 2006
    Assignee: Sony Corporation
    Inventor: Kenichi Nakanishi
  • Publication number: 20060077583
    Abstract: The present invention has been made to realize a storage device capable of normally reading out data from the erase processing applied area. In a semiconductor storage device 1, when data read processing is performed for the erase-processing applied area in a memory section 2 to read out erase-state actual data Ddr and erase-state parity data Ddp each containing only “1s”, the erase-state actual data Ddr and erase-state parity data Ddp are inverted by a third data inverting circuit 13 to make all the values thereof “0”, followed by execution of the error detection processing. With the above configuration, it is possible to prevent an error from being detected in the error detection processing.
    Type: Application
    Filed: September 8, 2005
    Publication date: April 13, 2006
    Inventors: Kenichi Satori, Kenichi Nakanishi, Hideaki Bando, Takahiro Fukushige