Patents by Inventor Kenichi Takeda

Kenichi Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050074967
    Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.
    Type: Application
    Filed: May 20, 2003
    Publication date: April 7, 2005
    Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
  • Patent number: 6864584
    Abstract: In extremely minute copper wiring the width or the thickness of which is equal to or shorter than approximately the double length of the mean free path of a copper atom, a value of the resistance may be larger, compared with aluminum wiring of the same extent and it is difficult to realize wiring having small resistance. To solve such a problem, aluminum wiring is used for wiring having form in which the respective resistivities ? of both wirings have the relation of ?Al<?Cu and copper wiring is used for wiring having form in which the respective resistivities ? of both wirings have the relation of ?Al??Cu. As a result, a semiconductor device which has small resistance, transmits a signal at high speed and is provided with a multilayer wiring layer can be realized.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Yuko Hanaoka, Kenji Hinode, Kenichi Takeda, Daisuke Kodama, Noriyuki Sakuma
  • Patent number: 6864169
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: March 8, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchii, Nobuo Owada
  • Patent number: 6849535
    Abstract: A semiconductor device comprises a semiconductor substrate; a first insulating film overlying a surface of the semiconductor substrate, an upper surface of the first insulating film being nitrided; a first copper-embedded interconnection embedded in the first insulating film, and which first copper-embedded interconnection contains copper as a main component; a copper nitride film overlying an upper surface of the first copper-embedded interconnection; a cap insulating film overlying an upper surface of the first insulating film and an upper surface of the copper nitride film; and a second insulting film overlying the cap insulating film.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: February 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchi, Nobuo Owada
  • Publication number: 20050017423
    Abstract: A locating and clamping apparatus can prevent spatter from entering the clamp body through a spatter discharge hole. A longitudinal groove is formed in a side surface of the clamp body so as to communicate with both a spatter discharge hole and a hole for supporting a fulcrum pin. A spatter protecting cover having an upper cover member and a lower cover member is fitted in the longitudinal groove. The upper cover member of the spatter protecting cover prevents the fulcrum pin from coming off, and the lower cover member of the spatter protecting cover opens or closes the spatter discharge hole.
    Type: Application
    Filed: June 10, 2004
    Publication date: January 27, 2005
    Inventors: Kazushi Kita, Kenichi Takeda
  • Publication number: 20040229468
    Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.
    Type: Application
    Filed: April 16, 2004
    Publication date: November 18, 2004
    Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
  • Patent number: 6815330
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: November 9, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchii, Nobuo Owada
  • Publication number: 20040207695
    Abstract: The present invention provides a dielectric film structure having a substrate and a dielectric film provided on the substrate and in which the dielectric film has (00l) face orientation with respect to the substrate, and in which a value u in the following equation (1) regarding the dielectric film is a real number greater than 2:
    Type: Application
    Filed: February 3, 2004
    Publication date: October 21, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventors: Hiroshi Aoto, Kenichi Takeda, Tetsuro Fukui, Toshihiro Ifuku
  • Patent number: 6797606
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: September 28, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchii, Nobuo Owada
  • Patent number: 6797609
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: September 28, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchii, Nobuo Owada
  • Publication number: 20040184064
    Abstract: In a printer driver that transmits a print data to a printer connected via a network to make a print request, a document password processing unit prompts a user to input a document password for decrypting a PDF document data encrypted by a predetermined application. A print data creating unit creates a print data including the PDF document data encrypted and the document password. The created print data is transmitted to the printer via the network by a host I/F controller and a host I/F.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 23, 2004
    Inventors: Kenichi TaKeda, Hirofumi Nishiwaki, Nozomi Sawada, Masaki Ohtani
  • Patent number: 6756679
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: June 29, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchii, Nobuo Owada
  • Publication number: 20040066116
    Abstract: An actuator comprises a laminated structure having a vibration plate, a lower electrode, a piezoelectric element, and an upper electrode laminated sequentially on a basic element, and then, at least the lower electrode of the two electrodes is a thin oxide film doped with La of single orientated crystal or monocrystal that contains Sr and Ti. Thus, it is made possible to materialize the micro miniaturized actuator having a strong structure of lamination with high adhesion, which is capable of obtaining large displacement with sufficient durability without spoiling the piezo-electrostrictive property thereof even with the small thickness of the piezoelectric element. With the micro miniaturized actuator thus structured, it is made possible to make a liquid discharge head more precisely.
    Type: Application
    Filed: August 4, 2003
    Publication date: April 8, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventors: Takanori Matsuda, Kenichi Takeda, Toshihiro Ifuku, Kiyotaka Wasa
  • Patent number: 6717800
    Abstract: A shield plate mounting apparatus is disclosed which mounts a shield plate 4 on a casing 3 of a recording/reproducing apparatus 2 formed to be integral with a television receiver. In this shield plate mounting apparatus, a plurality of projection portions 7a to 7c are provided on the casing 3 at predetermined angular intervals to project therefrom. A slip-off preventing piece 8 is formed to be integral with each of the projection portions 7a and 7b and as to bend from the top end of each of the portions 7a and 7b in a direction nearly perpendicular thereto. A plurality of kinds of mounting angles &agr; of the shield plate 4 are set, and a plurality of through holes 9a to 9c respectively facing the projection portions 7a to 7c are pierced through the shield plate 4 correspondingly to each of the kinds of the mounting angles &agr;.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: April 6, 2004
    Assignee: Funai Electric Co., Ltd.
    Inventor: Kenichi Takeda
  • Patent number: 6716749
    Abstract: After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: April 6, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Junji Noguchi, Naofumi Ohashi, Kenichi Takeda, Tatsuyuki Saito, Hizuru Yamaguchi, Nobuo Owada
  • Publication number: 20030155462
    Abstract: An object of the present invention is to provide a feeding bobbin in which, in winding a thermal transfer sheet or image receiving sheet having a different size (width), onto the feeding bobbin, work on the side of a small roll winding device is easy, thermal transfer sheets or image receiving sheets different from each other in size (width) can be used in various thermal transfer printers, and the feeding bobbin can be recycled without the necessity of disposal and without causing any trouble, and to provide a method for recycling the feeding bobbin. The feeding bobbin is a feeding bobbin 1 comprising a common winding shaft 4 and flanges 2 mounted detachably respectively on both ends 61, 62 of the winding shaft 4.
    Type: Application
    Filed: January 9, 2003
    Publication date: August 21, 2003
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Kenichi Takeda, Eiichi Kitayama, Junichi Hiroi
  • Patent number: 6596638
    Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items, such as slurries and polishing pads, is reduced. A metal film formed on an insulating film having a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: July 22, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
  • Patent number: 6592243
    Abstract: A head lamp device includes a structure in which a discharge lamp has a discharge bulb and a reflector of a substantially hemispheric shape arranged in an upper part of a housing. A filament including a filament bulb and a reflector of a substantially hemispheric shape is arranged in a lower part of the housing. The front opening of the lamp housing is covered by a front lens. The discharge bulb can generate two to three times as much luminous flux as a conventional filament bulb. As a result, it is possible to reduce the size of the discharge bulb as compared to the filament bulb. This makes it possible to reduce the overall size of the head lamp device.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: July 15, 2003
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Shigeru Kodaira, Kenichi Takeda, Tetsuya Suzuki, Toru Hasegawa
  • Publication number: 20030111730
    Abstract: A semiconductor device according to this invention comprises a substrate 100 in which semiconductor elements are formed, a first conductor 301 at least a portion of the peripheral surface of which is made of a material comprising copper as a main ingredient, and a first insulative diffusion barrier layer 203 covering at least a portion of the first conductor 301. The first insulative diffusion barrier layer 203 is formed by using a gas mixture at least containing an alkoxy silane represented by the general formula (RO)nSiH4−n (n is an integer in a range from 1 to 3, R represents an alkyl group, an aryl group or a derivative thereof), and an oxidative gas by a plasma CVD. Thus, a semiconductor device comprising copper wiring of high reliability and with less wiring delay time can be provided.
    Type: Application
    Filed: November 19, 2002
    Publication date: June 19, 2003
    Inventors: Kenichi Takeda, Daisuke Ryuzaki, Kenji Hinode, Toshiyuki Mine
  • Publication number: 20030080433
    Abstract: In extremely minute copper wiring the width or the thickness of which is equal to or shorter than approximately the double length of the mean free path of a copper atom, a value of the resistance may be larger, compared with aluminum wiring of the same extent and it is difficult to realize wiring having small resistance. To solve such a problem, aluminum wiring is used for wiring having form in which the respective resistivities &rgr; of both wirings have the relation of &rgr;Al<&rgr;Cu and copper wiring is used for wiring having form in which the respective resistivities &rgr; of both wirings have the relation of &rgr;Al≧&rgr;Cu. As a result, a semiconductor device which has small resistance, transmits a signal at high speed and is provided with a multilayer wiring layer can be realized.
    Type: Application
    Filed: October 18, 2002
    Publication date: May 1, 2003
    Inventors: Yuko Hanaoka, Kenji Hinode, Kenichi Takeda, Daisuke Kodama, Noriyuki Sakuma