Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: A die-expanded molding apparatus comprising starting material bead supply for supplying beads on a current of air from a tank through a packer into a cavity formed by a core and cavity molds; a plurality of air expulsion devices having air pressure-adjusting components communicating with the cavity, a dual-system air expulsion device being such that steam chambers on the back side of the core mold and the cavity mold are used as the air pressure-adjusting components, each communicating with the cavity through through-holes formed in the core and cavity molds, respectively; an air expulsion device having one or more air pressure-adjusting components communicating with a clearance between the core and cavity molds; and a control for controlling the air pressure in each of the air pressure-adjusting components to be pressurized less than the pressure in the tank.

Abstract: To record physical activity and the amount of exercise, a CPU 130 calculates the user's heart rate while exercising from a pulse wave signal output from a pulse wave sensor unit 102 and an acceleration signal output from a acceleration sensor unit 140, calculates the number of steps taken by the user, and displays the results on an LCD 108. The CPU 130 continuously counts the number of steps based on the acceleration signal from the acceleration sensor unit 140, and displays the total number of steps taken by the user in one day on the LCD 108.

Abstract: There is provided an in-mold foam molding apparatus affording a significantly simpler design for a molding apparatus capable of molding molded portions comprising bead starting materials having different properties into a unitary molded article, and effectively preventing various drawbacks associated with the provision of partitioning members; and an in-mold foam molded article devoid of flash projecting from its visible surfaces.

Abstract: External resistance Rsd1 is obtained using a first evaluation pattern of MOSFETs having a gate contact length Lgc1 and a channel width W1 each (in steps 100 and 102). External resistance Rsd2 is then acquired by use of a second evaluation pattern of MOSFETs having a gate contact length Lgc2 and a channel width W2 each (in steps 100 and 104).

Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: An optical material including a crystalline silicon and FexSi2 in the form of dots, islands, or a film is provided. The FexSi2 has a symmetrical monoclinic crystalline structure belonging to the P21/c space group and is synthesized at the surface or in the interior of the crystalline silicon. The monoclinic structure corresponds to a deformed structure of &bgr;-FeSi2 generated by heteroepitaxial stress between the {110} plane of the FexSi2 and the {111} plane of the crystalline silicon. The value of x is 0.85≦x≦1.1. An optical element using the optical material is also provided.

Abstract: A flavor material or flavor derived from a citrus fruit is itself deoxidized, or production thereof is conducted in a deoxidized atmosphere to inhibit oxidation thereof, and the resulting deoxidized flavor material or flavor is added to inhibit oxidation of foods, drinks, aromatic products and medicines, thereby the oxidation of these products is inhibited; namely an oxidation inhibitor and a browning inhibitor comprising the deoxidized flavor material or flavor as an effective ingredient can be provided.

Abstract: An immunopotentiator for preventing ultraviolet light-induced skin immunosuppression or a drug against ultraviolet light-induced skin immunosuppression which contains glutathione or Scutellaria root extract. Also, an immunopotentiator or a drug against immunosuppression which contains linden extract, clove extract, Geranium herb extract or rosemary extract. They can prevent a reduction of immune functions due to ultraviolet light.

Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: The present invention is constituted such that chambers 13 and 14, independent from cavity 4, are formed at the rear side of a set of dies 2 and 3 for molding a molded foam product, first openings 30a and 30b opening to the cavity 4 are formed along the joint of the dies 2 and 3 as a molding section of the dies 2 and 3, which is to mold a non-outstanding portion of the molded foam product, wherein the first openings 30a and 30b are connected to the external utility pipes 15-18 as different systems for the chambers 13 and 14, via inter-die passages 31a and 31b and internal pipes 32a and 32b, which are connecting passages, so as to supply or exhaust such utility fluid as steam and compressed air to/from the cavity 4 independently from the chambers 13 and 14.

Abstract: A semiconductor substrate, a field effect transistor, a method of forming a SiGe layer and a method of forming a strained Si layer using the same, and a method of manufacturing a field effect transistor are provided, which enable the threading dislocation density of the SiGe layer to be reduced and the surface roughness to be minimized. On top of a Si substrate 1 is provided a SiGe buffer layer 2, 12 constructed of a plurality of laminated layers comprising alternating layers of a SiGe gradient composition layer 2a, 12a in which the Ge composition ratio increases gradually from the Ge composition ratio of the base material, and a SiGe constant composition layer 2b, 12b which is provided on top of the gradient composition layer and in which the Ge composition ratio is equal to that of the upper surface of the gradient composition layer.

Abstract: MOS transistors (TR1, TR2) are arranged closer to a pad (SP) in descending order of current-driving capability. Namely, the MOS transistors (TR1, TR2) are arranged from closer part to the pad (SP) in descending order of value of W/L obtained by dividing a gate width (W) of a gate electrode by a gate length (L) of the same. When a transistor has a large current-driving capability, the value of source-to-drain current is high. For this reason, the MOS transistors are arranged from closer part to the pad for source electrode in descending order of current-driving capability, to thereby reduce the amount of voltage drop in an interconnect line. A current value of the transistor becomes lower as a distance between the pad and the transistor increases. As a result, it is allowed to reduce influence on the transistor characteristics exerted by voltage drop due to interconnection resistance.

Abstract: External resistance Rsd1 is obtained using a first evaluation pattern of MOSFETs having a gate contact length Lgc1 and a channel width W1 each (in steps 100 and 102). External resistance Rsd2 is then acquired by use of a second evaluation pattern of MOSFETs having a gate contact length Lgc2 and a channel with W2 each (in steps 100 and 104).

Abstract: Objects of the invention is to provide a practical, novel foam molding apparatus wherein mold surfaces are devoid of air orifices, and to provide an in-mold foam molding apparatus and method for the reduction of cooling time for molded articles. A mold cavity 4 is filled with prefoamed beads comprising a polyolefin synthetic resin; these are heated and fused with steam; and the molded article is cooled, during which cooling process the pressure of the foamed resin against the molds 2, 3 as it is cooled is successively measured by means of a bearing pressure sensor, and when the pressure of the foamed resin against the molds has reached a pressure predetermined for the particular molded article, cooling of the molded article is terminated, the molded article is released from the mold, and the molded article is then set in a fixture to stabilize the shape of the molded article.

Abstract: A semiconductor device evaluation method and apparatus are provided which do not require a measurer to expend a great deal of time and effort even when measuring a large number of points, can prevent the occurrence of variations in measured values from measurer to measurer, and allow the measurement of the finished gate length even if gate pattern does not appear on the semiconductor device surface. There is also provided a semiconductor device manufacturing control method which applies such an evaluation method and apparatus to the control of semiconductor device manufacturing. For a plurality of insulated gate transistors with different channel lengths, an effective channel length (Leff), a gate capacitance (Cg), and a fringing capacitance (Cf) are determined by electrical measurement and/or calculation. The gate capacitance (Cg) and the effective channel length (Leff) are extended on a graph by extrapolation to determine gate-capacitance-vs.-effective-channel-length characteristics.

Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.

Abstract: A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.

Abstract: A transistor having a longer channel length and serving as a reference, and a transistor having a shorter channel length and to be subjected to effective channel length extraction are prepared (step ST1.1). A hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a gate overdrive is slightly changed is extracted in a mask channel length versus total drain-to-source resistance plane. The values of a function (F) are calculated which are defined by the difference between the rate of change in the total drain-to-source resistance and the product of a channel resistance per unit length and the rate of change in a mask channel length at the hypothetical points (step ST1.6). A true threshold voltage of the transistor having the shorter channel length is determined by a shift amount (&dgr;) which minimizes the standard deviation of the function (F) determined in the step ST1.7 (step ST1.10).