Patents by Inventor Kenji Yamaguchi

Kenji Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6399225
    Abstract: A luminescent substance contains silicon and nitrogen as major components and has an amorphous structure. The silicon content of the luminescent substance is greater than the stoichiometric silicon content of Si3N4, and the luminous intensity of the luminescent substance has a maximum at approximately 2.2 eV. The luminescent substance has a high luminous efficiency and a short luminous decay lifetime. A light-emitting device includes this luminescent substance and a substrate. The luminescent substance can be readily formed on the substrate by a chemical vapor deposition process.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: June 4, 2002
    Assignee: Mitsubishi Materials Corporation
    Inventors: Kenji Yamaguchi, Kazuki Mizushima, Kouichi Sassa
  • Publication number: 20020063572
    Abstract: A transistor having a longer channel length and serving as a reference, and a transistor having a shorter channel length and to be subjected to effective channel length extraction are prepared (step ST1.1). A hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a gate overdrive is slightly changed is extracted in a mask channel length versus total drain-to-source resistance plane. The values of a function (F) are calculated which are defined by the difference between the rate of change in the total drain-to-source resistance and the product of a channel resistance per unit length and the rate of change in a mask channel length at the hypothetical points (step ST1.6). A true threshold voltage of the transistor having the shorter channel length is determined by a shift amount (&dgr;) which minimizes the standard deviation of the function (F) determined in the step ST1.7 (step ST1.10).
    Type: Application
    Filed: January 28, 1999
    Publication date: May 30, 2002
    Inventors: KENJI YAMAGUCHI, HIROYUKI AMISHIRO, YUKO MARUYAMA
  • Patent number: 6373274
    Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: April 16, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kenji Yamaguchi
  • Publication number: 20020017642
    Abstract: A semiconductor substrate, a field effect transistor, a method of forming a SiGe layer and a method of forming a strained Si layer using the same, and a method of manufacturing a field effect transistor are provided, which enable the threading dislocation density of the SiGe layer to be reduced and the surface roughness to be minimized. On top of a Si substrate 1 is provided a SiGe buffer layer 2, 12 constructed of a plurality of laminated layers comprising alternating layers of a SiGe gradient composition layer 2a, 12a in which the Ge composition ratio increases gradually from the Ge composition ratio of the base material, and a SiGe constant composition layer 2b, 12b which is provided on top of the gradient composition layer and in which the Ge composition ratio is equal to that of the upper surface of the gradient composition layer.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 14, 2002
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Kazuki Mizushima, Ichiro Shiono, Kenji Yamaguchi
  • Publication number: 20010032982
    Abstract: An optical material including a crystalline silicon and FexSi2 in the form of dots, islands, or a film is provided. The FexSi2 has a symmetrical monoclinic crystalline structure belonging to the P21/c space group and is synthesized at the surface or in the interior of the crystalline silicon. The monoclinic structure corresponds to a deformed structure of &bgr;-FeSi2 generated by heteroepitaxial stress between the {110} plane of the FexSi2 and the {111} plane of the crystalline silicon. The value of x is 0.85≦x≦1.1. An optical element using the optical material is also provided.
    Type: Application
    Filed: March 5, 2001
    Publication date: October 25, 2001
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Kenji Yamaguchi, Kazuki Mizushima
  • Patent number: 6169114
    Abstract: The present invention is an endermic liniment which characteristically contains a thiol compound and zinc oxide. An endermic liniment which can contain a thiol compound in a stable manner can be provided by blending in a thiol compound and zinc oxide.
    Type: Grant
    Filed: May 5, 1999
    Date of Patent: January 2, 2001
    Assignee: Shiseido Company, Ltd.
    Inventors: Kenji Yamaguchi, Eiichiro Yagi, Masako Naganuma, Masato Hatao, Ichiro Iwai
  • Patent number: 6169415
    Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: January 2, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kenji Yamaguchi
  • Patent number: 5863505
    Abstract: The present invention provides an underground-environment simulator which simulates underground environment spaces used for radioactive waste disposal or the like, and has a hermetic box, wherein the carbon dioxide gas concentration inside the box can be adjusted to an optional level, and the atmosphere inside the box can be uniformly and stably maintained. In the underground-environment simulator of the present invention, a carbon dioxide gas feeding means feeds carbon dioxide gas into a circulating gas circulation which controls the atmosphere inside the hermetic box, and the concentration of carbon dioxide gas in the circulating gas is measured and adjusted to a predetermined level while oxygen is removed from the circulating gas in an oxyhydrogen reactor. Accordingly, the carbon dioxide gas concentration can be controlled within a low concentration range, and various underground environments can be accurately simulated by varying the carbon dioxide gas concentration to an optional level.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: January 26, 1999
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Ryutaro Wada, Makoto Asao, Tsutomu Nishimura, Toshio Iwata, Kenji Yamaguchi, Kiyoshi Tsune
  • Patent number: 5817161
    Abstract: In forming a piano-convex lens from a column-like lens blank by heating the blank to a temperature higher than the transition temperature thereof and by pressurizing an upper die with a closed space formed between the blank and the upper die, there are alternately repeated operations of pressurizing the upper die and stopping the application of pressure thereto. Through the control of the amount of displacement of the upper die, the maximum pressure of gas in the closed space at each pressurizing step is so controlled: as to be low according to the surface viscosity of the blank to the extent that no local concave deformation in the surface of the blank is produced; and as to be high to the extent that gas caught in the closed space is discharged at each step of stopping the application of pressure.
    Type: Grant
    Filed: January 15, 1997
    Date of Patent: October 6, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuaki Takagi, Kenji Yamaguchi
  • Patent number: 5799716
    Abstract: An electric-powered shutter apparatus to be mounted to a building. A winding drum (4) of an electric-powered shutter device (1) is provided with a driving mechanism including an electric motor (7) and a single-directional rotary clutch device (8). A balance tension device (9) is provided at the other end of the apparatus. The clutch device (8) is configured to slip when the load of the rotation in the direction of the curtain being fed exceeds a certain load. Further, the load at which the clutch device (8) slips is set so as to be greater than the force for forcibly rotating the electric motor when disconnected from electric power. The balancing tension device (9) is balanced against the sum of the weight of the shutter curtain (2) and the load for forcibly rotating the electric motor (7). Thus, the need for a braking device for the electric-powered shutter apparatus to be mounted to a building is eliminated.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: September 1, 1998
    Assignee: Sanwa Shutter Corporation
    Inventors: Kenji Yamaguchi, Tadashi Sasaki, Akira Koyano, Kenji Hosoyama
  • Patent number: 5654739
    Abstract: The controller executes a control calculation based on proportional and integration calculation parameters which are preset, and outputs a control output to a process, and comprises a display device for displaying panels having characters and figures thereon; a panel expanding key for instructing the display device to expand, or change, the panel to be displayed; a plurality of keys for setting control operations and various parameters; an operating panel generating unit for displaying as a bar graph; a process value and a control output value on an operating panel to be displayed on the display device; a trend graph panel generating unit for displaying the transition of the process value on a trend graph panel to be displayed on the display device; a tuning panel generating unit for displaying information to control the control parameter used in the control calculation on a tuning panel to be displayed on the display device; a display controlling unit for controlling the displays of the panels; and an operat
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: August 5, 1997
    Assignee: Yokogawa Electric Corporation
    Inventors: Yoshikatsu Sakai, Kenji Yamaguchi, Masayuki Nakagawa, Masao Yokomori, Katsuhisa Tsuda, Yoshiyuki Kamata
  • Patent number: 5589668
    Abstract: A multi-metal layer wiring TAB tape carrier capable of forming a fine pattern without affecting the thicknesses of conductive metal layers, and a process for fabricating the multi-metal layer wiring TAB tape carrier. This TAB tape carrier is constructed such that respective dielectric film layers are interposed between adjacent ones of plurality of conductive metal layers having a predetermined wiring pattern, such that the dielectric film layer is formed with interfacial connection holes, and such that a conductive via layer is formed in the interfacial connection holes to electrically connect adjacent conductive metal layers. The conductive via layer is formed by a vapor deposition method such as evaporation, ion plating or sputtering. Alternatively, a portion of the conductive metal layers and the conductive via layer are simultaneously formed.
    Type: Grant
    Filed: November 10, 1993
    Date of Patent: December 31, 1996
    Assignee: Hitachi Cable, Ltd.
    Inventors: Kenji Yamaguchi, Shoji Takagi, Sadahiko Mitsugi, Mamoru Mita, Tomio Murakami
  • Patent number: 5510809
    Abstract: The controller executes a control calculation based on proportional and integration calculation parameters which are preset, and outputs a control output to a process, and comprises a display device for displaying panels having characters and figures thereon; a panel expanding key for instructing the display device to expand, or change, the panel to be displayed; a plurality of keys for setting control operations and various parameters; an operating panel generating unit for displaying as a bar graph a process value and a control output value on an operating panel to be displayed on the display device; a trend graph panel generating unit for displaying the transition of the process value on a trend graph panel to be displayed on the display device; a tuning panel generating unit for displaying information to control the control parameter used in the control calculation on a tuning panel to be displayed on the display device; a display controlling unit for controlling the displays of the panels; and an operati
    Type: Grant
    Filed: March 22, 1994
    Date of Patent: April 23, 1996
    Assignee: Yokogawa Electric Corporation
    Inventors: Yoshikatsu Sakai, Kenji Yamaguchi, Masayuki Nakagawa, Masao Yokomori, Katsuhisa Tsuda, Yoshiyuki Kamata
  • Patent number: 5450473
    Abstract: In order to reduce the number of measurements of signal strength for implementing a handoff of a mobile unit located in a given land site, a strength of a signal transmitted from said mobile unit is measured at the land site. Further, the land site measures a level crossing rate based on the signal transmitted from the mobile to be handed off. The land site applies a handoff request to a MTSO if the land site detects that the measured signal strength falls below a predetermined handoff threshold. The handoff request includes information indicating the level crossing rate. The MTSO compares the level crossing rate with a predetermined value, and determine a plurality of land sites each of which is to measure the signal strength for implementing a handoff according to the comparison result.
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: September 12, 1995
    Assignee: NEC Corporation
    Inventors: Hirofumi Shiotsuki, Kenji Yamaguchi
  • Patent number: 5442229
    Abstract: A method of assembling a semiconductor chip on a tape carrier has the steps of stacking, on a film carrier having a first group of metal leads, another film carrier having a second group of metal leads and bonding the two film carriers together by adhesive to form a laminated structure. The first and second groups of metal leads are so disposed that they do not contact and do not cross one another. The tips of the metal leads of the two groups are bonded to the electrodes on the semiconductor chip. The metal leads are formed in advance on the corresponding film carriers by etching. By stacking the plurality of film carriers, the connection pitch can be reduced while eliminating a necessity for reducing the thickness of each lead.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: August 15, 1995
    Assignees: Hitachi, Ltd., Hitachi Cable, Ltd.
    Inventors: Takao Mori, Satoshi Yoshida, Tadahiko Nishimukai, Kenji Yamaguchi
  • Patent number: 5434694
    Abstract: A signal isolating device, such as used in a signal conditioner which converts an output signal from a temperature sensor, or the like, in a process control system, comprising a pulse width signal outputting means, which receives a pulse width modulated signal and produces differentiated pulses at a leading edge and at a trailing edge of the pulse width modulated signal; a first photo-coupler activated by the differentiated pulse produced at the leadinge edge; a second photocoupler activated by the differentiated pulse produced at the trailing edge; a differential pulse reception means comprising a reception resistor for receiving output pulses from the first photocoupler and the second photocoupler and which produces a set pulse or a reset pulse according to the signal generated at the reception resistor; and a flip-flop circuit which is set or reset by the pulse signal produced by the differential pulse reception means.
    Type: Grant
    Filed: January 25, 1993
    Date of Patent: July 18, 1995
    Assignee: Yokogawa Electric Corporation
    Inventors: Hitoshi Saito, Takao Kajitani, Kenji Yamaguchi, Akio Yoshino
  • Patent number: 5428889
    Abstract: An outer lead of a metal lead frame is connected to an inner lead of a flexible lead-patterned substrate via a Au--Sn alloy layer. The Au--Sn alloy layer contains Au of 10 to 40 weight %. An inner lead of a metal lead frame is connected to a patterned lead of a flexible lead-patterned substrate by a heating tool. The inner lead is coated on bottom and side surfaces of its tip portion. The bottom surface faces the patterned lead.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: July 4, 1995
    Assignee: Hitachi Cable, Ltd.
    Inventors: Mamoru Mita, Tomio Murakami, Shoji Takagi, Hiroki Tanaka, Kenji Yamaguchi
  • Patent number: 5326990
    Abstract: An outer lead of a metal lead frame is connected to an inner lead of a flexible lead-patterned substrate via a Au-Sn alloy layer. The Au-Sn alloy layer contains Au of 10 to 40 weight %.An inner lead of a metal lead frame is connected to a patterned lead of a flexible lead-patterned substrate by a heating tool. The inner lead is coated on bottom and side surfaces of its tip portion. The bottom surface faces the patterned lead.
    Type: Grant
    Filed: September 9, 1992
    Date of Patent: July 5, 1994
    Assignee: Hitachi Cable, Ltd.
    Inventors: Mamoru Mita, Tomio Murakami, Shoji Takagi, Hiroki Tanaka, Kenji Yamaguchi
  • Patent number: 5277009
    Abstract: According to the invention, there is provided an exterior wall unit for an exterior wall of a building structure, which comprises a siding member (10) made of a metal and one or more porcelain tiles (20) corresponding in size to and fitted to the outside surface of the siding member (10), the siding member (10) having the outside surface formed with engaging means (16) extending in the horizontal direction for engagement with the tile or tiles (20), each tile (20) being formed with engaging means (23) for engagement with the engaging means (16) of the siding member (10), each tile (20) being coupled to the outside surface of the siding member (10) to be integral therewith with the engagement of both the engaging means (16, 23).
    Type: Grant
    Filed: January 8, 1992
    Date of Patent: January 11, 1994
    Assignee: Sanwa Shutter Corporation
    Inventors: Kenji Yamaguchi, Shun-ichi Kobayashi, Fumitoshi Okazaki
  • Patent number: D328795
    Type: Grant
    Filed: November 21, 1989
    Date of Patent: August 18, 1992
    Assignee: Sanwa Shutter Corporation
    Inventors: Kenji Yamaguchi, Daisuke Hozumi