Patents by Inventor Kenji Yamaguchi

Kenji Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060145490
    Abstract: There are provided a vehicle impact energy absorbing member which is arranged as an impact energy absorbing member of a simple construction capable of absorbing impact energy with high efficiency, and which is capable of improving the pedestrian protection performance as well as the passenger protection performance, and a vehicle impact energy absorbing structure using the vehicle impact energy absorbing member. More specifically, a compression energy absorbing member 10 using compression deformation and a buckling energy absorbing member 20 using buckling deformation are provided. Impact energy applied to a vehicle body is absorbed by a combination of the two energy absorbing members 10 and 20.
    Type: Application
    Filed: August 27, 2003
    Publication date: July 6, 2006
    Inventors: Kenji Yamaguchi, Yoshihiro Yamamoto, Taro Kiguchi, Masahiko Sameshima, Takashi Hamamoto
  • Patent number: 7070720
    Abstract: A die-expanded molding apparatus comprising starting material bead supply for supplying beads on a current of air from a tank through a packer into a cavity formed by a core and cavity molds; a plurality of air expulsion devices having air pressure-adjusting components communicating with the cavity, a dual-system air expulsion device being such that steam chambers on the back side of the core mold and the cavity mold are used as the air pressure-adjusting components, each communicating with the cavity through through-holes formed in the core and cavity molds, respectively; an air expulsion device having one or more air pressure-adjusting components communicating with a clearance between the core and cavity molds; and a control for controlling the air pressure in each of the air pressure-adjusting components to be pressurized less than the pressure in the tank.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: July 4, 2006
    Assignees: Daisen Industry Co., Ltd., Kaneka Corporation
    Inventors: Iwao Nohara, Tomio Nakajima, Kiyotaka Ida, Masahiko Sameshima, Yoshiyuki Kobayashi, Kenji Yamaguchi
  • Patent number: 7056789
    Abstract: The present invention relates to a semiconductor substrate production method, field effect transistor production method, semiconductor substrate and field effect transistor which, together with having low penetrating dislocation density and low surface roughness, prevent worsening of surface and interface roughness during heat treatment of a device production process and so forth. A production method of a semiconductor substrate W, in which SiGe layers 2 and 3 are formed on an Si substrate 1, is comprised of a heat treatment step in which heat treatment is performed either during or after the formation of the SiGe layers by epitaxial growth, at a temperature that exceeds the temperature of the epitaxial growth, and a polishing step in which irregularities in the surface formed during the heat treatment are removed by polishing following formation of the SiGe layers.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: June 6, 2006
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Ichiro Shiono, Kazuki Mizushima, Kenji Yamaguchi
  • Patent number: 7045865
    Abstract: A semiconductor device of the invention has a plurality of resistor elements formed on an element isolating oxide film in predetermined regions on a surface of a semiconductor substrate. Active regions are furnished close to the resistor elements. This allows the element isolating oxide film near the resistor elements to be divided into suitable strips, forestalling a concave formation at the center of the element isolating oxide film upon polishing of the film by CMP and thereby enhancing dimensional accuracy of the resistor elements upon fabrication.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: May 16, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Hiroyuki Amishiro, Toshio Kumamoto, Motoshige Igarashi, Kenji Yamaguchi
  • Patent number: 7034694
    Abstract: The invention provides a body motion detector that allows a user to check whether he/she makes motion with appropriate motion intensity for every motion thereby to obtain an excellent exercise effect while exercising such as walking and running. While a user makes motion, a CPU determines whether the user makes appropriate motion by the amplitude, the period, and the detection frequency of an acceleration signal inputted from an acceleration sensor unit, and when it is determined that the user makes appropriate motion, operates an alarm generator thereby to notify the user that he/she makes motion with appropriate motion intensity.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: April 25, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Kenji Yamaguchi, Norimitsu Baba
  • Publication number: 20060019417
    Abstract: A substrate processing method is used to polish a substrate. The substrate processing method includes rotating a substrate 13 by a motor 12, polishing a first surface of a peripheral portion of the substrate 13 by pressing a polishing surface of a polishing mechanism 20 against the first surface, determining a polishing end point of the first surface by monitoring a polished state of the first surface, stopping the polishing according to the determining the polishing end point, determining a polishing time spent for the polishing, determining a polishing time for a second surface of the peripheral portion based on the polishing time of the first surface, and polishing the second surface for the determined polishing time.
    Type: Application
    Filed: July 22, 2005
    Publication date: January 26, 2006
    Inventors: Atsushi Shigeta, Gen Toyota, Hiroyuki Yano, Kunio Oishi, Kenya Ito, Masayuki Nakanishi, Kenji Yamaguchi
  • Publication number: 20050092351
    Abstract: The present invention provides a substrate processing apparatus and a substrate processing method suitable for use in an etching apparatus which etches a thin film formed on a peripheral portion of a substrate. The present invention also provides a substrate processing apparatus and a substrate processing method suitable for use in a cleaning apparatus which performs a cleaning process on a substrate which has been etched. The substrate processing apparatus for use in etching includes a substrate holder 11 for holding a substrate W substantially horizontally and rotating the substrate W, and a processing liquid supply unit 15 for supplying a processing liquid onto a peripheral portion of the substrate W which is being rotated in such a manner that the processing liquid is stationary with respect to the substrate W.
    Type: Application
    Filed: October 30, 2003
    Publication date: May 5, 2005
    Inventors: Takayuki Saito, Tsukuru Suzuki, Kaoru Yamada, Kenya Ito, Masayuki Kamezawa, Kenji Yamaguchi
  • Patent number: 6878431
    Abstract: There is provided an in-mold foam molding apparatus affording a significantly simpler design for a molding apparatus capable of molding molded portions comprising bead starting materials having different properties into a unitary molded article, and effectively preventing various drawbacks associated with the provision of partitioning members; and an in-mold foam molded article devoid of flash projecting from its visible surfaces.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: April 12, 2005
    Assignee: Kaneka Corporation
    Inventors: Masahiko Sameshima, Yoshiyuki Kobayashi, Kenji Yamaguchi
  • Publication number: 20050008741
    Abstract: The invention is to provide a process for producing a liquid food, characterized by subjecting at least one of coffee, a milk composition, a food material (liquid) containing a component(s) having an antioxidation ability (radical-scavenging activity) and mixed liquids containing one(s) of them to an electrolysis treatment and/or a current passage treatment. Since the invention can prevent quality deterioration of coffee or milk composition over a long period of time without using additives and also improve safety, it is appropriate for producing canned coffee, milk-containing coffee or milk-containing tea drink to be sold in vending machines or can warmers. Further, since the invention can improve the antioxidation ability of foods, the resulting foods can suppress the in-vivo increase of active oxygen and free radicals, it greatly contributes to health.
    Type: Application
    Filed: July 3, 2002
    Publication date: January 13, 2005
    Applicant: Pokka Corporation
    Inventors: Takashi Inoue, Wakako Kato, Kenji Yamaguchi
  • Publication number: 20040251458
    Abstract: A semiconductor substrate, a field effect transistor and their manufacturing methods provided with, in order to lower penetrating dislocation density and reduce surface roughness to a practical level, an Si substrate 1, a first SiGe layer 2 on the Si substrate, and a second SiGe layer 3 arranged on the first SiGe layer either directly or with an Si layer in between; wherein, the first SiGe layer has a film thickness that is thinner than twice the critical film thickness, which is the film thickness at which dislocation occurs resulting in lattice relaxation due to increased film thickness, the Ge composition ratio of the second SiGe layer is at least lower than the intralayer maximum value of the Ge composition ratio in the first SiGe layer or in the first SiGe layer at the contact surface with the Si layer, and the second SiGe layer has an incremental composition region in which the Ge composition ratio gradually increases towards the surface at least in a portion thereof.
    Type: Application
    Filed: February 4, 2004
    Publication date: December 16, 2004
    Inventors: Kazuki Mizushima, Ichiro Shiono, Kenji Yamaguchi
  • Publication number: 20040245552
    Abstract: The present invention relates to a semiconductor substrate production method, field effect transistor production method, semiconductor substrate and field effect transistor which, together with having low penetrating dislocation density and low surface roughness, prevent worsening of surface and interface roughness during heat treatment of a device production process and so forth. A production method of a semiconductor substrate W, in which SiGe layers 2 and 3 are formed on an Si substrate 1, is comprised of a heat treatment step in which heat treatment is performed either during or after the formation of the SiGe layers by epitaxial growth, at a temperature that exceeds the temperature of the epitaxial growth, and a polishing step in which irregularities in the surface formed during the heat treatment are removed by polishing following formation of the SiGe layers.
    Type: Application
    Filed: February 20, 2004
    Publication date: December 9, 2004
    Inventors: Ichiro Shiono, Kazuki Mizushima, Kenji Yamaguchi
  • Patent number: 6800227
    Abstract: Using a new molded foaming apparatus wherein chambers 13 and 14, independent from a cavity 4, are formed at the rear sides of a set of dies 2 and 3 for molding a molded foam product, so as to supply such utility fluid as air and steam to the cavity 4 through first openings 30 independently from the chambers 13 and 14, various problems created when forming vent holes are fundamentally solved, and at the same time dispersion of filling density to be caused by not forming vent holes is prevented by supplying the material beads to the cavity 4 while maintaining the pressure in the cavity 4 at a predetermined minus pressure with respect to the pressure in the material tank using the first openings 30.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: October 5, 2004
    Assignees: Daisen Industry Co., Ltd., Kaneka Corporation
    Inventors: Iwao Nohara, Tomio Nakajima, Kiyotaka Ida, Masahiko Sameshima, Yoshiyuki Kobayashi, Kenji Yamaguchi
  • Patent number: 6779160
    Abstract: External resistance Rsd1 is obtained using a first evaluation pattern of MOSFETs having a gate contact length Lgc1 and a channel width W1 each (in steps 100 and 102). External resistance Rsd2 is then acquired by use of a second evaluation pattern of MOSFETs having a gate contact length Lgc2 and a channel width W2 each (in steps 100 and 104). Thereafter, sheet resistance Rsh and overlapping portion resistance Rdsw of the MOSFETs are computed (in step 106) in accordance with the following expressions: Rsh=(W2·Rsd2−W1·Rsd1)/(Lgc2−Lgc1) Rdsw=(W1·Lgc2·Rsd1−W2·Lgc1·Rsd2)/(Lgc2−Lgc1).
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: August 17, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Hiroyuki Amishiro, Kenji Yamaguchi
  • Publication number: 20040116837
    Abstract: The invention provides a body motion detector that allows a user to check whether he/she makes motion with appropriate motion intensity for every motion thereby to obtain an excellent exercise effect while exercising such as walking and running. While a user makes motion, a CPU determines whether the user makes appropriate motion by the amplitude, the period, and the detection frequency of an acceleration signal inputted from an acceleration sensor unit, and when it is determined that the user makes appropriate motion, operates an alarm generator thereby to notify the user that he/she makes motion with appropriate motion intensity.
    Type: Application
    Filed: September 25, 2003
    Publication date: June 17, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kenji Yamaguchi, Norimitsu Baba
  • Publication number: 20040101576
    Abstract: An immunopotentiator for preventing ultraviolet light-induced skin immunosuppression or a drug against ultraviolet light-induced skin immunosuppression which contains glutathione or Scutellaria root extract. Also, an immunopotentiator or a drug against immunosuppression which contains linden extract, clove extract, Geranium herb extract or rosemary extract. They can prevent a reduction of immune functions due to ultraviolet light.
    Type: Application
    Filed: April 20, 1999
    Publication date: May 27, 2004
    Inventors: EIICHIRO YAGI, MASAKO NAGANUMA, ICHIRO IWAI, MASATO HATAO, KENJI YAMAGUCHI, GENJI WADA
  • Publication number: 20040098681
    Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 20, 2004
    Applicant: Renesas Technology Corp.
    Inventor: Kenji Yamaguchi
  • Patent number: 6735558
    Abstract: As to at least two transistors different only in channel lengths from each other, Ids−Vgs characteristics in a linear region are measured under two drain-to-source voltages Vds. Consequently, a graph of Rtot=Vds/Ids vs. channel lengths is obtained for two Vds, whereby an effective channel length Leff for each Vds is extracted. A velocity saturation coefficient U1 is obtained by expressing the relation between two effective channel lengths Le1 and Le2 corresponding to the two Vds on the graph and dividing the value of Le2 at Le1=0 by the difference &Dgr;Vds between the two Vds. Thus, parameters related to mobility and a velocity saturation effect are extracted with consistency in a form matching with remaining E-T data.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: May 11, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Kenji Yamaguchi
  • Patent number: 6727724
    Abstract: The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (&dgr;) which minimizes the standard deviation of the function F to be obtained (step ST1.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: April 27, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Kenji Yamaguchi
  • Publication number: 20040007793
    Abstract: There is provided an in-mold foam molding apparatus affording a significantly simpler design for a molding apparatus capable of molding molded portions comprising bead starting materials having different properties into a unitary molded article, and effectively preventing various drawbacks associated with the provision of partitioning members; and an in-mold foam molded article devoid of flash projecting from its visible surfaces.
    Type: Application
    Filed: July 11, 2003
    Publication date: January 15, 2004
    Applicant: Kaneka Corporation
    Inventors: Masahiko Sameshima, Yoshiyuki Kobayashi, Kenji Yamaguchi
  • Publication number: 20040009325
    Abstract: There is provided an in-mold foam molding apparatus affording a significantly simpler design for a molding apparatus capable of molding molded portions comprising bead starting materials having different properties into a unitary molded article, and effectively preventing various drawbacks associated with the provision of partitioning members; and an in-mold foam molded article devoid of flash projecting from its visible surfaces.
    Type: Application
    Filed: July 11, 2003
    Publication date: January 15, 2004
    Applicant: Kaneka Corporation
    Inventors: Masahiko Sameshima, Yoshiyuki Kobayashi, Kenji Yamaguchi