Abstract: A semiconductor substrate is disclosed which comprises a first single crystal silicon layer, an insulator formed to partially cover one main surface of the first single crystal silicon layer, a second single crystal silicon layer formed to cover a region of the first single crystal silicon layer which is not covered with the insulator, and to cover an edge portion of the insulator adjacent to the region, and a non-single crystal silicon layer formed on the insulator, the interface between the non-single crystal silicon layer and the second single crystal silicon layer being positioned on the insulator.

Abstract: This disclosure concerns a semiconductor device comprising a convex-shaped semiconductor layer formed on a semiconductor substrate; an insulation film formed on the semiconductor substrate, the insulation film having a film thickness to the extent that a lower part of the semiconductor layer is buried; a gate electrode formed on a set of both opposed side faces via a gate insulation film; and a source region and a drain region formed on a side face side on which the gate electrode is not formed in the semiconductor layer, wherein the semiconductor layer is formed so as to dispose surfaces of a peripheral part excepting a central part on an outer side than surfaces of the central part covered by at least the gate electrode.

Abstract: A semiconductor device includes: a layer provided on or above a semiconductor substrate, having an opening, and containing Si and Ge; and a gate provided at a position corresponding to the opening. It is possible to provide a semiconductor device and a manufacturing method of the same which realize easy control of a recess amount and reduction in damage at the time of the recessing.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes successively forming a first silicon film and a mask film above a semiconductor substrate through a gate insulating film, forming a plurality of trenches in the first silicon film and in the mask film to a depth to reach the semiconductor substrate, filling the plurality of trenches with the silicon oxide film, removing the mask film to expose the first silicon film existing between the silicon oxide films, selectively growing a second silicon film on the first silicon film, planarizing the second silicon film using an alkaline slurry exhibiting a pH of 13 or less and containing abrasive grains and a cationic surfactant, thereby obtaining a floating gate electrode film comprising the first and second silicon films, forming an interelectrode insulating film on the entire surface, and forming a control gate electrode film on the interelectrode insulating film.

Abstract: A semiconductor device suitable for the miniaturization and comprising properly controlled Si/SiGe gate electrode comprises an insulator formed on a semiconductor substrate, a first gate electrode formed on the insulator and including silicon-germanium, wherein a germanium concentration is higher near an interface to the insulator and lower in a surface side opposite to the insulator, and a second gate electrode formed on the insulator and including silicon-germanium, wherein a germanium concentration is substantially uniform and an n-type dopant of a concentration of above 6×1020 atoms/cm3 is contained.

Abstract: According to the manufacturing method of the semiconductor device of the present invention, an oxide film is formed on a metal film formed on a main surface of a semiconductor substrate by exposing the metal film to the oxidizing gas. The oxide film is then reduced in a reducing atmosphere, and a protection film is formed on the surface of the metal film reduced in the reducing step. In this manner, the damage to the surface of the metal film can be prevented.

Abstract: A method for manufacturing a semiconductor device comprises forming a first silicon layer above a semiconductor substrate; forming a stopper layer on said first silicon layer; partially removing said stopper layer and said first silicon layer above said semiconductor substrate to form a plurality of trenches; forming an insulating layer on said stopper layer with inside of said trenches; partially removing said insulating layer to expose said stopper layer; after partially removing said insulating layer, removing said stopper layer to expose said first silicon layer; selectively growing second silicon layer on said exposed first silicon layer; nonselectively growing a third silicon layer on said second silicon layer; and polishing at least a surface of said third silicon layer by performing chemical mechanical polishing.

Abstract: A semiconductor memory device includes: a semiconductor substrate; a semiconductor layer formed on the semiconductor substrate with an insulating film interposed therebetween, the semiconductor layer being in contact with the semiconductor substrate via an opening formed in the insulating film; and a NAND cell unit formed on the semiconductor layer with a plurality of electrically rewritable and non-volatile memory cells connected in series and first and second select gate transistors disposed at both ends thereof.

Abstract: A semiconductor device is disclosed, which comprises a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulating film formed on a channel region between the source/drain regions, a gate electrode formed on the gate insulating film, and a sidewall insulating film formed on a sidewall surface of the gate electrode, wherein the gate electrode is made of SiGe, the sidewall insulating film is an insulating film obtained by oxidizing the sidewall surface of the gate electrode, and the sidewall insulating film contains silicon oxide as a main component.

Abstract: A semiconductor device includes a semiconductor device comprising a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulation film formed on the semiconductor substrate, a gate electrode formed on the gate insulation film between the source/drain regions, and a gate sidewall spacer formed on side surfaces of the gate electrode, wherein the gate sidewall spacer is composed of silicon oxide containing 0.1–30 atomic % of chlorine.

Abstract: A semiconductor device is disclosed, which comprises a semiconductor substrate, source/drain regions formed in the semiconductor substrate, a gate insulating film formed on a channel region between the source/drain regions, a gate electrode formed on the gate insulating film, and a sidewall insulating film formed on a sidewall surface of the gate electrode, wherein the gate electrode is made of SiGe, the sidewall insulating film is an insulating film obtained by oxidizing the sidewall surface of the gate electrode, and the sidewall insulating film contains silicon oxide as a main component.

Abstract: A semiconductor substrate is disclosed which comprises a first single crystal silicon layer, an insulator formed to partially cover one main surface of the first single crystal silicon layer, a second single crystal silicon layer formed to cover a region of the first single crystal silicon layer which is not covered with the insulator, and to cover an edge portion of the insulator adjacent to the region, and a non-single crystal silicon layer formed on the insulator, the interface between the non-single crystal silicon layer and the second single crystal silicon layer being positioned on the insulator.

Abstract: A semiconductor device has an element isolating region formed of an insulating film having etching rates different from each other in a side close to an inside wall and a center side of a trench formed on a semiconductor substrate, and a selective epitaxial layer formed in both sides of the element isolating region, wherein the element isolating region has a tip portion in a tapered shape or a stepwise shape of which a width becomes narrower at a side closer to the tip portion.

Abstract: A semiconductor device having a trench capacitor is disclosed. The trench is formed on the surface of a semiconductor substrate. A first insulating film is formed on the side wall of the trench and a semiconductor film is buried in the trench. The first insulating film and the semiconductor film located in the upper part of the trench are etched and a second insulating film is deposited on the exposed side wall. The semiconductor film and the first insulating film are etched and a plate electrode is formed on the exposed side wall. A capacitor insulating film is formed on the plate electrode and a storage electrode is buried within the trench. The structure provides a semiconductor device having fewer memory cell defects.

Abstract: According to one aspect of the invention, there is provided a semiconductor device fabrication method comprising: forming a gate insulating film on a semiconductor substrate; forming a film containing a predetermined semiconductor material and germanium on the gate insulating film; oxidizing the film to form a first film having a germanium concentration higher than that of the film and a film thickness smaller than that of the film on the gate insulating film, and form an oxide film on the first film; removing the oxide film; forming, on the first film, a second film containing the semiconductor material and having a germanium concentration lower than that of the first film; forming a gate electrode by etching the second and first films; and forming a source region and drain region by ion-implanting a predetermined impurity by using the gate electrode as a mask.

Abstract: A semiconductor substrate is disclosed which comprises a first single crystal silicon layer, an insulator formed to partially cover one main surface of the first single crystal silicon layer, a second single crystal silicon layer formed to cover a region of the first single crystal silicon layer which is not covered with the insulator, and to cover an edge portion of the insulator adjacent to the region, and a non-single crystal silicon layer formed on the insulator, the interface between the non-single crystal silicon layer and the second single crystal silicon layer being positioned on the insulator.

Abstract: A semiconductor device suitable for the miniaturization and comprising properly controlled Si/SiGe gate electrode comprises an insulator formed on a semiconductor substrate, a first gate electrode formed on the insulator and including silicon-germanium, wherein a germanium concentration is higher near an interface to the insulator and lower in a surface side opposite to the insulator, and a second gate electrode formed on the insulator and including silicon-germanium, wherein a germanium concentration is substantially uniform and an n-type dopant of a concentration of above 6×1020 atoms/cm3 is contained.

Abstract: According to the present invention, there is provided a selectivity monitoring method in a selective film growth method of selectively growing a film in a predetermined region on a semiconductor substrate, comprising: selectively growing the film on a surface of the semiconductor substrate while measuring temperature of the surface of the semiconductor substrate by at least one pyrometer placed in a non-contact state above the surface of the semiconductor substrate; and determining that selectivity of the growth of the film has decreased, when the temperature changes from a predetermined value or changes from a predetermined angle in a graph showing change of the temperature during film formation.

Abstract: In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

Abstract: A semiconductor substrate and a manufacturing method therefore, and a semiconductor device using the semiconductor substrate comprise a strained Si region and unstrained Si region formed at substantially the same level. In an aspect of the invention, a semiconductor substrate is provided by comprising a support substrate, a first semiconductor region including a first silicon layer formed above the support substrate, a second semiconductor region including a strained second silicon layer formed above the support substrate, a surface of the second silicon layer being formed at substantially the same level as a surface of the first silicon layer, and an insulating film at an interface between the first semiconductor region and the second semiconductor region.