Patents by Inventor Koichi Nagasawa

Koichi Nagasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9712651
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: July 18, 2017
    Assignee: Sony Corporation
    Inventors: Koichi Nagasawa, Hirofumi Fujioka, Tomoki Sato, Tomotaka Nishikawa
  • Publication number: 20170194413
    Abstract: An electronic device of the technology includes: a plurality of first wiring patterns that are electrically coupled to each other partially, and each extend in a first direction; an organic insulating layer that is provided on the first wiring patterns; and a second wiring pattern that is provided on the organic insulating layer.
    Type: Application
    Filed: June 15, 2015
    Publication date: July 6, 2017
    Inventors: Koichi Nagasawa, Hirofumi Fujoka, Tomoaki Honda
  • Publication number: 20170104857
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Application
    Filed: December 21, 2016
    Publication date: April 13, 2017
    Inventors: Koichi NAGASAWA, Hirofumi FUJIOKA, Tomoki SATO, Tomotaka NISHIKAWA
  • Publication number: 20170098669
    Abstract: A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 6, 2017
    Inventors: HITOSHI TSUNO, KOICHI NAGASAWA
  • Publication number: 20170062549
    Abstract: A display device according to the present disclosure includes: a transistor section (100) that includes a gate insulating film (130), a semiconductor layer (140), and a gate electrode layer (120), the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section (200) that includes a first metal film (210) and a second metal film (220), the first metal film being disposed at a same level as wiring layers (161, 162) that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film (152) in between; and a display element that is configured to be controlled by the transistor section.
    Type: Application
    Filed: November 15, 2016
    Publication date: March 2, 2017
    Inventors: Hitoshi TSUNO, Koichi NAGASAWA
  • Patent number: 9548346
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: January 17, 2017
    Assignee: Sony Corporation
    Inventors: Koichi Nagasawa, Hirofumi Fujioka, Tomoki Sato, Tomotaka Nishikawa
  • Patent number: 9508758
    Abstract: A display device according to the present disclosure includes: a transistor section that includes a gate insulating film, a semiconductor layer, and a gate electrode layer, the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section that includes a first metal film and a second metal film, the first metal film being disposed at a same level as wiring layers that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film in between; and a display element that is configured to be controlled by the transistor section.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: November 29, 2016
    Assignee: SONY CORPORATION
    Inventors: Hitoshi Tsuno, Koichi Nagasawa
  • Publication number: 20160077394
    Abstract: A pixel array substrate structure includes: first and second planarizing films sequentially stacked on a substrate where a circuit unit is formed; and a relay wire formed between the first and second planarizing films, in which the relay wire electrically connects a first contact portion formed on the first planarizing film and connected to the circuit unit with a second contact portion formed at a position different from the first contact portion when seen from above, on the second planarizing film.
    Type: Application
    Filed: November 30, 2015
    Publication date: March 17, 2016
    Inventors: Koichi Nagasawa, Masaya Tamaki, Shuji Hayashi, Masaaki Kabe, Yoko Fukunaga
  • Publication number: 20160035815
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Inventors: Koichi NAGASAWA, Hirofumi FUJIOKA, Tomoki SATO, Tomotaka NISHIKAWA
  • Patent number: 9224759
    Abstract: A pixel array substrate structure includes: first and second planarizing films sequentially stacked on a substrate where a circuit unit is formed; and a relay wire formed between the first and second planarizing films, in which the relay wire electrically connects a first contact portion formed on the first planarizing film and connected to the circuit unit with a second contact portion formed at a position different from the first contact portion when seen from above, on the second planarizing film.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: December 29, 2015
    Assignee: Japan Display Inc.
    Inventors: Koichi Nagasawa, Masaya Tamaki, Shuji Hayashi, Masaaki Kabe, Yoko Fukunaga
  • Patent number: 9219081
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: December 22, 2015
    Assignee: Sony Corporation
    Inventors: Koichi Nagasawa, Hirofumi Fujioka, Tomoki Sato, Tomotaka Nishikawa
  • Publication number: 20150179680
    Abstract: A display device according to the present disclosure includes: a transistor section that includes a gate insulating film, a semiconductor layer, and a gate electrode layer, the semiconductor layer being laminated on the gate insulating film, the gate electrode film being laminated on an opposite side to the semiconductor layer of the gate insulating film; a first capacitor section that includes a first metal film and a second metal film, the first metal film being disposed at a same level as wiring layers that are electrically connected to the semiconductor layer and is disposed over the transistor section, the second metal film being disposed over the first metal film with a first interlayer insulating film in between; and a display element that is configured to be controlled by the transistor section.
    Type: Application
    Filed: May 15, 2013
    Publication date: June 25, 2015
    Applicant: SONY CORPORATION
    Inventors: Hitoshi Tsuno, Koichi Nagasawa
  • Publication number: 20140291687
    Abstract: Provided is a display unit that includes: a laminated structure including two first wirings, a first insulating layer, and a concave part, in which the first wirings are adjacent to each other, the first insulating layer is provided on the first wirings and is made of an organic material, and the concave part penetrates, between the first wirings, from the first insulating layer to the first wirings in a laminated direction; and a second insulating layer provided in the concave part and on the laminated structure.
    Type: Application
    Filed: March 18, 2014
    Publication date: October 2, 2014
    Applicant: Sony Corporation
    Inventors: Koichi NAGASAWA, Tomoaki HONDA, Hirofumi FUJIOKA
  • Patent number: 8830436
    Abstract: A pixel structure includes: a first planarizing film and a second planarizing film laminated in order on a substrate on which a circuit section is formed; and metallic wiring for electrically connecting two electrodes disposed on the second planarizing film to each other so as to be separated from each other, the metallic wiring being formed between the first planarizing film and the second planarizing film.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: September 9, 2014
    Assignee: Japan Display West Inc.
    Inventors: Masaya Tamaki, Koichi Nagasawa, Shuji Hayashi, Masaaki Kabe, Yoko Fukunaga
  • Publication number: 20140209914
    Abstract: A display unit includes: a display layer including a pixel electrode; a semiconductor layer provided in a layer below the display layer, the semiconductor layer including a wiring layer that includes a material removable by an etchant by which the pixel electrode is also removable; and a terminal section configured to electrically connect the semiconductor layer to an external circuit, the terminal section including a first electrically-conductive layer made of a material same as a material of the wiring layer.
    Type: Application
    Filed: January 15, 2014
    Publication date: July 31, 2014
    Applicant: Sony Corporation
    Inventors: Koichi NAGASAWA, Hirofumi FUJIOKA, Tomoki SATO, Tomotaka NISHIKAWA
  • Patent number: 8475223
    Abstract: A method of manufacturing a display device includes the steps of: forming a positive type photoresist above a surface of a first transparent substrate having a transistor formed on the surface thereof so as to cover the transistor; radiating a light from a back surface side of the first transparent substrate to the first transparent substrate having the positive type photoresist formed thereabove, for exposing the positive type photoresist; developing the positive type photoresist thus exposed to selectively leave the positive type photoresist located above the transistor, for forming a spacer; and laminating a second transparent substrate above the surface of the first transparent substrate through the spacer.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: July 2, 2013
    Assignee: Japan Display West Inc.
    Inventor: Koichi Nagasawa
  • Patent number: 8441085
    Abstract: An electronic apparatus having a substrate with a bottom gate p-channel type thin film transistor; a resist pattern over the substrate; and a light shielding film operative to block light having a wavelength shorter than 260 nm over at least a channel part of said thin film transistor.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: May 14, 2013
    Assignee: Japan Display West Inc.
    Inventors: Koichi Nagasawa, Takashi Yamaguchi, Nobutaka Ozaki, Yasuhiro Kanaya, Hirohisa Takeda, Yasuo Mikami, Yoshifumi Mutoh
  • Patent number: 8420527
    Abstract: Interconnections are formed over an interlayer insulating film which covers MISFETQ1 formed on the principal surface of a semiconductor substrate, while dummy interconnections are disposed in a region spaced from such interconnections. Dummy interconnections are disposed also in a scribing area. Dummy interconnections are not formed at the peripheries of a bonding pad and a marker. In addition, a gate electrode of a MISFET and a dummy gate interconnection formed of the same layer are disposed. Furthermore, dummy regions are disposed in a shallow trench element-isolation region. After such dummy members are disposed, an insulating film is planarized by the CMP method.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: April 16, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yasushi Koubuchi, Koichi Nagasawa, Masahiro Moniwa, Youhei Yamada, Toshifumi Takeda
  • Patent number: 8355108
    Abstract: A liquid-crystal display device includes a first substrate; a second substrate formed so as to oppose the first substrate; a liquid-crystal layer with a predetermined thickness, the liquid-crystal layer being formed between the first substrate and the second substrate; a planarization film for planarizing the surface of the liquid-crystal layer, the planarization film being formed on the surface of at least one of the first substrate and the second substrate, the surface facing the liquid-crystal layer; and projecting parts that are integrally formed with the planarization film.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: January 15, 2013
    Assignee: Sony Corporation
    Inventors: Takeo Koito, Koichi Nagasawa, Shuji Hayashi, Hidehiro Kosaka
  • Publication number: 20120305920
    Abstract: A semiconductor device including: a first electric conductor of a lower layer side and a second electric conductor of an upper layer side; a thick film insulating layer provided between the first electric conductor and the second electric conductor; and a contact portion formed so as to imitate an inner surface shape of a through hole with respect to the insulating layer and electrically connecting the first electric conductor and the second electric conductor, in which a tapered angle of the through hole is an acute angle.
    Type: Application
    Filed: May 11, 2012
    Publication date: December 6, 2012
    Applicant: SONY CORPORATION
    Inventors: Koichi Nagasawa, Masanobu Ikeda, Yasuhiro Murata