Patents by Inventor Koki Ueno

Koki Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220209290
    Abstract: The solid electrolyte material of the present disclosure includes Li, M, O, X, and F. M is at least one element selected from the group consisting of Ta and Nb. X is at least one element selected from the group consisting of Cl, Br, and I.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 30, 2022
    Inventors: KAORI TAKEUCHI, YOSHIAKI TANAKA, KOKI UENO, TETSUYA ASANO, AKIHIRO SAKAI
  • Patent number: 11215281
    Abstract: A control device for a vehicle including (i) a power transmission device, (ii) a shift operation device that is to be operated by a driver of the vehicle to an operation position corresponding to a shift position of the power transmission device, and (iii) a switching device for switching the shift position of the power transmission device through actuation of an actuator. The control device is configured, upon occurrence of a momentary interruption of a control-device electric-power source that is supplied with an electric power from a vehicle electric-power source, to not perform an initial position learning process for setting a reference position of the actuator, until a shift switching operation for switching the shift position of the power transmission device is performed by a driver of the vehicle.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: January 4, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yusuke Yamauchi, Koki Ueno, Yusuke Nakade, Ichiro Kitaori
  • Publication number: 20210408585
    Abstract: The present disclosure provides a solid electrolyte material having high lithium ion conductivity. The solid electrolyte material of the present disclosure includes Li, M and X. M is at least one element selected from the group consisting of Mg, Zn and Cd. X is at least two elements selected from the group consisting of Cl, Br and I.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 30, 2021
    Inventors: KOKI UENO, MASASHI SAKAIDA, AKIHIRO SAKAI, AKINOBU MIYAZAKI
  • Publication number: 20210408305
    Abstract: An inorganic compound semiconductor of the present disclosure contains yttrium, zinc, and nitrogen.
    Type: Application
    Filed: September 14, 2021
    Publication date: December 30, 2021
    Inventors: RYOSUKE KIKUCHI, TORU NAKAMURA, KOKI UENO, TAKAHIRO KURABUCHI, YASUSHI KANEKO, KAZUHITO HATO, FUMIYASU OBA, YU KUMAGAI
  • Publication number: 20210408586
    Abstract: The present disclosure provides a solid electrolyte material having high lithium ion conductivity. The solid electrolyte material of the present disclosure includes Li, M1, M2 and X, and has a spinel structure. M1 is at least one element selected from the group consisting of Mg and Zn. M2 is at least one element selected from the group consisting of Al, Ga, Y, In and Bi. X is at least one element selected from the group consisting of F, Cl, Br and I.
    Type: Application
    Filed: September 10, 2021
    Publication date: December 30, 2021
    Inventors: KOKI UENO, AKIHIRO SAKAI, AKINOBU MIYAZAKI
  • Publication number: 20210296692
    Abstract: The present disclosure provides a solid electrolyte material having high lithium ion conductivity. The solid electrolyte material according to the present disclosure has a crystal structure including a structure framework and an ion-conductive species, wherein the structure framework has a one-dimensional chain in which a plurality of polyhedrons are linearly connected to each other while sharing a corner, and each of the plurality of polyhedrons contains at least one type of cation and at least one type of anion.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: KOKI UENO, YOSHIAKI TANAKA, KAZUHIDE ICHIKAWA, TETSUYA ASANO, AKIHIRO SAKAI
  • Publication number: 20210280905
    Abstract: The present disclosure provides a solid electrolyte material having high lithium ion conductivity. A solid electrolyte according to the present disclosure contains Li, Sm, O, and X. X is at least one element selected from the group consisting of Cl, Br, and I.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Inventors: MASASHI SAKAIDA, KOKI UENO, AKINOBU MIYAZAKI
  • Publication number: 20210269320
    Abstract: A production method for producing a halide includes heat-treating, in an inert gas atmosphere, a mixed material in which LiX, YZ3, and at least one of LiX? or YZ?3 are mixed, where X is an element selected from the group consisting of Cl, Br, and I; Z is an element selected from the group consisting of Cl, Br, and I and different from X; X is an element selected from the group consisting of Cl, Br, and I and different from either X or Z; and Z? is an element selected from the group consisting of Cl, Br, and I and different from either X or Z. In the heat-treatment, the mixed material is heat-treated at higher than or equal to 200° C. and lower than or equal to 650° C.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Inventors: TAKASHI KUBO, YUSUKE NISHIO, KOKI UENO, AKIHIRO SAKAI, AKINOBU MIYAZAKI
  • Publication number: 20210249683
    Abstract: A solid electrolyte material according to the present disclosure consists essentially of Li, M, O, and X. M is at least one element selected from the group consisting of Nb and Ta, and X is at least one element selected from the group consisting of Cl, Br, and I.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 12, 2021
    Inventors: YOSHIAKI TANAKA, KOKI UENO, TETSUYA ASANO, AKIHIRO SAKAI
  • Publication number: 20210228491
    Abstract: To provide a hard capsule composed of a hard capsule film that can be molded by a cold gelation method and has enteric properties.
    Type: Application
    Filed: June 21, 2019
    Publication date: July 29, 2021
    Applicant: QUALICAPS CO., LTD.
    Inventors: Yoshiro OSAKI, Makoto ASO, Koki UENO
  • Publication number: 20210217481
    Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
    Type: Application
    Filed: March 31, 2021
    Publication date: July 15, 2021
    Applicant: Toshiba Memory Corporation
    Inventors: Yasuhiro SHIINO, Eietsu TAKAHASHI, Koki UENO
  • Patent number: 11061400
    Abstract: A control apparatus for a vehicle makes the vehicle travel without depending on operation of a shift operation apparatus by a driver, even in a case where a detection abnormality by which a shift operation position of the shift operation apparatus becomes indefinite has occurred.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: July 13, 2021
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Koki Ueno
  • Patent number: 11004520
    Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: May 11, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Yasuhiro Shiino, Eietsu Takahashi, Koki Ueno
  • Publication number: 20210005270
    Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 7, 2021
    Applicant: Toshiba Memory Corporation
    Inventors: Yasuhiro SHIINO, Eietsu TAKAHASHI, Koki UENO
  • Patent number: 10818362
    Abstract: A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: October 27, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Yasuhiro Shiino, Eietsu Takahashi, Koki Ueno
  • Publication number: 20200324791
    Abstract: A vehicle control device is applied to a vehicle including at least a shift control system configured to switch a shift range. The vehicle control device is configured to control the vehicle to perform autonomous driving travel without depending on an operation of a driver in at least one driving operation. The vehicle control device includes a controller. The controller is configured to determine the propriety of travel by the autonomous driving travel according to a type of abnormality that occurs in the shift control system. The controller is configured to perform travel control of the vehicle according to the propriety of the travel by the autonomous driving travel.
    Type: Application
    Filed: March 18, 2020
    Publication date: October 15, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Koki UENO, Yusuke Nakade, Kazuhiro Ozawa
  • Patent number: 10803950
    Abstract: According to one embodiment, a memory controller transmits a first instruction to a memory device. The memory device includes cell transistors; word lines coupled to gates of the cell transistors; a first data latch; and a second latch. The first instruction instructs application of a positive voltage to one of the word lines. The memory controller transmits a second instruction after the transmission of the first instruction and before transmitting a third instruction. The third instruction instructs output of data from the memory device. The second instruction is different from the third instruction and a fourth instruction instructing copy of data from the first data latch to the second data latch.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: October 13, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Yasuhiro Shimura, Tomoki Higashi, Sumito Ohtsuki, Junichi Kijima, Keisuke Yonehama, Shinichi Oosera, Yuki Kanamori, Hidehiro Shiga, Koki Ueno
  • Publication number: 20200309254
    Abstract: A control device for a vehicle including (i) a power transmission device, (ii) a shift operation device that is to be operated by a driver of the vehicle to an operation position corresponding to a shift position of the power transmission device, and (iii) a switching device for switching the shift position of the power transmission device through actuation of an actuator. The control device is configured, upon occurrence of a momentary interruption of a control-device electric-power source that is supplied with an electric power from a vehicle electric-power source, to not perform an initial position learning process for setting a reference position of the actuator, until a shift switching operation for switching the shift position of the power transmission device is performed by a driver of the vehicle.
    Type: Application
    Filed: March 30, 2020
    Publication date: October 1, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yusuke YAMAUCHI, Koki UENO, Yusuke NAKADE, Ichiro KITAORI
  • Patent number: 10783975
    Abstract: A semiconductor memory device includes first and second memory transistors and first and second word lines connected to gate electrodes of the memory transistors. The semiconductor memory device is configured such that a first write operation to the first memory transistor, a second write operation to the second memory transistor, a third write operation to the first memory transistor, and a fourth write operation to the second memory transistor are executed in this order. In the first and second write operations, data write is performed using only a program operation. In the third and fourth write operations, data write is performed using the program operation and the verify operation.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: September 22, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yasuhiro Shimura, Koki Ueno, Go Shikata
  • Publication number: 20200273530
    Abstract: A semiconductor memory device includes first and second memory transistors and first and second word lines connected to gate electrodes of the memory transistors. The semiconductor memory device is configured such that a first write operation to the first memory transistor, a second write operation to the second memory transistor, a third write operation to the first memory transistor, and a fourth write operation to the second memory transistor are executed in this order. In the first and second write operations, data write is performed using only a program operation. In the third and fourth write operations, data write is performed using the program operation and the verify operation.
    Type: Application
    Filed: September 5, 2019
    Publication date: August 27, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Yasuhiro Shimura, Koki Ueno, Go Shikata