Abstract: A printed circuit board or card having plated through-holes is provided wherein plated through-holes are filled with a photocured polymerized composition. Also, a method for fabricating these printed circuit boards or cards is provided. Also provided are compositions and methods of providing carrier films coated with the compositions for use in filling vias or plated through-holes.

Abstract: An electronic package assembly where a low profile integrated circuit chip package is soldered to an organic (e.g., epoxy resin) substrate, e.g., a printed circuit board or card, the projecting conductive leads of the integrated circuit chip package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with ultraviolet photocured encapsulant material (e.g., polymer resin) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder.

Abstract: A prepreg resin comprising: (a) 98 to 40% by weight based on the total weight of components (a) and (b), of a curable polyphenylene ether resin; (b) 2 to 60% by weight based on the total weight of components (a) and (b), of at least one cyanurate selected from the group consisting of triallyl isocyanurate and triallyl cyanurate; (c) a polymerization initiator comprised of a peroxide functionalized polymer, said peroxide functionalized polymer being fragmented by heat to a plurality of free radical moieties, such as t-butoxide moieties, and a relatively inert moiety having a molecular weight greater than about 1,000. The invention also encompasses a cured resin either as a coating on a substrate, without fiberglass cloth embedded, or a cured prepreg with fiberglass cloth embedded and a method of forming the same.

Abstract: An organic chip carrier having metallic circuitry and wire bond pads thereon is bonded to an integrated circuit die by a photocurable adhesive and is electrically connected therewith by wire bonding to the wire bond pads.

Abstract: A prepreg resin comprising:

Abstract: A method of forming a core for and forming a composite wiring board. The core has an electrically conductive coating on at least one face of a dielectric substrate. At least one opening is formed through the substrate extending from one face to the other and through each conductive coating. An electrically conductive material is dispensed in each of the openings extending through the conducting coating. At least a portion of the surface of the conductive coating on one face is removed to allow a nub of the conductive material to extend above the substrate face and any remaining conductive material to thereby form a core that can be electrically joined face-to-face with a second core member or other circuitized structure.

Abstract: A method and structure relating to multisegmented plated through holes. A substrate includes a dielectric layer sandwiched between a first laminate layer and a second laminate layer. A through hole is formed through the substrate. The through hole passes through nonplatable dielectric material within the dielectric layer. As a result, subsequent seeding and electroplating of the through hole results in a conductive metal plating forming at a wall of the through hole on a segment of the first laminate layer and on a segment of the second laminate layer, but not on the nonplatable dielectric material of the dielectric layer. Thus, the conductive metal plating is not continuous from the first laminate layer to the second laminate layer.

Abstract: A structure and method for forming a tamper respondent electronic circuit enclosure that includes an integrated circuit structure, a mesh structure surrounding the integrated circuit structure, and a sealed enclosure surrounding the mesh structure. The mesh structure includes a layer of flexible dielectric having a first side and a second side, a screen-printed pattern of flexible electrically conductive first circuit lines forming a first resistor network on the first side, and a photo lithographically-formed pattern of flexible electrically conductive second circuit lines forming a second resistor network on the second side.

Abstract: An interconnect structure having an increased chip connector pad and plated through hole density is provided. In particular, the interconnect structure includes a substrate having at least one plated through hole therein, and a first conductive layer sealing the at least one plated through hole. The substrate includes a layer of dielectric material thereon. The dielectric layer includes at least one aperture selectively positioned directly over the at least one plated through hole. The substrate further includes a metal layer, at least a pair of conductive layers that can carry signals, and at least another pair of conductive layers that can carry power, wherein the pair of conductive layers are shielded by the metal layer and the other pair of conductive layers.

Abstract: A composition usable in hole filling of a metal layer and to planarize the metal layer is provided. The metal layer is part of a substrate which can be part of a multilayer printed circuit board or chip carrier. The composition comprises a fluoropolymer dielectric metal, a filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent.

Abstract: A method of forming a core for and forming a composite wiring board. The core has an electrically conductive coating on at least one face of a dielectric substrate. At least one opening is formed through the substrate extending from one face to the other and through each conductive coating. An electrically conductive material is dispensed in each of the openings extending through the conducting coating. At least a portion of the surface of the conductive coating on one face is removed to allow a nub of the conductive material to extend above the substrate face and any remaining conductive material to thereby form a core that can be electrically joined face-to-face with a second core member or other circuitized structure.

Abstract: An interconnect structure having an increased chip connector pad and plated through hole density is provided. In particular, the interconnect structure includes a substrate having at least one plated through hole therein, and a first conductive layer sealing the at least one plated through hole. The substrate includes a layer of dielectric material thereon. The dielectric layer includes at least one aperture selectively positioned directly over the at least one plated through hole. The substrate further includes a metal layer, at least a pair of conductive layers that can carry signals, and at least another pair of conductive layers that can carry power, wherein the pair of conductive layers are shielded by the metal layer and the other pair of conductive layers.

Abstract: The present invention provides a method of filling an at least one aperture in a semiconductor substrate by placing a sacrificial carrier structure on a surface of the substrate, wherein the structure comprises, a first layer, a fill material over the first layer, and a mask over the fill material having at least one opening therein, such that the opening at least partially aligns with the aperture in the substrate. Thereafter, the fill material is forced into the aperture by the application of heat and pressure, and the sacrificial carrier structure is removed.

Abstract: A structure of and method for producing a multilayer printed or wiring circuit board, and more particularly a method producing so-called z-axis or multilayer electrical interconnections in a hierarchial wiring structure in order to be able to provide for an increase in the number of inputs and outputs (I/O) in comparison with a standard printed wiring board (PWB) arrangement, and a printed wiring board produced by the method.

Abstract: A composition usable in hole filling of a metal layer and to planarize the metal layer is provided. The metal layer is part of a substrate which can be part of a multilayer printed circuit board or chip carrier. The composition comprises a fluoropolymer dielectric metal, a filler material, and a coupling agent, the filler material having at least a partial coating of the coupling agent thereon.

Abstract: An organic chip carrier having metallic circuitry and wire bond pads thereon is bonded to an integrated circuit die by a photocurable adhesive and is electrically connected therewith by wire bonding to the wire bond pads.

Abstract: High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.

Abstract: A method and arrangement for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, there are provided vias of either through-holes, blind holes and buried holes filled with a conductive paste material to form electrical interconnections with conductive layers of the printed wiring board.

Abstract: An interconnect structure having an increased chip connector pad and plated through hole density is provided. In particular, the interconnect structure includes a substrate having at least one plated through hole therein, and a first conductive layer sealing the at least one plated through hole. The substrate includes a layer of dielectric material thereon. The dielectric layer includes at least one aperture selectively positioned directly over the at least one plated through hole. The substrate further includes a metal layer, at least a pair of conductive layers that can carry signals, and at least another pair of conductive layers that can carry power, wherein the pair of conductive layers are shielded by the metal layer and the other pair of conductive layers.

Abstract: A printed circuit board or card having plated through-holes is provided wherein plated through-holes are filled with a photocured polymerized composition. Also, a method for fabricating these printed circuit boards or cards is provided. Also provided are compositions and methods of providing carrier films coated with the compositions for use in filling vias or plated through-holes.